JP2868214B2 - Image addition device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording apparatus for handling line drawings, and more particularly to a device for changing the width of the line drawing.

[Prior Art] Conventionally, the width of a line drawing has been changed by increasing or decreasing the width by one dot in the sub-scanning direction.
For example, when printing a newspaper or magazine, the width of an actual line drawing may be smaller depending on the performance of the printing press. At that time, according to the conventional apparatus, the characteristics of the printing press could be supplemented by increasing the width of the line drawing. It could also be used to simply make line drawings thicker or thinner.

FIG. 10 is a block diagram showing an example of an image adding apparatus according to the prior art. In FIG. 10, reference numeral 21 denotes a reference area output circuit, and reference numeral 22 denotes a pattern determination circuit using a ROM.

In the conventional image adding apparatus shown in FIG. 10, the ROM determines whether or not a predetermined pattern is present in a reference area, and outputs the converted pixel by changing the converted pixel from white to black or from black to white. Therefore, only one dot can be thickened or thinned in the sub-scanning direction, and two or more dots cannot be processed.

[Problems to be solved by the invention]

Since the conventional device shown in FIG. 10 uses only the result of conversion by the ROM, it can only increase or decrease by one dot in the sub-scanning direction, and can process two or more dots. There is a drawback that you can not.

An object of the present invention is to provide a determination signal as a determination result of a pattern determination circuit and a plurality of converted pixels at that time.
It is an object of the present invention to provide an image adding apparatus which is stored in a line delay element and controls the output of the converted pixel by the determination signal to eliminate the above-mentioned drawbacks and to execute processing of two or more dots. .

[Means for solving the problem]

An object adding apparatus according to the present invention includes a reference area output circuit,
The circuit includes a pattern determination circuit, a determination signal storage circuit, a converted pixel storage circuit, and a converted pixel output control circuit.

The reference area output circuit is for outputting an area to be referred to in the sub-scanning direction by one dot for each line.

The pattern determination circuit determines whether or not the data in the reference area applies to a predetermined pattern, and if so, converts the conversion pixel of the reference area from white to black or from black to white (addition). And output two pixels (line image) of two dots in the sub-scanning direction.
This is for outputting a determination signal as to whether to convert (add) from black to white.

The discrimination signal storage circuit outputs a discrimination signal for determining whether to convert (add) a pixel (line image) for two dots in the sub-scanning direction from white to black or from black to white in the output of the pattern determination circuit. It is for storing.

The conversion pixel storage circuit determines whether or not the data in the reference area among the outputs of the pattern determination circuit applies to a predetermined pattern, and if so, converts the conversion pixels of the reference area from white to black, Alternatively, it is for storing the result of conversion (addition) from black to white and output.

The conversion pixel output control circuit operates in response to a switching signal of 1 dot → 2 dot conversion (addition) / 1 dot → 3 dot conversion (addition) instructed from outside in advance.
In the case of dot conversion, a converted pixel output from the pattern determination circuit is output. In the case of 1 dot → 3 dot conversion, the converted pixel is output from the pattern determination circuit according to a determination signal stored in the determination signal storage circuit. Output from the conversion pixel storage circuit or the conversion pixel output from the conversion pixel storage circuit.

〔Example〕

Before describing the embodiments, the definitions of the terms of the object adding device will be described.

Line drawing (image line) means a line drawn in the main scanning direction.
Either a black line in white or a white line in black may be used, and the number of lines is arbitrary. Usually called line drawing. Note that a line drawn by one dot in the sub-scanning direction also corresponds to this.

Adding means making the linework thicker or thinner.Inversely, making the linework thicker means that if the linework is black, the subsequent linework will be changed from white to black, if it is white, The next and subsequent line drawings are changed from black to white. Also,
Making a line work thinner means that if the line work is black, a part of the line work (the slowest scan) is changed from black to white, and if it is white, a part of the line work is changed from white to black. . Accordingly, the addition of the object adding device means that black is converted to white and white is converted to black.

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an object adding apparatus according to the present invention.

In FIG. 1, reference numeral 11 denotes a reference area output circuit, 12 denotes a pattern determination circuit, 13 denotes a determination signal storage circuit, 14 denotes a converted pixel storage circuit, and 15 denotes a converted pixel output control circuit.

In FIG. 1, binary serial data is input from a terminal 101 to a reference area output circuit 11. In the reference area output circuit 11, the input data is stored in units of one line, and when five lines of data are stored, one dot is sequentially read from each line of five lines.

In describing the present invention, main scanning 1 as shown in FIG.
A description will be given of a dot and a reference area of five sub-scanning lines. Of course, other numbers of lines and dots can be realized in a similar manner. Further, it is assumed that the conversion method of the line drawing is to convert one dot to two dots or to convert one dot to three dots for simplicity. Of course, other transformations can be implemented in a similar manner. The pixel conversion will be described from white to black for simplicity. Of course, the conversion from black to white can be realized in a similar manner.

FIG. 2 shows an example of the determination pattern. A plurality of determination patterns can be provided, and these are determined simultaneously.
Pixels marked with * in the figure represent pixels that are converted from white to black or from black to white when the data in the reference area at a certain time matches a determination pattern in the pattern determination circuit 12. . Hereinafter, it is referred to as a conversion pixel.

In FIG. 1, data of 5 lines × 1 dot unit output from the reference area output circuit 11 is
12 and the processing shown in FIG. 3 is executed. The determination itself is performed by a ROM provided inside the pattern determination circuit 12. Hereinafter, specific processing operations will be described with reference to FIG.

The determination pattern shown in FIG.
Suppose that

First, as shown in FIG. 3, one dot is converted into two dots. At this time, if a pattern as shown in FIG. 3A is input to the pattern determination circuit 12, one dot is added as shown in FIG. 3B. That is, assuming that the data shown in FIG. 3A is input from the reference area output circuit 11 to the pattern determination circuit 12, the comparison with the determination pattern is performed in 5-pixel units in the sub-scanning direction. The converted pixel (part marked with *)
Is converted from white to black.

On the other hand, when converting one dot to three dots, the fourth
As shown in FIG. 7A, conversion from white to black is performed for two dots. That is, first, conversion from white to black is performed for one dot as shown in FIG.
When the line advances, a third dot is added due to a delay between the data of the conversion pixel from the conversion pixel storage circuit 14 and the determination signal from the determination signal storage circuit 13. However, in this case, the conversion pixel of the third dot is the conversion pixel from the pattern determination circuit 12 and the conversion pixel from the conversion pixel storage circuit 14,
The selection is made according to the discrimination signal that has determined the pattern.

The determination pattern in FIG. 3A is a determination pattern that can be used in both cases where one dot is converted into two dots and one dot is converted into three dots, and will be described below with reference to this determination pattern.

FIG. 5 shows a block diagram of the reference area output circuit 11 of FIG.

In FIG. 5, reference numerals 61 to 64 denote one-line delay elements, respectively. When binary serial data is input to the terminal 601, one is output to the terminal 602 as it is, and the other is input to the one-line delay element 61. One of the data output from the one-line delay element 61 is output to the terminal 603 as it is, and the other is input to the one-line delay element 62. Similarly, the serial data is output to terminals 604 to 606 and
Input to line delay elements 63-64. In this way,
By delaying one line of data line by line, 5
Outputs data for the line.

FIG. 7 is a block diagram of the pattern determination circuit 12 shown in FIG.

This circuit includes only the ROM 81. Terminals 802-80
6, serial data of one line unit at the terminals 602 to 606 of the reference area output circuit 11 is input. In the ROM 81, it is determined whether or not the pattern matches any one of the several determination patterns held in the ROM. If the pattern matches, the conversion pixel is converted from white to black or from black to white from the terminal 807. Output. Of course, if they do not match, the logic is output as it is. The determination result is output from a terminal 801.

FIG. 8 is a block diagram of the discrimination signal storage circuit 13 shown in FIG.

This circuit includes one-line delay elements 91 and 92. A determination signal is input from a terminal 901 from a terminal 801 of the pattern determination circuit 12 and stored in a one-line delay element 91 in synchronization with each of the one-line delay elements 61 to 64 of the reference area output circuit 11.
At this time, in synchronization with the one-line delay element 91, a determination signal before the reference area is shifted by one line from the one-line delay element 92 is output to the read terminal 902. Thereafter, each time storage and readout for one line is completed, one-line delay elements for storage and readout are replaced and used alternately.

FIG. 9 shows a block diagram of the conversion pixel storage circuit 14 of FIG.

This circuit comprises one-line delay elements 93 and 94 which are exactly the same as the configuration of the discrimination signal storage circuit 13. The converted pixel is input from the terminal 807 of the pattern determination circuit 12 from the terminal 903, and stored in the one-line delay element 93 in synchronization with each of the one-line delay elements 61 to 64 of the reference area output circuit 11. At this time, in synchronization with the one-line delay element 93, the converted pixel before shifting the reference area by one line from the one-line delay element 94 is read out by the read terminal 90.
Output to 4. Thereafter, each time storage and readout for one line is completed, one-line delay elements for storage and readout are replaced and used alternately.

FIG. 6 is a block diagram of the conversion pixel output control circuit 15 of FIG.

In FIG. 6, 71 to 73 are AND gates, and 74 is O
R gate, 75 is an inverter.

This circuit includes a discrimination signal output from the discrimination signal storage circuit 13 and an external 1 dot → 2 dot conversion / 1 dot →
Pattern judgment circuit by switching signal of 3 dot conversion
It controls which one of the converted pixel from the converted pixel 12 and the converted pixel from the converted pixel storage circuit 14 is output.

A switching signal for 1 dot → 2 dot conversion / 1 dot → 3 dot conversion is input to the terminal 701 (similar to the terminal 103 in FIG. 1). This signal converts one dot to two dots,
It is a fixed signal that sets in advance whether to convert one dot into three dots. In this circuit example, in the case of 1 dot → 2 dot conversion, low level, 1
In the case of dot → 3 dot conversion, the level is set to the high level. Each is described below.

(1) When one dot is converted into two dots A determination signal in a state before the determination pattern is shifted by one line is received from the determination signal storage circuit 13 from the terminal 702.
In this case, since the terminal 701 is at a low level (1 dot → 2 dot conversion designation), it is ignored. That is, the converted pixel of the pattern determination circuit 12 received from the terminal 704 is output to the terminal 705 regardless of the determination signal of the determination signal storage circuit 13.

(2) When one dot is converted to three dots A determination signal in a state before the determination pattern is shifted by one line is received from the determination signal storage circuit 13 from the terminal 702. In this case, since the terminal 701 is at a high level (1 dot → 3 dot conversion designation), this discrimination signal becomes valid. That is, according to the discrimination signal stored in the discrimination signal storage circuit 13,
Converted pixel from pattern determination circuit 12 and converted pixel storage circuit
The converted pixels stored in 14 are selected and output in units of columns. Hereinafter, the selection operation will be described.

If the discrimination signal is a signal whose pattern has been determined by the pattern determination circuit 12, the data of the converted pixel storage
From the terminal 705, and outputs a signal to the terminal 705 if the signal is not determined.
Output to 05. That is, when viewed from the main scanning direction, this means that the addition of an image line in units of one dot may or may not be determined for each dot.

〔The invention's effect〕

As described above, according to the present invention, by storing the determination signal from the pattern determination circuit and the converted pixel at that time in the one-line delay element, it is possible to easily add an image of 2 bits or more. effective.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an object adding apparatus according to the present invention. FIG. 2 to FIG. 4 are explanatory diagrams each showing a diagram for adding image lines to data. FIG. 5 is a block diagram showing details of the reference area output circuit. FIG. 6 is a block diagram showing details of a conversion pixel output control circuit. FIG. 7 is a block diagram showing details of the pattern determination circuit. FIG. 8 is a block diagram showing details of the determination signal storage circuit. FIG. 9 is a block diagram showing details of the conversion pixel storage circuit. FIG. 10 is a block diagram showing an embodiment of an image adding apparatus according to the prior art. [Explanation of Reference Codes] 11, 21 ... Reference area output circuit, 12, 22 ... Pattern determination circuit, 13 ... Discrimination signal storage circuit, 14 ... Conversion pixel storage circuit, 16 ... Conversion pixel output control circuit, 61 ~ 64,91 ~ 94 ...
1-line delay element, 71 to 73 ... AND gate, 74 ... OR gate, 75 ... inverter, 81 ... ROM, 101, 102, 201, 20
2,601-606,701-705,801-807,901-904 ... Terminal.

Claims (1)

(57) [Claims] A reference area output circuit for outputting an area to be referred to in the sub-scanning direction by one dot for each line; and determining whether or not data in the reference area applies to a predetermined pattern. In this case, the conversion pixel in the reference area is converted from white to black or from black to white and output, and the pixel for two dots in the sub-scanning direction is converted from white to black or black to white. A pattern determination circuit having a system for outputting a determination signal as to whether or not to convert pixels of two dots in the sub-scanning direction from white to black or from black to white in the output of the pattern determination circuit; A discrimination signal storage circuit that stores the discrimination signal, and among the outputs of the pattern determination circuit, determine whether or not the data in the reference area is applicable to a predetermined pattern. Conversion image Black from white, or the converted pixel storage circuit for storing the result of the output is converted from black to white,
1 dot to 2 dot conversion specified in advance from outside
In the case of 1 dot → 2 dot conversion, a conversion pixel output from the pattern determination circuit is output according to a switching signal of / 1 dot → 3 dot conversion, and in the case of 1 dot → 3 dot conversion, the determination signal is stored. A conversion pixel output control circuit that outputs one of a conversion pixel output from the pattern determination circuit or a conversion pixel output from the conversion pixel storage circuit according to a determination signal stored in the circuit. An object adding device, characterized in that: