JPS5935226A - Keyboard input circuit - Google Patents

Keyboard input circuit

Info

Publication number
JPS5935226A
JPS5935226A JP57144466A JP14446682A JPS5935226A JP S5935226 A JPS5935226 A JP S5935226A JP 57144466 A JP57144466 A JP 57144466A JP 14446682 A JP14446682 A JP 14446682A JP S5935226 A JPS5935226 A JP S5935226A
Authority
JP
Japan
Prior art keywords
key
resistor group
voltage
conductors
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57144466A
Other languages
Japanese (ja)
Inventor
Munehiro Minami
南 宗宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57144466A priority Critical patent/JPS5935226A/en
Publication of JPS5935226A publication Critical patent/JPS5935226A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M11/00Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
    • H03M11/22Static coding
    • H03M11/24Static coding using analogue means, e.g. by coding the states of multiple switches into a single multi-level analogue signal or by indicating the type of a device using the voltage level at a specific tap of a resistive divider
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H2239/00Miscellaneous
    • H01H2239/01Miscellaneous combined with other elements on the same substrate
    • H01H2239/012Decoding impedances

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE:To detect a key selecting point by a simple circuit even when the number of key selection points is large, by connecting resistance groups to longitudinal and lateral conductor lines of a key matrix, and utilizing voltage drops across the resistance the resistance groups due to key operation. CONSTITUTION:The longitudinal and lateral conductors LC1-LCn of the keyboard matrix 20 are connected to the resistor groups VR1, R0-Rn-1, and VR2, and VR'1, R'0-R'n-1, and VR'2, and those resistance groups are connected to a constant voltage +5V and the ground through changeover switches 21 and 22, respectively. When a desired intersection Xii in the matrix 20 is depressed, a divided voltage in the resistance corresponding to the point Xii is A/D-converted 24 through some resistance groups VR'1-VR'2 and the side of the contact (b) of a relay 23 and then supplied to a CPU through an input interface IF25. Then, relays 21-23 are changed over by a relay driving circuit 27 and a divided voltage in the VR'1-VR'2 is A/D-converted 24 through some of the VR1-VR2 and the contact (m) of the relay 23 and inputted to the CPU through the IF25. The CPU discriminates the position of the Xii by those two voltages.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、日本語ワードプロセッサなどに使用されるキ
ーボード入力回路に係シ、特にキーマトリクスデートの
マトリクスの交叉部がキー選択点となるキーが−ド入力
回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a keyboard input circuit used in a Japanese word processor, etc., and particularly when a key whose key selection point is the intersection of a key matrix date matrix is - This invention relates to a code input circuit.

〔発明の技術的背景〕[Technical background of the invention]

たとえば日本語ワードプロセッサにおいて、キーボード
から漢字情報を入力する方法には種々の方法があるが、
漢字情報が印刷されたキーが一ドの表面を何らかの方法
で指示することによって、その指示位置に関する情報を
入力する方法がある。この場合、キーボードの下面に、
第1図に示すように導体1をマトリクス状に配置してお
き、キーデート表面から上記マトリクスの交点上を押す
ことによって、この交点に対応する縦、横方向の導体1
が接触することを利用するものがある。このように接触
した2本の導線1を電気的に検出するキーが一部入力回
路として、エンコーダなどのデジタル回路を用いること
が考えられる。
For example, in a Japanese word processor, there are various ways to input kanji information from the keyboard.
There is a method in which a key on which kanji information is printed points to the surface of a single card in some way, thereby inputting information regarding the pointed position. In this case, on the bottom of the keyboard,
As shown in Fig. 1, the conductors 1 are arranged in a matrix, and by pressing on the intersection point of the matrix from the key date surface, the conductor 1 in the vertical and horizontal directions corresponding to this intersection point is
There are things that take advantage of the fact that they come in contact with each other. It is conceivable that a digital circuit such as an encoder may be used as a part of the key for electrically detecting the two conductive wires 1 in contact as an input circuit.

〔背景技術の問題点〕[Problems with background technology]

しかし、選択点数が非常に多いキーマトリクスポード−
ドのためのキーボード入力回路を上記のようにデジタル
回路により実現しようとした場合、デジタル回路のダー
ト数、その他の部品数が非常に多くなシ、高価になって
しまう。
However, the key matrix node with a very large number of selection points -
If an attempt is made to implement a keyboard input circuit for a computer using a digital circuit as described above, the digital circuit will require a large number of darts and other components, and will be expensive.

〔発明の目的〕[Purpose of the invention]

本発明は上記の事情に鑑みてなされたもので、キーマト
リクスが一部の選択点数が多い場合でもキー操作により
選択された選択点を簡単な回路によシ検出し得るキーが
−ド入力回路を提供するものである。
The present invention has been made in view of the above circumstances, and provides a key input circuit that can detect selection points selected by key operation using a simple circuit even if the key matrix has a large number of selection points in some parts. It provides:

〔発明の概、要〕[Outline and summary of the invention]

すなわち、本発明のキー号?−ド入力回路は、キーマト
リクスポードの縦方向の各導体間にそれぞれ抵抗を接続
し、同じく横方向の各導体間にそれぞれ抵抗を接続し、
上記縦方向導体間抵抗群または横方向導体間抵抗群の両
端に定電圧を印加すると共に、上記2個の抵抗群のうち
上記定電圧が印加されていない方の抵抗群の一点からそ
の電圧を導き出す切換回路を設け、前記キーマトリクス
ボードの1回のキー操作中に上記切換回路を1回切換え
て1回のキー操作中に前記2個の抵抗群から1回づつ電
圧を導き出すように制御し、この導き出した2回の電圧
をそれぞれA/D変換し、2回の変換データに基いてキ
ー操作に係るキー選択点を検出するための処理を行なう
ようにしたものである。
In other words, the key number of the present invention? - The mode input circuit connects a resistor between each conductor in the vertical direction of the key matrix node, and also connects a resistor between each conductor in the horizontal direction,
A constant voltage is applied to both ends of the longitudinal inter-conductor resistance group or the lateral inter-conductor resistance group, and the voltage is applied from one point of the resistance group to which the constant voltage is not applied among the two resistance groups. A switching circuit for deriving voltage is provided, and the switching circuit is switched once during one key operation of the key matrix board, and the voltage is controlled to be derived from the two resistor groups once each during one key operation. The two derived voltages are each subjected to A/D conversion, and processing for detecting a key selection point related to a key operation is performed based on the two converted data.

したがって、キー選択点毎に縦方向導体の電圧レベルと
横方向導体の電圧レベルとの組み合せが相異なり、それ
ぞれの電圧レベルを顆状A/D変換して得られる2回の
変換データの組み合せはキー選択点毎に相異なるので、
キー選択点の検出が可能になる。この場合、1個のA/
D変換器によシキー選択点に対応したデジタル信号が得
られるものであ如、キー選択点数が多い場合でも回路構
成が簡単でよい・〔発明の実施例〕 以下、図面を参照して本発明の一実施例を詳細に説明す
る。
Therefore, the combination of the voltage level of the vertical conductor and the voltage level of the horizontal conductor is different for each key selection point, and the combination of the two conversion data obtained by condylar A/D conversion of each voltage level is Each key selection point is different, so
It becomes possible to detect key selection points. In this case, one A/
As long as the digital signal corresponding to the key selection points can be obtained from the D converter, the circuit configuration can be simple even when there are many key selection points. [Embodiments of the Invention] The present invention will be explained below with reference to the drawings. An example of this will be described in detail.

第2図において、20は通常のキーデートマトリクスで
あって、横方向に配設された複数本の導体”R1〜L8
nおよび縦方向に配設された複数本の導体り、1〜Lc
nを有する。上記キーマトリクスが−ドは、たとえば第
3図に示すように、絶縁基板30上に複数本の縦方向導
体(たとえば金属バー)Lci等が一定間隔で配列され
、この配列相互間に上記導体り。1等の表面よシ若干突
出する如く絶縁物31が設けられている。そして、これ
らの絶縁物31上に複数本の横方向導体(たとえば金属
バー)LRl等が一定間隔で5− 配列され、これらの導体Lai等の上に絶縁物シート3
2が載置されている。したがって、上記キーマトリクス
ポードにおいては、ボード表面から見て縦、横の導体の
交叉部がキー選択点になっておシ、たとえば縦の導体L
cjと横の導体LRtとの交叉部Xiiを吋?−ド表血
から押圧し、導体Litの一部を隙間33方向に彎曲さ
せて導体Lciに接触させることによってキー選択を行
なうことが可能になっている。
In FIG. 2, 20 is an ordinary key date matrix, and a plurality of conductors "R1 to L8" are arranged in the horizontal direction.
n and a plurality of conductors arranged in the vertical direction, 1 to Lc
It has n. The key matrix code is, for example, as shown in FIG. 3, in which a plurality of vertical conductors (for example, metal bars) Lci, etc. are arranged at regular intervals on an insulating substrate 30, and the conductors are arranged between each arrangement. . An insulator 31 is provided so as to slightly protrude from the surface of the first plate. A plurality of horizontal conductors (for example, metal bars) LR1, etc. are arranged at regular intervals on these insulators 31, and an insulator sheet 3 is placed on these conductors Lai, etc.
2 is placed. Therefore, in the above-mentioned key matrix board, the intersection of the vertical and horizontal conductors when viewed from the board surface becomes the key selection point.
Where is the intersection Xii between cj and the horizontal conductor LRt? - It is possible to perform key selection by pressing from the surface blood, bending a part of the conductor Lit in the direction of the gap 33, and bringing it into contact with the conductor Lci.

一方、R1−Rnは前記縦方向の導体Lc1〜LCnの
隣シ合う導体相互間に接続された抵抗群であ)、抵抗R
1の一端側には抵抗R6が接続され、さらに両端の抵抗
R8l Rn、は各対応して可変抵抗VR1,VB2を
介して切換リレー接点21゜220第1接点(たとえば
ブレーク接点)側すに接続されている。また、R1′〜
R’−1は前記横方向の導体LR1〜LRnの隣)合う
導体相互間に接iされた抵抗群であシ、抵抗R1′の一
端側には抵抗R6′が接続され、さらに両端の抵抗R6
′。
On the other hand, R1-Rn is a resistor group connected between adjacent conductors of the vertical conductors Lc1 to LCn), and a resistor R
A resistor R6 is connected to one end of the switch 1, and resistors R8l and Rn at both ends are connected to the switching relay contact 21°220 first contact (for example, break contact) through corresponding variable resistors VR1 and VB2. has been done. Also, R1'~
R'-1 is a resistor group connected between adjacent conductors of the horizontal conductors LR1 to LRn, and a resistor R6' is connected to one end of the resistor R1', and a resistor R6' is connected to one end of the resistor R1'; R6
'.

Rrl′−1は各対応して可変抵抗VR,’ 、 VR
2’を介し6− て前記リレー接点21.22の第2接点(たとえばメー
ク接点)側mに接続されている。そして、上記リレー接
点21の可動接点Cには定電圧(たとえば5v)が印加
されており、リレー接点22の可動接点Cは接地されて
いる。さらに、前述の直列接続された可変抵抗VR,、
抵抗Ro〜Rn、l可変抵抗■R可変抵抗−R2群中え
ば可変抵抗VB、1と抵抗R8との接続点は切換リレー
接点23の第2接点側mに接続されている。同様に、前
述の直列接続された可変抵抗VR1’ 、抵抗R6′〜
Rn’、 、可変抵抗vR2′群中の一点、たとえば可
変抵抗VR1’と抵抗R6′との接続点は上記切換リレ
ー接点23の第1接点側すに接続されている。そして、
このリレー接点23の可動接点CはA / D変換器2
4の入力端に接続され、このA / D変換器24の出
力データは入力インタ7エース25を介してマイクロコ
ンピュータの中央処理装置(CPU )に取り込1れる
。また、前記キーマトリクスポード2oの交叉部押圧時
K CPUに上記A/D変換器24の出力データを取り
込ませるために、たとえばマイクロスイッチを内蔵した
被ンによって?−ド表面の抑圧操作を行なうものとし、
この操作時に上記マイクロスイッチがオンになるように
構成しておき、このオン信号によりCPUの前記データ
の取シ込みタイミングを制御するようにしている。そし
て、CPUは上記データの取り込み後に前記リレー接点
21,22.23をブレーク側すからメーク側mに切換
えるだめの制御出力を発生し、゛この後のh/6変換器
24の出力データを再び取シ込んだのち、上記制御出力
を中断してリレー接点21,22.23を元のブレーク
側すに復帰させる。26は出力インタフェース、27は
リレー駆動回路であって前記リレー接点21゜22.2
3を切換えるためのものである。そして、CPUは上述
したように1回のキー操作の間に2回のデータ取υ込み
を高速に行ない、この2回の取シ込みデータに基いて上
記キー操作による選択点を検出するための演算処理を行
ない、この演算結果をキーボード選択点入力データとし
て処理し、たとえば選択点にそれぞれ対応する漢字デー
タをROM(リードオンリメモリ)から読み出すもので
ある。
Rrl'-1 corresponds to variable resistors VR,', VR
2' and 6- are connected to the second contact (for example, make contact) side m of the relay contacts 21 and 22. A constant voltage (for example, 5V) is applied to the movable contact C of the relay contact 21, and the movable contact C of the relay contact 22 is grounded. Furthermore, the aforementioned series-connected variable resistors VR,
Resistors Ro to Rn, l variable resistor (1) R variable resistor - The connection point between the variable resistor VB, 1 and the resistor R8 in the R2 group is connected to the second contact side m of the switching relay contact 23. Similarly, the variable resistor VR1' and the resistor R6' to
Rn', one point in the group of variable resistors vR2', for example the connection point between variable resistor VR1' and resistor R6', is connected to the first contact side of the switching relay contact 23. and,
The movable contact C of this relay contact 23 is connected to the A/D converter 2
The output data of this A/D converter 24 is input to the central processing unit (CPU) of the microcomputer via the input interface 25. Also, in order to cause the K CPU to take in the output data of the A/D converter 24 when the intersection of the key matrix board 2o is pressed, for example, a cover having a built-in microswitch is used. - Suppression operation on the surface of the board shall be performed,
The microswitch is configured to be turned on at the time of this operation, and the data acquisition timing of the CPU is controlled by this on signal. After the above data is taken in, the CPU generates a control output to switch the relay contacts 21, 22, and 23 from the break side to the make side m, and then outputs the subsequent output data of the h/6 converter 24 again. After the input, the control output is interrupted and the relay contacts 21, 22, 23 are returned to the original break side. 26 is an output interface, 27 is a relay drive circuit, and the relay contact 21°22.2
This is for switching between 3 and 3. Then, as described above, the CPU performs two data imports at high speed during one key operation, and based on these two import data, the CPU performs a process for detecting the selected point by the key operation. Arithmetic processing is performed, and the result of the arithmetic operation is processed as keyboard selection point input data, and, for example, kanji data corresponding to each selection point is read from a ROM (read only memory).

上記構成のキーボード入力回路においては、キーマトリ
クスが−ド20のある選択点Xiiを選択操作したとき
、先ず上記選択点X目に対応する直列抵抗群(VR,〜
vR2)中の分圧電圧が直列抵抗群(VR4’〜vR2
′)の一部および前記リレー接点23のブレーク接点側
すを経てA/D変換器24に導かれてA/D変換され、
この変換データが入力インタフェース25を経テcpu
に取り込まれる。次に、リレー接点21 、22゜23
が同時に切如換えられ、前記選択点X目に対応する直列
抵抗群(VR,’〜vR2′)中の分圧電圧が直列抵抗
群(VR1〜VR2)の一部および前記リレー接点23
のメーク接点側mを経てに勺変換器24に導かれてA/
D変換され、この変換データが入力インタフェース25
を経てCPUKID込まれる。そして、CPUは取シ込
んだ2回の変換データの組み合わせに基いて選択点=9
− Xi+ ’c #出する。
In the keyboard input circuit configured as described above, when the key matrix selects a certain selection point Xii of the - code 20, first the series resistance group (VR, . . .
The divided voltage in the series resistance group (VR4'~vR2)
') and the break contact side of the relay contact 23, the signal is led to the A/D converter 24, where it is A/D converted,
This converted data passes through the input interface 25 to the CPU.
be taken in. Next, relay contacts 21, 22゜23
are switched at the same time, and the divided voltage in the series resistance group (VR,'~vR2') corresponding to the selection point X becomes a part of the series resistance group (VR1~VR2) and the relay contact 23.
A/
This converted data is input to the input interface 25.
CPUKID is entered through . Then, the CPU selects a selection point = 9 based on the combination of the imported two conversion data.
- Xi+ 'c # Issue.

なお、キーマトリクスポード20の縦方向導体、横方向
導体がそれぞれたとえば256本づつ、しだがって選択
点が256 X 256 = 65536個の場合、A
/D変換器24として8ビツト出力のもので入力電圧レ
ベルを256種のデジタル値に変換できる。そして、最
近ではモノリシックな安価なA/D変換器を簡単に入手
でき、しかも8ビット程度のA/D変換器として極めて
安定な性能を持つものを利用できるので好都合である。
Note that if the number of vertical conductors and horizontal conductors of the key matrix node 20 is, for example, 256 each, and therefore the number of selection points is 256 x 256 = 65536, then A
The /D converter 24 has an 8-bit output and can convert the input voltage level into 256 types of digital values. Nowadays, monolithic, inexpensive A/D converters can be easily obtained, and it is advantageous that an 8-bit A/D converter with extremely stable performance can be used.

上述したようなキーボード入力回路によれば、キーマト
リクスポードの導体数とほぼ同数の抵抗と、3個のリレ
ー接点と、1個のA/D変換器とによって選択点に対応
したデジタル信号を得ることができ、従来必要としたエ
ンコーダなどのデジタル回路に比べて構成が簡単であシ
、特にキーマトリクスポードの選択点数が多いほど構成
の簡略化の効果が太きい。
According to the keyboard input circuit as described above, a digital signal corresponding to a selected point is obtained using approximately the same number of resistors as the number of conductors of the key matrix node, three relay contacts, and one A/D converter. The structure is simpler than that of a digital circuit such as an encoder that is required in the past, and the effect of simplifying the structure is particularly great as the number of selected points of the key matrix node increases.

なお、本発明は上記実施例に限られるものではなく、前
記リレー接点21,22.23に代10− えて他の切換回路を用いてもよい。
It should be noted that the present invention is not limited to the above embodiment, and other switching circuits may be used in place of the relay contacts 21, 22, and 23.

〔発明の効果〕〔Effect of the invention〕

上述したように本発明のキーボード入力回路によれば、
キーマトリクスポードの選択点数が多い場合でもキー操
作によシ選択された選択点を簡単な回路によシ検出でき
、日本語ワードプロセッサの漢字入カキ−が一ドなどに
適用する場合に極めて有効である。
As described above, according to the keyboard input circuit of the present invention,
Even when there are a large number of selection points in the key matrix, the selection points selected by key operation can be detected using a simple circuit, and this is extremely effective when applying the kanji input key of a Japanese word processor to one card, etc. be.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はキーマトリクスが一ドの選択点を説明するため
に示す図、第2図は本発明に係るキーが−ド入力回路の
一実施例を示す構成説明図、第3図は第2図のキーデー
トの一例を部分的に示す断面図である。 LR1〜LRn、Lo1〜Lcn・・・導体、Ro−R
n−4゜Ro′〜Rn−1・・・抵抗、20・・・キー
マトリクスポード、21,22.23・・・リレー接点
、24・・・A / D変換器。 第1図
FIG. 1 is a diagram for explaining the selection point of one key matrix, FIG. 2 is a configuration explanatory diagram showing one embodiment of the key matrix input circuit according to the present invention, and FIG. 3 is a diagram showing the selection point of one key matrix. It is a sectional view partially showing an example of the key date of a figure. LR1~LRn, Lo1~Lcn...Conductor, Ro-R
n-4゜Ro'~Rn-1...Resistor, 20...Key matrix port, 21, 22.23...Relay contact, 24...A/D converter. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 縦方向の複数の導体および横方向の複数の導体がマ) 
IJクス状に配置されると共に通常は互いに絶縁されて
おシ、マトリクスの交叉部がキー選択点に対応し、キー
操作された交叉部の導体相互が接触するキーマトリクス
ポードと、このキーマトリクスデートの前記縦方向の各
導体間にそれぞれ接続された抵抗群を有し、両端間に定
電圧が印加されたときに前記縦方向の各導体に相異なる
電圧を与える第1の抵抗群と、前記キーマトリクスデー
トの横方向の各導体間にそれぞれ接続された抵抗群を有
し、両端間に定電圧が印加されたときに前記横方向の各
導体に相異なる電圧を与える第2の抵抗群と、前記キー
マトリクスボードに対する1回のキー操作の間に上記第
1の抵抗群または第2の抵抗群に対する前記定電圧の印
加を切シ換えると共に上記各抵抗群のうち上記定電圧が
印加されていない方の抵抗群の一点の電圧を導き出す切
換回路と、この切換回路により1回のキー操作当り2回
導き出された電圧をそれぞれデジタル変換するA/D変
換器と、このA/D変換器の出力データに基いてキー選
択点を検出する処理手段と、前記切換回路を切換制御す
る制御手段とを具備することを特徴とするキーボード入
力回路。
Multiple conductors in the vertical direction and multiple conductors in the horizontal direction
A key matrix node which is arranged in an IJ box shape and is usually insulated from each other, the intersection of the matrices corresponds to the key selection point, and the conductors of the intersection where the key is operated are in contact with each other, and this key matrix date. a first resistor group each having a resistor group connected between each of the vertical conductors of the first resistor group and applying a different voltage to each of the vertical conductors when a constant voltage is applied between both ends; a second resistor group having a resistor group connected between each horizontal conductor of the key matrix date, and applying a different voltage to each horizontal conductor when a constant voltage is applied between both ends; , switching the application of the constant voltage to the first resistor group or the second resistor group during one key operation on the key matrix board, and switching the application of the constant voltage to the first resistor group or the second resistor group; A switching circuit that derives the voltage at one point of the resistor group that does not exist, an A/D converter that digitally converts the voltage derived twice per one key operation by this switching circuit, and this A/D converter. A keyboard input circuit comprising processing means for detecting a key selection point based on output data, and control means for controlling switching of the switching circuit.
JP57144466A 1982-08-20 1982-08-20 Keyboard input circuit Pending JPS5935226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57144466A JPS5935226A (en) 1982-08-20 1982-08-20 Keyboard input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57144466A JPS5935226A (en) 1982-08-20 1982-08-20 Keyboard input circuit

Publications (1)

Publication Number Publication Date
JPS5935226A true JPS5935226A (en) 1984-02-25

Family

ID=15362927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57144466A Pending JPS5935226A (en) 1982-08-20 1982-08-20 Keyboard input circuit

Country Status (1)

Country Link
JP (1) JPS5935226A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995642A (en) * 1982-10-27 1984-06-01 ポリテル・コ−ポレ−シヨン Multikey type keyboard for inputting data into computer
US5057836A (en) * 1988-01-22 1991-10-15 Kabushiki Kaisha Toshiba Data input apparatus having a microcomputer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995642A (en) * 1982-10-27 1984-06-01 ポリテル・コ−ポレ−シヨン Multikey type keyboard for inputting data into computer
US5057836A (en) * 1988-01-22 1991-10-15 Kabushiki Kaisha Toshiba Data input apparatus having a microcomputer

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