JPS6354681A - Picture display control device - Google Patents

Abstract

PURPOSE:To enable a picture editing at a high speed even if the display picture is a large scale by storing the address number of an address table given every display block in a mapping memory and storing a pair of address specifying the picture data of a picture every the address number in the address table. CONSTITUTION:The area of a memory address Z corresponding to the respective display sections on the mapping memory 8 is made to store the address number of the address table 7 storing the position information (horizontal address E and vertical address F) of the picture data in a picture memory 2 displayed on a display area. And the picture memory address G of the picture memory 2 is formed based on the scanning address (horizontal scanning address B and vertical scanning address C) and the position information. Thus the picture edition is optionally executed at a high speed and on a multi window display, for example, in case of scrolling the display data of the display section, an operator has only to change the contents of the address '0' of the address table 7.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to control when writing/reading data to/from an image memory, and particularly relates to an image display control device that can easily and quickly edit displayed images.

(Prior art) When displaying an image on a display unit such as a CRT, it usually has a function of writing data of the image to be displayed (image data) into an image memory, reading out the written data, and supplying it to the display unit. An image display control device is used.

In image display control devices that have been widely used in the past, there is a one-to-one correspondence between the display screen of the display unit and the image memory that stores image data, and the addresses of the display screen and image memory are fixedly determined. It is being Therefore, screen editing such as changing or moving the display screen is performed by rewriting image data in the image memory.

In recent years, in response to demands for faster and more sophisticated screen editing, various image display control devices have been proposed that employ new control methods in place of the above-mentioned control methods. This can be broadly classified into the following two methods.

■ Pixel data group in image memory A method to speed up.

■ By manipulating the display address of the image memory,
A method to speed up screen editing.

The methods according to the first classification directly manipulate image data in any case, so they handle a large amount of data, and even if the writing speed is increased, no dramatic speed improvement can be expected.

On the other hand, the method according to the second classification solves the problems of the method according to the first classification, and by manipulating the address correspondence between the display screen and image data for each block (in particular, called display block), This allows for faster screen operations.

FIG. 4 shows a block diagram of a conventional image display control device that employs the method according to the second classification.

As shown in the figure, this device includes a display unit 1 that displays a screen;
an image memory 2 that stores image data of images to be displayed;
A write control unit 3 writes image data to this image memory 2
, a display control unit for sequentially reading out pixel data (image data is composed of a group of pixel data) from the image memory 2 to the display unit 1; It is composed of a shift register 5 which converts the video signal into a video signal and supplies it to the display section 1, and a mapping memory 6 which arbitrarily sets the address for reading pixel data from the image memory 2.

As shown in FIG. 5, this mapping memory 6 stores the image area at an address Z on the mapping memory 6 corresponding to each of a plurality of display sections Y obtained by equally dividing the display screen X of the display section 1. Address data on the image memory 2 in which a group of pixel data (image data) to be displayed is stored is stored, and thereby a desired image is displayed on the display section Y of the screen X from the corresponding address in the image memory 2. This is for reading data. . For example, display section Y I r Y
In the areas on the mapping memory 6 corresponding to Y2 and Y3, respectively, there are image memories 201 in which image data to be displayed is stored, image memories consisting of horizontal addresses and image memory vertical addresses. Addresses (2,12), (3,4) and (6,7
) is stored.

In the example shown in FIG. 5, one display section Y has one pixel, but as described in the above literature, one display section Y is composed of a plurality of pixels, and this It is also possible to give an address 2 for each display section configured in this way. In any case, the mapping memory 6 stores an image memory address for each pixel.

(Problems to be Solved by the Invention) However, as described above, in the conventional device described above, it is necessary to write the image memory addresses of the different image memories 2 into the display sections of the Matsubindame Shichiri 6 corresponding to the display screen to be edited. Therefore, there is a problem in that the calculation processing and rewriting processing increase in proportion to the size of the screen to be edited, and as a result, speeding up is hindered.

Therefore, the present invention solves the above-mentioned problem that processing increases in proportion to the size of the screen to be edited, which hinders speedup.
It is an object of the present invention to provide a display screen control device capable of processing large-scale editing processing at high speed with simple control.

(Means for Solving the Problems) The present invention includes a display section, an image memory, an address table, a mapping memory, a display control section, an image memory address generation section, and a supply section.

The display section displays images.

The image memory stores image data of images.

The address table stores position information (address) on the image memory of image data of an image to be displayed on the display section for each display area (display block) on the display screen of the display section.

The mapping memory stores address numbers of an address table that stores position information for each display area on a plurality of display sections formed by equally dividing the display screen.

The display control section outputs a memory address of the mapping memory and a scanning address corresponding to scanning of the display section.

The image memory address generation section (for example, composed of an adder) generates an image memory address of the image memory from the position information read from the address table and the scanning address output from the display control section.

The supply section (for example, composed of a shift register) supplies the image data read from the image memory to the display section according to the image memory address supplied from the image memory address generation section.

(Operation) The above position information consists of an address value of an image memory address. The horizontal address and vertical address constituting this position information are assumed to be E and F, respectively.

Also, the image memory address is G, and the image memory horizontal address and image memory vertical address are H and I, respectively.
shall be. Furthermore, the scan address consists of a horizontal scan address and a vertical scan address, which are designated as B and C, respectively. Further, let Z be the memory address of the mapping memory, and D be the address number of the address table.

In the read operation, the display control section outputs a memory address Z, a horizontal scanning address B, and a vertical scanning address C. The mapping memory that received memory address 2 outputs the address number stored here to the address table. The address table that receives the address number outputs the horizontal address E and vertical address F stored here. The image memory address generation unit generates an image memory horizontal address H from the horizontal address E and the horizontal scanning address B (for example, by adding E and B),
On the other hand, an image memory vertical address E is generated from the vertical address F and the vertical scanning address C (for example, F and C are added). The supply section reads out the image data stored in the area specified by the image memory address G obtained in this way and supplies it to the display section.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

In the figure, the same elements as those shown in FIG. 4 are given the same reference numerals. The address table 7 is provided between the mapping memory 8 and the image memory 2, and includes a set of horizontal addresses E and vertical addresses that specify the image data of the image to be displayed for each display block stored in the image memory 2. Store address F. The mapping memory 8 stores address numbers of the address table 7 for each display block.

FIG. 2 shows the display control unit 4 and mapping memory 8 in FIG.
, a block diagram showing a detailed configuration example of an address table 7 and an image memory 2. FIG. The display control unit 4 stores a memory address 2 corresponding to a display section formed by equally dividing the display screen of the display unit 1, and a horizontal scanning address B that increases due to horizontal scanning.
, and a vertical scanning address C which increases due to vertical scanning are repeatedly generated. Mapping memory 8 is memory address 2
The address number of the address table 7 stored in the area is output. The address table 7 outputs the horizontal address E and vertical address F stored in the area specified by the address number.

Adder 9 adds horizontal address E and horizontal scanning address B. Adder 10 adds vertical address F and vertical scanning address C. The output of the adder 9 is the image memory horizontal address H (=B+E), and the output of the adder 10 is the image memory vertical address E (=C+F), which are given to the image memory 2 as the image memory address G. .

Next, the operation of this embodiment will be explained with reference to FIG. In the operation described below, the number of vertical scanning lines in one display section is 5, as shown in Figure 3(,), and one screen is of a size that can display 8 sections in the horizontal direction and 5 sections in the vertical direction. do. Further, it is assumed that the display screen of the display unit 1 is composed of two display blocks, that is, display block 0 and display block 1. Furthermore, it is assumed that image data Do to be displayed on display block 0 and image data D1 to be displayed on display block 1 are stored on image memory 2 as shown.

Prior to reading image data from the image memory 2, the data shown in the figure is stored in the mapping memory 8 and address table 7. That is, address number D=0 of the address table 7 is stored in each display section of display block 0 of the manping memory 8, and address number D=1 is stored in each display section of display block 1. That is, the address number of the address table 7 assigned to each display block is stored. Also, address table 7
The horizontal address E and vertical address F are (E, F) in the area specified by the address numbers D=O and D=1, respectively.
)=(5,0) and (E, F)=(3,6). These horizontal address E and vertical address F are image memory horizontal address H (=B+B) and image memory vertical address I, which are obtained by adding them to horizontal scanning address B and vertical scanning address C, respectively.
The image data of the area specified by (=C+F) is displayed on the desired display screen of the display unit 1, in other words, the mapping memory 8
is determined so as to be located on a desired area. In this example, when one screen is constructed on the pixel memory 2 based on the position of the display block O on the mapping memory 8, the broken line R
This is the area indicated by O. Therefore, horizontal scanning address B is 0
0, the image memory horizontal address H is H=5, and when the vertical scanning address C is C=00, the image memory vertical address E is I=O. Set. Similarly, if one screen is constructed on the image memory 2 using the position of the display block l on the mapping memory 8 as a reference, it will become an area indicated by a broken line R1.

Therefore, when the horizontal scanning address B is B=O, the image memory horizontal address H is H=5, and when the vertical scanning address C is C=5 (vertical scanning direction of display block 1 on the mapping memory 8). The first part of the image memory is scanned with a vertical scan of C=5), and the image memory vertical address is scanned with a vertical scan of C=1.
1, horizontal address E=3, vertical address F=
6 is set.

When reading image data DO of display block 0 from image memory 2, display control section 4 outputs memory address z=1, horizontal scanning address B=1, and vertical scanning address number O. The mapping memory 8 outputs the address number D=0 stored in the area Z=1. address table 7
supplies the horizontal address E=5 and the vertical address F=0 stored in the area specified by D=O output from the manping memory 8 to the adders 9 and 10. Therefore, adder 9 outputs H=6, and adder 10 outputs I=
O is output, and image memory address G= is output to image memory 2.
(6,0) is supplied. In response to this, the image data Do of display block 0 stored in the area G=(6,0) is read from the image memory 2 and stored in the shift reno star 5.

Therefore, (
The image data at the image memory address G=(6,0) is displayed in the area B, C)=(1,0). Thereafter, the image data Do is read out in the same manner.

Next, image data D of display block 1 is transferred from image memory 2.
When reading 1, the display controller 4 reads the memory address Z=1.
2, horizontal scan address B=4, vertical scan address 0 address C=
Outputs 5. The mapping memory 8 stores the address number D= of the address table 7 stored in the area Z=12.
Outputs 1.

Address table 7 receiving D=1 outputs horizontal address E=3 and vertical address p=5 stored therein to adders 9 and 10, respectively.

Therefore, adder 9 outputs image memory horizontal address H=7, and adder 10 outputs image memory vertical address I=11. In response to this, the image data D1 of the display block l stored in the area specified by the image memory address G=(7,11) is read from the image memory 2,
It is stored in the shift reno star 5. Therefore, Fig. 3(b)
(B, C) = (4, 5) on the display screen of display unit 1 shown in
The image data at the image memory address G=(7', 11) is displayed in the area. Thereafter, the image data D1 is read out in the same manner, and one display screen shown in FIG. 3(b) is formed on the display section 1.

In this way, the position information (horizontal address E, vertical address F) of the image data in the image memory 2 to be displayed in the display area is stored in the memory address 2.0 area corresponding to each display section on the mapping memory 8. The address number of the address table 7 is stored, and the image memory address G of the image memory 2 is formed based on the scanning address (horizontal scanning address B, vertical scanning address C) and position information.
Screen editing can be done arbitrarily and quickly.

For example, in a multi-window display, when scrolling the display data of display sections 1, 2, 3, 9, and 11 in FIG. 3(a), the contents of address 0 of the address table 7 may be changed. For example, changing the horizontal address E allows horizontal scrolling within the window. −
For example, if the horizontal address E of the address number D=O is set to 6, the scroll will be scrolled one step to the right. Furthermore, by changing the vertical address F, vertical scrolling within the window becomes possible. - As an example, address number D=00
If the vertical address F is set to 1, it will scroll down one position. On the other hand, in the normal display, the image data displayed in display sections 1.2, 3, 9, 10.11 in FIG. scroll), select display section 0 of mapping memory 8.
, 1, 2° 8.9.10 address number D=O may be stored in the area.

(Effects of the Invention) As explained above, according to the present invention, the mapping memory stores the address number of the address table given to each display block, and the address table specifies the image data (display content) of the image. Since one set of addresses is stored for each address number, there is no need to store the image memory address of the image memory in the mapping memory as in conventional devices. Therefore, it is possible to eliminate the complexity of calculation processing and rewriting processing caused by writing the image memory address into the mapping memory. As a result, even if the size of the display screen to be edited is large, the screen can be edited at high speed. Furthermore, in the present invention, since the mapping memory stores the address number of the address table given to each display block, when editing the screen on the mapping memory, it is not necessary to write the same address number in the desired display section. This allows screen editing to be performed arbitrarily and easily. Moreover, the display contents displayed in the display block can be easily and easily changed by appropriately rewriting the addresses stored in the address table. Thereby, the processing speed of multi-window processing in which the screen is divided into arbitrary areas and the screens of different types are displayed as one display screen can be dramatically improved.

[Brief Description of the Drawings] Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a block diagram of a detailed configuration example of the main parts in this embodiment, and Fig. 3 is an operation of this embodiment. FIG. 4 is a block diagram of a conventional image display control device, and FIG. 5 is a diagram for explaining the operation of the conventional image display control device. DESCRIPTION OF SYMBOLS 1... Display part, 2... Image memory, 3... Write control part, 4... Display control part, 5... Shift register, 6... Mapping memory, 7... Address Table, 8... Mapping memory, 9, 10... Adder. Patent issuer Oki Electric Industry Co., Ltd. Patent application agent Patent attorney Megumi Yamamoto Elephant display '4' l The weight of the wholesale fold is 1.
Figure 5 of the sun and moon

Claims (1)

[Claims] A display unit that displays an image, an image memory that stores image data of the image, and position information on the image memory of the image data of the image displayed on the display unit,
An address table is stored for each display area on the display screen of the display unit, and address numbers of the address table are stored on a plurality of display sections formed by equally dividing the display screen, and position information for each display area is stored. A mapping memory, a display control unit that outputs a memory address of the mapping memory and a scan address corresponding to the scan of the display unit, and an image is generated from the position information read from the address table and the scan address output from the display control unit. An image memory address generation unit that generates an image memory address of the memory; and a supply unit that supplies image data read from the image memory to the display unit according to the image memory address supplied from the image memory address generation unit. An image display control device comprising: