JPS635290Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to an amplifier circuit, and provides an amplifier circuit in which mutual conductance can be determined by the ratio of resistance values, and the influence of errors in the mutual conductance and variations in elements can be reduced. It is.

Conventionally, there has been a circuit of this type as shown in FIG. In the figure, the gate of FETQ ₁ is the first electrode, the connection point between the source of FETQ ₁ and the collector of transistor Q ₂ is the second electrode, and the connection point between the drain of FETQ ₁ and the base of transistor Q ₂ is the resistor R ₁ . If the point connected to the emitter of transistor Q ₂ is the third electrode, this circuit can be viewed as one FET element with the first electrode as the gate, the second electrode as the source, and the third electrode as the drain. can.

Therefore, this prior art will be explained using the equivalent circuit shown in FIG. In the figure, the signal V _gs is applied to the gate of FETQ ₁ .
When input, the drain current becomes Gm・V _gs . (Gm is the transconductance of FETQ ₁ ) The drain current is the resistance R ₁ and the transistor
The current is shunted by the input impedance hei of Q ₂ , and the base current ib of Q ₂ becomes GmV _gs・R ₁ / (R ₁ + hie),
If the current amplification factor of transistor Q ₂ is hfe, the collector current ic is Gm・V _gs・hfe・R ₁ / (R ₁ + hie)
becomes.

Therefore, from the third electrode to the second electrode, Gm・
Since a current of (1+hfe·R ₁ /(R ₁ +hie))·V _gs flows, the circuit shown in FIG. 2 can be considered equivalent to the circuit shown in FIG. 3. As mentioned above,
Using this method, the mutual conductance Gm of FETQ ₁ can be multiplied by 1+hfe·R ₁ /(R ₁ +hie).

However, in the above amplifier circuit, the mutual conductance Gm of FETQ ₁ itself, the input impedance hie of transistor Q ₂ , the current amplification factor hfe, and the resistor R ₁ are related as elements that determine the mutual conductance. impedance
hie and current amplification factor hfe vary widely depending on the transistor, and the transconductance of the FET
The drawback was that Gm could not always be multiplied by a certain number.

This invention was made in view of the above points,
The present invention provides an amplifier circuit that configures a current mirror circuit and can always set the mutual conductance Gm of FETQ ₁ to a desired multiple.

An embodiment of the present invention will be described below with reference to FIG. In the figure, the gate of FETQ ₁ is the first electrode,
Connect the connection point between the source of FETQ ₁ and the collector of transistor Q ₂ to the second electrode, connect the drain of FETQ ₁ to the base of transistor Q ₂ and the base of Q ₃ , and connect the emitter of transistor Q ₃ to the emitter of transistor Q ₂ . , and the points connected to each other via resistors R ₁ and R ₂ are defined as third electrodes.

In this circuit, transistors Q ₂ and Q ₃
FIG. 5 shows an equivalent circuit assuming that the current amplification factor hfe is sufficiently larger than 1.

In the figure, when a signal V _gs is input to the gate of FETQ ₁ , the drain current becomes Gm·V _gs .

At this time, the drain current Gm・V _gs and the collector current IC ₁ of the transistor Q ₃ are equal, and Gm・V _gs
= ic ₁ . Further, the transistors Q ₂ and Q ₃ are connected in a current mirror, and the collector current ic ₂ of the transistor Q ₂ becomes ic ₂ =R ₁ /R ₂ ic ₁ due to the resistors R ₁ and R ₂ .

Therefore, from the third electrode to the second electrode, Gm・
Since a current of V _gs R ₁ +R ₂ /R ₂ flows, it becomes equivalent to the circuit shown in FIG.

Next, an example of an amplifier circuit using this configuration will be shown. As shown in FIG. 7, a resistor is connected to the third electrode.
_R4 is connected, the other end is used as a fourth electrode, and the second electrode is grounded via a resistor _R3 .

The voltage gain A _V of this amplifier circuit is the resistance R ₁ ,
Determined by R ₂ , R ₃ , R ₄ and Gm, A _V = R ₄ / (R ₃ +
R ₂ /(R ₁ +R ₂ )Gm). The mutual conductance Gm of the FET has non-linearity, but by using the configuration of the present invention, the value of R ₂ / (R ₁ + R ₂ ) Gm becomes small, so the value of the resistor R ₃ is set large. It is possible to suppress the influence of nonlinearity of Gm.

Further, in the above embodiment, a case was explained in which a FET was used. However, the FET may be a transistor, or the polarity of each active element may be reversed, and the same effect as in the above embodiment may be obtained. play.

Furthermore, FIG. 8 shows an example of the application of the present invention. In the figure, the circuit for transmitting the input signal to the subsequent stage is configured as a current mirror, and the base of transistor _Q4 is connected to the base of the current mirror circuit for increasing the transconductance Gm in the previous stage, thereby creating a non-inverting amplifier. It consists of

FIG. 9 shows another embodiment of the invention. In the figure, the configuration of the present invention is used in a differential amplifier, and by the ratio of resistors R ₁ and R ₂ and R ₆ and R ₇ ,
The increase factor of the FET's transconductance Gm can be determined.

Note that resistors R ₃ and R ₈ are used in order to maintain a balanced balance between the left and right mutual conductances of the differential circuit and to improve the linearity of the transfer characteristics.

As described above, according to the present invention, in order to increase mutual conductance Gm, a current mirror circuit is used and the increase multiple can be determined only by the ratio of resistors R ₁ and R ₂ . Errors can be suppressed, and the influence of variations in elements can be reduced.

Further, the increase multiple does not change depending on the input signal level.

[Brief explanation of drawings]

FIG. 1 shows a conventional amplifier circuit, FIGS. 2 and 3 show equivalent circuits of the conventional amplifier circuit, FIG. 4 shows an embodiment of the present invention, and FIGS. FIG. 6 is a diagram showing an equivalent circuit of the amplifier circuit of the present invention, FIG. 7 is a diagram showing an embodiment of an amplifier configured using the configuration of the present invention, and FIGS. 8 and 9 are diagrams showing an equivalent circuit of the amplifier circuit of the present invention. It is a figure which shows another Example of.

Claims (1)

[Scope of utility model registration request] The source of the FET and the collector of the first transistor are connected, and the drain of the FET and the first transistor are connected.
The base of the transistor and the base of the second transistor are connected, the collector of the second transistor and the drain of the FET are connected, and the emitter of the first transistor and the emitter of the second transistor are connected to each other. An amplifier circuit characterized in that the amplifier circuit is connected through one resistor and a second resistor.