JPS6132842B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier having a cascode-connected input circuit.
The purpose is to improve noise, distortion, input capacitance, and tolerance characteristics by bootstrapping with a simple circuit.

FIG. 1 shows a conventionally known amplifier with cascode-connected input circuits. In Fig. 1, 1 is an amplifier input terminal, 2 and 3 are field effect transistors (hereinafter abbreviated as FET) that constitute a differential amplifier, 4 is a constant current source, 5 and 6 are cascode transistors, and 7 and 8 are transistors. 5 and 6 are resistors that constitute the base bias circuit, 9 to 12 are transistors and resistors that constitute the current mirror circuit, 13 is a voltage amplification transistor, 14 is a constant current source, 15 and 16 are feedback dividing circuits, and 17 is a This is the amplifier output terminal.

Next, the operation of the amplifier shown in FIG. 1 will be explained. First, the input voltage applied to terminal 1 is amplified by differential amplifiers 2 and 3, and the drain output current of FET 2 is passed through transistor 5 to transistor 1.
Injected into the base of 3. On the other hand, the drain output current of FET3 passes through transistor 6, is reversed by current mirror circuits 9 to 12, and is returned to transistor 13.
injected into the base of. These drain output currents are then amplified by the transistor 13, and an amplifier output voltage appears at its collector. This output voltage is divided by dividing circuits 15 and 16 and fed back to the gate of FET3. Therefore, the voltage gain of this amplifier is the reciprocal of the division ratio of the division circuits 15 and 16.

As shown in Figure 1, making the input circuit cascode connected suppresses the increase in input capacitance due to the Miller effect of FET2, improves the frequency characteristics, and
This is effective for voltage resistance compensation, etc.

However, regarding the low-frequency noise generated from FETs 2 and 3, the lower the drain-source voltage, the lower the low-frequency noise. will be more advantageous. However, when the emitter voltages of the transistors 5 and 6 are set low, there is a problem that the drain-source voltages of the FETs 2 and 3 become saturated when a large input voltage is applied. There is also the problem that distortion increases even if it does not reach saturation.

As a way to solve these problems, reduce low-frequency noise, and further reduce the input capacitance to improve frequency characteristics, bootstrap cascode circuits as shown in Figures 2 and 3 have already been developed. It has been announced. In Figures 2 and 3,
1 to 17 correspond to the same numbers in Figure 1, and 1
8, 19 are resistors and constant current sources that constitute the base bias circuit of transistors 5, 6; 20, 21;
is a cascode FET.

In both the cases shown in Figures 2 and 3, the drain voltages of FETs 2 and 3 are made to follow the input voltage by making the cascode bias voltage follow the input voltage. teeth,
The common source voltage of FETs 2 and 3 is shifted by a resistor 18 and a constant current source 19, and is supplied to the bases of transistors 5 and 6. Therefore, FET2,3
(that is, the emitters of transistors 5 and 6) follow the input voltage, and the drain-source voltage of FETs 2 and 3 is determined by the voltage shift circuits 18 and 1.
9 and the base-emitter voltage of transistor 5.6 are maintained at a constant voltage. In addition, in the case of Fig. 3, the cascode FET20,
The gate of FET 21 is directly connected to the common source of FETs 2 and 3, and the drain voltage of FETs 2 and 3, that is, the source voltage of FETs 20 and 21, follows the input voltage, and the drain-source voltage of FETs 2 and 3 is It is maintained at a constant voltage determined by the gate-source voltage of FETs 20 and 21.

By making the drain voltages of FETs 2 and 3 follow the input as shown in Figures 2 and 3,
Since the increase in input capacitance due to the drain-to-gate capacitance of FETs 2 and 3 can be eliminated, frequency characteristics are further improved, and the drain-to-source voltage of FETs 2 and 3 is set low to reduce low-frequency noise. Even in this case, there is an effect that there is no decrease in allowable input and no increase in distortion.

However, in the case of FIG. 2, it is necessary to separately prepare a constant current source for base bias of the cascode transistors 5 and 6. If this constant current source is replaced with something with finite impedance, such as a resistor, the synchronous signal rejection rate of the differential amplifiers 2 and 3 will deteriorate, resulting in an increase in distortion of the amplifier. The disadvantage is that it requires the use of a complete constant current source, which increases the complexity of the circuit. In addition, the current supplied to the common source of differential FETs 2 and 3 is the difference between the current of constant current source 4 and the current of constant current source 19, so the error is larger than in the case of Fig. 1. There is also the drawback of becoming.

In the case of Figure 3, it can also be used for cascode.
Since FET is used, FET with high withstand voltage is required, and FET2 and 3 are connected in cascode.
The meaning of voltage resistance compensation is diminished. Also, FET
The drain-source voltage of FET2 and 3 is
Since the gate-source voltage is 0.21, the voltage is generally quite low, and the voltage cannot be set freely. Therefore, there is a risk that the mutual conductance of FETs 2 and 3 will be considerably reduced compared to the case of normal use. Furthermore, as the source currents of the FETs 20 and 21 change, the gate-source voltage also changes slightly, so the drain voltages of the FETs 2 and 3 do not completely follow the input voltage.

The present invention provides an amplifier that solves these conventional drawbacks.

FIG. 4 shows an embodiment of the present invention. In FIG. 4, 1 to 17 correspond to the same numbers in FIG. 1, and 22 to 24 are dividing circuits for supplying bias voltages to the bases of transistors 5 and 6. In FIG.

In the circuit of FIG. 4, the AC impedance frequency characteristics of the dividing circuits 22 and 24 are
By setting it to be similar to the AC impedance frequency characteristics of 16 to 16 (a relationship in which the frequency characteristics are specific even though the impedance values are different), the base voltage of transistors 5 and 6 is
Since the gate voltage of FET 3 always follows the input voltage, the base voltages of transistors 5 and 6 follow the input voltage. Therefore, the drain voltages of FETs 2 and 3 follow the input voltage. Further, the DC value of the base bias of the transistors 5 and 6 is given by the division ratio of the resistor 24 and the parallel circuit of the resistors 23 and 22, and can therefore be freely set.

The bootstrap cascode circuit shown in FIG. 4 has a cascode bias circuit of 22 to 24
This can be realized only with a dividing circuit such as , and normally, such a dividing circuit is often composed of only a resistor and a capacitor, so a second circuit that requires a constant current source is required.
It has the advantage that it can be realized at a lower cost than the case shown in the figure. Also, compared to the case in Figure 3,
This has the advantage that the drain-source voltage of FETs 2 and 3 can be set freely.

In the above, by making the AC division ratio of the division circuits 22 and 24 (the division ratio in the frequency band in which the amplifier operates excluding the DC component) equal to the AC division ratio of the division circuits 15 to 16, the FET 2 ,3
This is a case where the drain voltage of the resistor 2 is made to follow the input voltage, but by changing this division ratio, the resistor 2
By setting the values of FETs 3 and 24 to be large so that the drain voltages of FETs 2 and 3 are higher than the input voltage, there is an advantage that the distortion of FETs 2 and 3 can be significantly improved. Regarding this point, as shown in Figures 2 and 3, FET
This could not be achieved using a method in which the drain voltages of the second and third drains could only be set to be equal to or smaller than the input voltage.

Note that the present invention has similar effects even when the input stage is not differential, when the input stage is a transistor, and when the amplifier is an AC amplifier. An example is shown in FIG. In Figure 5, 1 to 24
correspond to those with the same numbers in Figure 4, 25 is an input transistor, 26 is an emitter resistor, 27
is a coupling capacitor, and 28 is a current source.

As described above, the present invention improves noise, distortion, input capacitance, and allowable input characteristics by bootstrapping the cascode bias circuit with a simple circuit in an amplifier having a cascode-connected input circuit. This provides excellent effects such as:

[Brief explanation of the drawing]

Figures 1 to 3 are circuit diagrams showing conventional amplifiers;
FIG. 4 is a circuit diagram showing one embodiment of the invention, and FIG. 5 is a circuit diagram showing another embodiment of the invention. 1... Amplifier input terminal, 2, 25... First transistor, 5... Second transistor, 3... Third transistor, 6... Fourth transistor,
15, 16...first division circuit, 17...amplifier output end, 22-24...second division circuit.

Claims (1)

[Claims] 1. First and second transistors constituting the input stage of the amplifier, which are connected in cascode such that the collector of the first transistor is connected to the emitter of the second transistor, and the amplifier output voltage. a first dividing circuit for dividing and supplying a feedback voltage to the emitter of the first transistor; and a first dividing circuit for dividing the amplifier output voltage and supplying the feedback voltage to the emitter of the first transistor over each frequency. and a second dividing circuit for supplying a bias voltage having an amplitude equal to or greater than the amplitude of the feedback voltage supplied to the emitter of the transistor. 2. The amplifier according to claim 1, wherein at least one of the first and second transistors is a field effect transistor. 3. The amplifier according to claim 1 or 2, characterized in that the second dividing circuit is a dividing circuit having an impedance frequency characteristic similar to that of the first dividing circuit in terms of alternating current. 4 first and third transistors constituting a differential amplifier; and a second transistor whose emitters are connected to the collectors of the first and third transistors, respectively, and which are cascode-connected to the first and third transistors. , a fourth transistor, a first dividing circuit that divides the amplifier output voltage and supplies a feedback voltage to the base of the third transistor, and a first dividing circuit that divides the amplifier output voltage and supplies the second and fourth transistors. and a second dividing circuit that supplies a bias voltage having an amplitude equal to or larger than the amplitude of the feedback voltage supplied to the base of the third transistor over each frequency to the base of the third transistor. 5. The amplifier according to claim 4, wherein at least one of the first and third transistors and the second and fourth transistors is formed of a field effect transistor. 6. The amplifier according to claim 4 or 5, characterized in that the second dividing circuit uses a dividing circuit having an impedance frequency characteristic similar to that of the first dividing circuit in terms of alternating current.