JPS6352790B2 - - Google Patents

Info

Publication number
JPS6352790B2
JPS6352790B2 JP56095596A JP9559681A JPS6352790B2 JP S6352790 B2 JPS6352790 B2 JP S6352790B2 JP 56095596 A JP56095596 A JP 56095596A JP 9559681 A JP9559681 A JP 9559681A JP S6352790 B2 JPS6352790 B2 JP S6352790B2
Authority
JP
Japan
Prior art keywords
semiconductor film
forming
hall element
mask
magnetically sensitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56095596A
Other languages
Japanese (ja)
Other versions
JPS57210677A (en
Inventor
Junichi Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP56095596A priority Critical patent/JPS57210677A/en
Publication of JPS57210677A publication Critical patent/JPS57210677A/en
Publication of JPS6352790B2 publication Critical patent/JPS6352790B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/01Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Hall/Mr Elements (AREA)

Description

【発明の詳細な説明】 本発明は略十字形の感磁部を特性のバラツキの
少ない状態で量産することが可能なホール素子の
製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a Hall element that allows mass production of substantially cross-shaped magnetically sensitive parts with little variation in characteristics.

従来、ホール素子を製造する際には、まず、第
1図に示す、フエライト、ガラス、セラミツク板
等の上に不純物混入阻止のためにSiO2、Al2O3
の保護絶縁層を設けた基板1を用意し、この基板
1の一主面の全部にInSb等の半導体被膜を蒸着
により形成し、且つ結晶化のための熱処理を行
う。次に、第1図に示すような略十字形の感磁部
2を特性のバラツキがないようにフオトエツチン
グ法で形成する。次に、感磁部2の表面の酸化膜
を除去した後に、第2図に示す如く基板1の一方
の主面全部に例えばCr、Ti等から選択された材
料及びAu、Cu、Ag、Ni等から選択された電極
材料を蒸着することによつて電極金属層3を形成
する。しかる後、電極金属層3をフオトエツチン
グ法で第3図に示すように選択的除去し、感磁部
2の第1、第2、第3及び第4の電極接続部分2
a,2b,2c,2dに接続された第1、第2、
第3、及び第4の電極3a,3b,3c,3dを
形成し、ホール素子のチツプとする。
Conventionally, when manufacturing a Hall element, a protective insulating layer of SiO 2 , Al 2 O 3 , etc. was first formed on a ferrite, glass, ceramic plate, etc. to prevent impurities from entering, as shown in Figure 1. A substrate 1 is prepared, a semiconductor film such as InSb is formed on the entire main surface of the substrate 1 by vapor deposition, and heat treatment is performed for crystallization. Next, a substantially cross-shaped magnetic sensing portion 2 as shown in FIG. 1 is formed by photoetching so that there is no variation in characteristics. Next, after removing the oxide film on the surface of the magnetically sensitive part 2, as shown in FIG. The electrode metal layer 3 is formed by depositing an electrode material selected from the following. Thereafter, the electrode metal layer 3 is selectively removed by photoetching as shown in FIG.
the first, second, connected to a, 2b, 2c, 2d;
Third and fourth electrodes 3a, 3b, 3c, and 3d are formed to form a Hall element chip.

ところで、マスクを使用して第1図に示す如く
半導体材料を選択的に蒸着して十字形の感磁部2
を形成することが考えられるが、感磁部2は例え
ば縦が0.7〜1.0mm、横が0.3〜0.5mmのように極め
て小さいので、マスク蒸着で特性のバラツキの少
ない素子を量産することは困難である。従つて、
従来は精度の高いフオトエツチング法で感磁部2
を形成した。しかし、従来の製造方法では、感磁
部2及び電極3a〜3dを得るために、2回のエ
ツチング工程が必要となり、各エツチング工程に
於いて、レジスト塗布、プリベーク、露光、現
像、ポストベーク、エツチング、洗浄、レジスト
剥離、洗浄等が要求され、必然的に作業員が多し
なつた。また、フオトエツチングのパターンが同
一であつても、量産するために複数のホール素子
を同時に形成すると、半導体薄膜及び熱処理で生
じる酸化膜等にバラツキが生じ、完成したホール
素子の特性のバラツキも発生した。
By the way, a cross-shaped magnetic sensing part 2 is formed by selectively depositing a semiconductor material using a mask as shown in FIG.
However, since the magnetically sensitive part 2 is extremely small, e.g. 0.7 to 1.0 mm in length and 0.3 to 0.5 mm in width, it is difficult to mass-produce elements with little variation in characteristics by mask vapor deposition. It is. Therefore,
Conventionally, the magnetic sensitive part 2 was created using a highly accurate photoetching method.
was formed. However, in the conventional manufacturing method, two etching steps are required to obtain the magnetically sensitive portion 2 and the electrodes 3a to 3d, and each etching step includes resist coating, prebake, exposure, development, postbake, Etching, cleaning, resist stripping, cleaning, etc. were required, which inevitably required a large number of workers. Furthermore, even if the photo-etching pattern is the same, when multiple Hall elements are formed at the same time for mass production, there will be variations in the semiconductor thin film and the oxide film produced during heat treatment, resulting in variations in the characteristics of the completed Hall elements. did.

そこで、本発明の目的は、特性のバラツキが少
ないホール素子を容易に得ることが可能なホール
素子の製造方法を提供することにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a Hall element that can easily obtain a Hall element with less variation in characteristics.

上記目的を達成するための本発明は、ホール素
子を形成するために必要な半導体被膜形成領域を
含む基板の略中央領域に例えばInSb、InAs等の
半導体材料をマスクを使用して選択的に被着させ
てホール効果半導体被膜を形成する工程と、前記
半導体被膜の電極接続部分には被着させるが前記
半導体被膜の感磁部には被着させないようなマス
クを使用して例えばCr、Ti、Au、Cu、Ag、Ni
等の導電物質を選択的に被着させて独立した4つ
の引き出し電極を形成する工程と、前記半導体被
膜の必要部分と不要部分との境界部分を例えばレ
ーザビーム等による熱又は切削で線状に除去して
溝を設けることにより略十字形の感磁部を形成す
る工程と、を有することを特徴とするホール素子
の製造方法に係わるものである。
To achieve the above object, the present invention selectively applies a semiconductor material such as InSb or InAs to an approximately central region of a substrate including a semiconductor film forming region necessary for forming a Hall element using a mask. A step of forming a Hall effect semiconductor film by depositing the semiconductor film, and using a mask that deposits on the electrode connection portion of the semiconductor film but not on the magnetically sensitive part of the semiconductor film, for example, Cr, Ti, Au, Cu, Ag, Ni
A process of selectively depositing a conductive material such as the like to form four independent lead-out electrodes, and forming the boundary between the necessary and unnecessary parts of the semiconductor film into a linear shape by heating or cutting with a laser beam, etc. The present invention relates to a method for manufacturing a Hall element, comprising the steps of: forming a substantially cross-shaped magnetically sensitive portion by removing and providing a groove.

上記本発明によれば、マスクを使用して選択的
に被着層を形成する技術と、非化学的に線状に溝
を形成する技術との組合せによつてホール素子を
形成するので、フオトエツチング工程が不要とな
り、生産性を大幅に向上することが可能になる。
また溝の形成と同時にトリミングを行うことが可
能になるので、特性のバラツキが少なくなり、歩
留りを向上させることが可能になる。
According to the present invention, the Hall element is formed by a combination of a technique of selectively forming an adhesion layer using a mask and a technique of non-chemically forming linear grooves, so that photo This eliminates the need for an etching process, making it possible to significantly improve productivity.
Furthermore, since trimming can be performed at the same time as groove formation, variations in characteristics can be reduced and yield can be improved.

以下、本発明の実施例を第4図〜第7図を参照
して説明する。
Embodiments of the present invention will be described below with reference to FIGS. 4 to 7.

第7図に示すように、フエライト基板1aと保
護絶縁層1bとから成る基板1を用意し、ホール
素子を形成するために必要な半導体被膜形成領域
を含む基板1の上面4の略中央領域にマスクを使
用して第4図に示す如くInSbを選択的に蒸着し
且つ加熱することにより結晶化したホール効果半
導体被膜5を形成する。この半導体被膜5のパタ
ーンは最終的に十字形に形成する感磁部を含むよ
うな形状であればよいので、精度は殆んど要求さ
れず、基板1の中央に例えば実施例のように円形
に形成すればよい。尚量産時には複数のホール素
子を同時に形成するために独立又は共通の基板に
同時に複数の半導体被膜5を形成する。
As shown in FIG. 7, a substrate 1 consisting of a ferrite substrate 1a and a protective insulating layer 1b is prepared, and a substantially central region of the upper surface 4 of the substrate 1, which includes a semiconductor film formation region necessary for forming a Hall element, is prepared. Using a mask, InSb is selectively deposited and heated to form a crystallized Hall effect semiconductor film 5 as shown in FIG. The pattern of this semiconductor film 5 only needs to have a shape that includes a magnetically sensitive part that will ultimately be formed in a cross shape, so almost no precision is required. It should be formed as follows. In mass production, in order to simultaneously form a plurality of Hall elements, a plurality of semiconductor films 5 are simultaneously formed on independent or common substrates.

次に、マスクを使用して電極形成の導電物質と
して例えばCrとAgとを順次に蒸着し、第5図に
示す第1、第2、第3及び第4の電極3a,3
b,3c,3dを形成する。尚その一部が半導体
被膜5の電極接続部分2a〜2dに重なるように
電極3a〜3dを形成する。また各電極3a〜3
d間に分離部6が生じるように形成する。
Next, using a mask, for example, Cr and Ag are sequentially deposited as conductive materials for forming electrodes, thereby forming the first, second, third and fourth electrodes 3a and 3 shown in FIG.
Form b, 3c, and 3d. Note that the electrodes 3a to 3d are formed so that a portion thereof overlaps with the electrode connection portions 2a to 2d of the semiconductor film 5. In addition, each electrode 3a to 3
It is formed so that a separation part 6 is formed between d.

次に、パワー1〜3W、スピード50mm/sec、
線幅30〜50μ程度となるようにレーザビームを半
導体被膜5の上に投射して加熱することにより、
第6図に示すように特定パターンの線状溝7を半
導体被膜5に設ける。この溝7は十字形の感磁部
2が生じるように形成され且つ抵抗調整及び不平
衡電圧の調整のためのトリミングを行うようにコ
ンピユータプログラミングにより自動的に形成さ
れる。このように感磁部2即ち必要部分と感磁部
2に無関係な不要部分8との境界部分に溝7を形
成すれば、不要部分8を基板1上に残存させてお
いても電気的に全く障害とならない。
Next, power 1~3W, speed 50mm/sec,
By projecting a laser beam onto the semiconductor film 5 and heating it so that the line width is about 30 to 50μ,
As shown in FIG. 6, a specific pattern of linear grooves 7 is provided in the semiconductor film 5. This groove 7 is formed so that a cross-shaped magnetic sensing part 2 is generated and is automatically formed by computer programming to perform trimming for resistance adjustment and unbalanced voltage adjustment. If the groove 7 is formed at the boundary between the magnetically sensitive part 2, that is, the necessary part, and the unnecessary part 8 unrelated to the magnetically sensitive part 2, even if the unnecessary part 8 remains on the substrate 1, it can be electrically Not a hindrance at all.

上述から明らかなように、本実施例によれば、
半導体被膜5及び電極3a〜3dをマスク蒸着さ
せ、しかる後レーザービームで溝7を形成するこ
とによつて十字形の感磁部2としているので、フ
オトエツチングが不要となり、生産性を3〜6倍
向上させることが可能になる。
As is clear from the above, according to this example,
The semiconductor film 5 and the electrodes 3a to 3d are vapor-deposited using a mask, and then the grooves 7 are formed using a laser beam to form the cross-shaped magnetically sensitive part 2, eliminating the need for photoetching and reducing productivity by 3 to 6. It is possible to double the improvement.

また溝7を形成する際に不平衡電圧、抵抗値等
を補正するトリミングを同時に行うことが可能で
あるので、歩留りを容易に向上させることが可能
になる。
Moreover, since it is possible to perform trimming to correct unbalanced voltage, resistance value, etc. at the same time when forming the groove 7, it is possible to easily improve the yield.

また半導体被膜5をマスク蒸着することによ
り、その一部のみが電極3a〜3dの下に存在す
るようにしているので、電極3a〜3dの基板1
に対する接着強度が大きい。
Further, by vapor depositing the semiconductor film 5 with a mask, only a part of it exists under the electrodes 3a to 3d, so that the substrate 1 of the electrodes 3a to 3d
High adhesive strength against.

以上、本発明の実施例について述べたが、本発
明はこれに限定されるものではなく、更に変形可
能なものである。例えば、基板1としてセラミツ
ク、ガラス等にAl2O3、SiO2、ガラス等の保護絶
縁層を設けたものを使用してもよい。
Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified. For example, the substrate 1 may be made of ceramic, glass, or the like, provided with a protective insulating layer of Al 2 O 3 , SiO 2 , glass, or the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図、及び第3図は従来のホール素
子を工程順に示す平面図、第4図、第5図、及び
第6図は本発明の実施例に係わるホール素子を工
程順に示す平面図、第7図は第6図の−線断
面図である。尚図面に用いられている符号に於い
て、1は基板、2は感磁部、2a〜2dは接続部
分、3a〜3dは電極、5は半導体被膜、7は
溝、8は不要部分である。
FIGS. 1, 2, and 3 are plan views showing a conventional Hall element in order of process, and FIGS. 4, 5, and 6 show a Hall element according to an embodiment of the present invention in order of process. The plan view, FIG. 7, is a sectional view taken along the - line in FIG. 6. In the symbols used in the drawings, 1 is the substrate, 2 is the magnetic sensing part, 2a to 2d are the connection parts, 3a to 3d are the electrodes, 5 is the semiconductor film, 7 is the groove, and 8 is an unnecessary part. .

Claims (1)

【特許請求の範囲】 1 ホール素子を形成するために必要な半導体被
膜形成領域を含む基板の略中央領域に半導体材料
をマスクを使用して選択的に被着させてホール効
果半導体被膜を形成する工程と、 前記半導体被膜の電極接続部分には被着させる
が前記半導体被膜の感磁部には被着させないよう
なマスクを使用して導電物質を選択的に被着させ
て独立した4つの引き出し電極を形成する工程
と、 前記半導体被膜の必要部分と不要部分との境界
部分を熱又は切削で線状に除去して溝を設けるこ
とにより略十字形の感磁部を形成する工程と、を
有することを特徴とするホール素子の製造方法。 2 前記溝を設けることは、レーザビームを前記
半導体被膜に投射することである特許請求の範囲
第1項記載のホール素子の製造方法。
[Claims] 1. A Hall effect semiconductor film is formed by selectively depositing a semiconductor material on a substantially central region of a substrate including a semiconductor film forming region necessary for forming a Hall element using a mask. and forming four independent drawers by selectively depositing a conductive material using a mask that deposits the conductive material on the electrode connection portion of the semiconductor film but not on the magnetically sensitive portion of the semiconductor film. a step of forming an electrode; and a step of forming a substantially cross-shaped magnetically sensitive portion by linearly removing a boundary portion between a necessary portion and an unnecessary portion of the semiconductor film by heat or cutting to provide a groove. A method for manufacturing a Hall element, comprising: 2. The method for manufacturing a Hall element according to claim 1, wherein the step of providing the groove is to project a laser beam onto the semiconductor film.
JP56095596A 1981-06-19 1981-06-19 Manufacture of hall element Granted JPS57210677A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56095596A JPS57210677A (en) 1981-06-19 1981-06-19 Manufacture of hall element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56095596A JPS57210677A (en) 1981-06-19 1981-06-19 Manufacture of hall element

Publications (2)

Publication Number Publication Date
JPS57210677A JPS57210677A (en) 1982-12-24
JPS6352790B2 true JPS6352790B2 (en) 1988-10-20

Family

ID=14141941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56095596A Granted JPS57210677A (en) 1981-06-19 1981-06-19 Manufacture of hall element

Country Status (1)

Country Link
JP (1) JPS57210677A (en)

Also Published As

Publication number Publication date
JPS57210677A (en) 1982-12-24

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