JPS6349375B2 - - Google Patents

Info

Publication number
JPS6349375B2
JPS6349375B2 JP55005377A JP537780A JPS6349375B2 JP S6349375 B2 JPS6349375 B2 JP S6349375B2 JP 55005377 A JP55005377 A JP 55005377A JP 537780 A JP537780 A JP 537780A JP S6349375 B2 JPS6349375 B2 JP S6349375B2
Authority
JP
Japan
Prior art keywords
bonding
station
frame
position detection
positions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55005377A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56103433A (en
Inventor
Chiaki Iwadare
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP537780A priority Critical patent/JPS56103433A/ja
Publication of JPS56103433A publication Critical patent/JPS56103433A/ja
Publication of JPS6349375B2 publication Critical patent/JPS6349375B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7865—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP537780A 1980-01-21 1980-01-21 Wire bonding method Granted JPS56103433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP537780A JPS56103433A (en) 1980-01-21 1980-01-21 Wire bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP537780A JPS56103433A (en) 1980-01-21 1980-01-21 Wire bonding method

Publications (2)

Publication Number Publication Date
JPS56103433A JPS56103433A (en) 1981-08-18
JPS6349375B2 true JPS6349375B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-10-04

Family

ID=11609476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP537780A Granted JPS56103433A (en) 1980-01-21 1980-01-21 Wire bonding method

Country Status (1)

Country Link
JP (1) JPS56103433A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5647697B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-06-26 1981-11-11
JPS5160910A (ja) * 1974-11-25 1976-05-27 Hitachi Ltd Riniamoota
JPS54121672A (en) * 1978-03-14 1979-09-20 Nichiden Kikai Kk Wire bonding device
JPS55138246A (en) * 1979-04-13 1980-10-28 Toshiba Corp Manufacture of semicondoctor device

Also Published As

Publication number Publication date
JPS56103433A (en) 1981-08-18

Similar Documents

Publication Publication Date Title
US6085407A (en) Component alignment apparatuses and methods
US4347964A (en) Wire bonding apparatus
US5040293A (en) Bonding method
JPS6349375B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
US3465408A (en) Apparatus for forming and positioning
DE69217838D1 (de) Herstellungsverfahren für eine Halbleitervorrichtung mit durch eine Aluminiumverbindung seitlich voneinander isolierten Aluminiumspuren
JP2534912B2 (ja) ワイヤボンディング装置
JPS57160135A (en) Automatic bonding method for inner lead
JPS5749242A (en) Wire bonding device
JPH03104252A (ja) テープキャリアの製造方法
JPS649732B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPH0527978B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPH0341519Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5988839A (ja) 半導体装置用リードの位置認識方法
JP2685137B2 (ja) ワイヤボンダ
JPH0462944A (ja) インナーリードボンディング方法
JPH02148897A (ja) 電子部品挿入装置
JPS606095B2 (ja) 自動ワイヤボンデイング装置
JP3455137B2 (ja) ワイヤボンディング方法及び装置
JPS61111551A (ja) ワイヤボンデイング装置
JPS57188836A (en) Recognizing method for position
JPS6325934A (ja) ペレツトボンデイング装置
JPS5838607Y2 (ja) 半導体組立装置
JPS6112699Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS6181634A (ja) 半導体装置組立方法