JPS6349218B2 - - Google Patents

Info

Publication number
JPS6349218B2
JPS6349218B2 JP19985286A JP19985286A JPS6349218B2 JP S6349218 B2 JPS6349218 B2 JP S6349218B2 JP 19985286 A JP19985286 A JP 19985286A JP 19985286 A JP19985286 A JP 19985286A JP S6349218 B2 JPS6349218 B2 JP S6349218B2
Authority
JP
Japan
Prior art keywords
projection
reticle
printed circuit
wiring pattern
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP19985286A
Other languages
Japanese (ja)
Other versions
JPS6355550A (en
Inventor
Tadashi Kishimoto
Takahito Yanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mamiya Camera Co Ltd
Original Assignee
Mamiya Camera Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mamiya Camera Co Ltd filed Critical Mamiya Camera Co Ltd
Priority to JP61199852A priority Critical patent/JPS6355550A/en
Publication of JPS6355550A publication Critical patent/JPS6355550A/en
Publication of JPS6349218B2 publication Critical patent/JPS6349218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、プリントすべき配線パターンを複
数の部位に分割してプリント基板上の対応する部
位に投影露光するプリント基板の分割投影露光方
式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a divided projection exposure method for printed circuit boards in which a wiring pattern to be printed is divided into a plurality of parts and exposed by projection onto corresponding parts on a printed circuit board. .

〔従来の技術〕[Conventional technology]

近時電子機器の高性能化に併い、プリント基板
の配線密度の増大と共に、その大形化が強く望ま
れている。
BACKGROUND OF THE INVENTION In recent years, as the performance of electronic devices has improved, there has been a strong desire to increase the wiring density of printed circuit boards and increase their size.

一般に、プリント基板は、フエノールペーパ,
エポキシペーパ,エポキシガラス等の絶縁性板状
基材の表面に極めて薄い銅箔を均一に接着し、そ
の上に感光性レジスト層を形成した後、所要の配
線パターンを露光して焼付け、エツチングによつ
て未露光部分の銅箔を除去してプリント配線を形
成し、その上に残つたレジストを溶剤又はアルカ
リ液で剥離して作られる。
Generally, printed circuit boards are made of phenol paper,
After uniformly bonding extremely thin copper foil to the surface of an insulating plate-like substrate such as epoxy paper or epoxy glass, and forming a photosensitive resist layer on top of it, the desired wiring pattern is exposed and baked, followed by etching. Therefore, the unexposed portions of the copper foil are removed to form printed wiring, and the resist remaining thereon is peeled off with a solvent or alkaline solution.

そして、配線パターンの露光方法には、配線パ
ターンを形成したレチクルをプリント基板の表面
に直接密着させて露光する密着露光法と、レチク
ルのパターンを光学的にプリント基板の表面に投
影して露光する投影露光法とがある。
There are two methods for exposing wiring patterns: the contact exposure method, in which a reticle with a wiring pattern formed thereon is brought into direct contact with the surface of the printed circuit board, and the other is the contact exposure method, in which the reticle pattern is optically projected onto the surface of the printed circuit board. There is a projection exposure method.

前者は露光装置が簡単でレチクルの密着性を良
好に保つことができるため、特にフレキシブル基
板のように平面性の保持が困難な場合に多用され
ているが、レチクルに基板が摺接して擦傷が生じ
やすいという重大な問題点があつた。
The former has a simple exposure device and can maintain good reticle adhesion, so it is often used especially when it is difficult to maintain flatness, such as with flexible substrates. There was a serious problem that could easily occur.

一方、後者は露光装置が複雑になると共に、フ
レキシブル基板の場合には平面性の保持も困難と
なるが、レチクルが基板から離れた位置にあつて
擦傷発生の恐れがなく、作業性も良好であるの
で、今後のプリント基板露光方法の主流になりつ
つある。
On the other hand, in the latter case, the exposure equipment becomes complicated, and in the case of a flexible substrate, it is difficult to maintain flatness, but since the reticle is located far from the substrate, there is no risk of scratches, and workability is good. Therefore, it is becoming the mainstream of future printed circuit board exposure methods.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、このような投影露光法によるプ
リント基板露光方法にあつては、投影レンズを通
してレチクルのパターンをプリント基板上に投影
して露光を行うため、投影される像の解像度を良
好に保ち、その照度を均一にするには、投影し得
る像面の大きさに自ずから制約があり、大形のプ
リント基板を投影露光法で作成することはきわめ
て困難であつた。
However, in such a printed circuit board exposure method using the projection exposure method, the reticle pattern is projected onto the printed circuit board through a projection lens to perform exposure, so the resolution of the projected image is maintained at a good level, and its illuminance is In order to make the image uniform, there is a natural restriction on the size of the image surface that can be projected, and it has been extremely difficult to create large printed circuit boards using the projection exposure method.

また、プリント基板上に複数の配線パターンを
隣接して投影露光して大形の配線パターンを形成
したとしても、各配線パターンを回路的に接続さ
せることは容易でなかつた。
Further, even if a large wiring pattern is formed by projecting and exposing a plurality of wiring patterns adjacent to each other on a printed circuit board, it is not easy to connect each wiring pattern in a circuit manner.

この発明は、このような従来の問題点を解決し
得るプリント基板の分割投影露光方法を提供する
ことを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a divided projection exposure method for printed circuit boards that can solve these conventional problems.

〔問題点を解決するための手段〕[Means for solving problems]

そのため、この発明によるプリント基板の分割
投影露光方法は、その第1の発明では、プリント
すべき配線パターンを複数の部位に分割してそれ
ぞれの配線パターンを複数の投影用レチクル上に
形成し、これらの投影用レチクルの分割境界線近
傍に同一のランドパターンを備えた接続部を設
け、先位の投影用レチクルと隣接して投影する後
位の投影用レチクルとの接続部を重複して露光す
ることにより、プリントされた各配線パターンを
接続部を介して回路的に接続させるようにした。
Therefore, in the first aspect of the divided projection exposure method for a printed circuit board according to the present invention, a wiring pattern to be printed is divided into a plurality of parts and each wiring pattern is formed on a plurality of projection reticles. A connecting part with the same land pattern is provided near the dividing boundary line of the projection reticle, and the connecting part between the leading projection reticle and the succeeding projection reticle that projects adjacent to the leading projection reticle is exposed redundantly. By doing so, each printed wiring pattern is connected in a circuit manner through a connecting portion.

また、第2の発明では、上記の方法に加えて同
一のランドパターンを備えた投影用レチクルの接
続部に露光量を減ずる減光手段を設け、この接続
部の重複した露光量を他部の露光量にほぼ等しく
した。
Further, in the second invention, in addition to the above method, a light reduction means for reducing the exposure amount is provided at the connecting portion of the projection reticle having the same land pattern, and the overlapping exposure amount of this connecting portion is reduced. It was made almost equal to the exposure amount.

〔作用〕[Effect]

このような方法により、まず第1の投影用レチ
クルをプリント基板の第1の部位に投影して露光
した後、第2の投影用レチクルを第1の部位に隣
接した第2の部位に、第1,第2のレチクルの接
続部を重複させて投影露光すると、第1,第2の
レチクルの重複して露光される接続部に設けた同
一のランドパターンがプリント基板上でそれぞれ
二重露光され、この接続部を介してプリント基板
上の隣接する第1,第2の部位にプリントされた
第1と第2の配線パターンが回路的に接続され
る。
With this method, first, the first projection reticle is projected onto the first part of the printed circuit board for exposure, and then the second projection reticle is projected onto the second part adjacent to the first part. 1. When projection exposure is performed with the connection parts of the second reticle overlapped, the same land pattern provided at the overlapped connection parts of the first and second reticles is double exposed on the printed circuit board. The first and second wiring patterns printed on adjacent first and second portions on the printed circuit board are connected in a circuit manner through this connecting portion.

同様にして、第3,第4……の配線パターンを
プリント基板上の隣接した第3,第4……の部位
に投影露光することにより、第1,第2,第3,
第4……の回路的に接続された合成配線パターン
を得ることができる。
Similarly, by projecting and exposing the third, fourth... wiring patterns onto the adjacent third, fourth... portions on the printed circuit board, the first, second, third,...
A fourth circuit-connected composite wiring pattern can be obtained.

また、重複して露光される接続部は露光量が倍
加され、投影されるランドパターンの間隔が著し
く小さい場合には、露光過度になつたランドパタ
ーンの各要素が光滲現象のため互いに不慮の導通
をする場合がある。
In addition, the exposure amount is doubled for the joints that are exposed overlappingly, and if the distance between the projected land patterns is extremely small, each element of the overexposed land pattern may accidentally cross each other due to light bleeding. Continuity may occur.

このような不都合は、第2の発明を適用すれば
容易に解消することができる。
Such inconvenience can be easily solved by applying the second invention.

すなわち、第1,第2のレチクルの投影時に互
いに重複する接続部に設けた減光手段により一回
の露光量が半減し、二重露光によつて他の部位の
露光量にほぼ等しい適正露光量が得られ、ランド
パターン各要素の不慮の導通を未然に防止するこ
とができる。
In other words, when projecting the first and second reticles, the light attenuation means provided at the overlapping connection parts reduces the single exposure amount by half, and by double exposure, the appropriate exposure amount is approximately equal to the exposure amount of other parts. It is possible to prevent accidental conduction between each element of the land pattern.

〔実施例〕〔Example〕

以下、添付図面の第1図乃至第6図を参照して
この発明の実施例を説明する。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 6 of the accompanying drawings.

第6図はこの発明に係る分割投影露光方法の概
略を示すもので、投影すべき配線パターン1aを
有する投影用レチクル1Aを投影レンズ系2を挟
んでプリント基板3の所要の部位3aに対向さ
せ、投影用レチクル1Aの背後から照明光を照射
してその説線パターン1aをプリント基板3の所
要部位3aに投影して露光する。
FIG. 6 schematically shows a divided projection exposure method according to the present invention, in which a projection reticle 1A having a wiring pattern 1a to be projected is opposed to a desired portion 3a of a printed circuit board 3 with a projection lens system 2 in between. , illumination light is irradiated from behind the projection reticle 1A, and the line pattern 1a is projected onto a desired portion 3a of the printed circuit board 3 for exposure.

次に投影用レチクル1Aを保持する支持板をそ
の平面に沿つて矢示A方向に移動すると共に、プ
リント基板3をその平面に沿つて反対方向の矢示
B方向に移動し、次位の投影用レチクル1Bを投
影レンズ系2を挟んでプリント基板3の部位3a
に隣接する部位3bに対向させ、投影用レチクル
1Bの背後から照明光を照射してその配線パター
ン1bをプリント基板3の部位3bに投影して露
光する。
Next, the support plate holding the projection reticle 1A is moved along the plane in the direction of arrow A, and the printed circuit board 3 is moved along the plane in the opposite direction, in the direction of arrow B. Place the reticle 1B on the printed circuit board 3 with the projection lens system 2 in between.
The wiring pattern 1b is exposed by projecting the wiring pattern 1b onto the portion 3b of the printed circuit board 3 by irradiating illumination light from behind the projection reticle 1B.

このようにすることにより、プリント基板3の
隣接した部位3a,3bに配線パターン1a,1
bを投影露光することができる。
By doing this, the wiring patterns 1a and 1 are formed on the adjacent parts 3a and 3b of the printed circuit board 3.
b can be exposed by projection.

第1図はこの発明の一実施例を示すもので、第
6図に示したプリント基板3にプリントすべき全
配線パターン11を投影レンズ系2のカバーする
第1図イに示すフイールドサイズ10に対応して
配線パターン11a,11b,11c,11d
(同図ロ参照)に分割し、分割した配線パターン
11a〜11dをそれぞれ形成した投影用レチク
ル11A,11B,11C,11Dを作成してこ
れらの投影用レチクル11A〜11Dをプリント
基板3上の部位3a,3b,3c,3d上に順次
投影して露光し処理することにより、プリント基
板3上に所要の配線パターンを形成する。
FIG. 1 shows an embodiment of the present invention, in which the entire wiring pattern 11 to be printed on the printed circuit board 3 shown in FIG. 6 is covered by the projection lens system 2 in a field size 10 shown in FIG. Corresponding wiring patterns 11a, 11b, 11c, 11d
Projection reticles 11A, 11B, 11C, and 11D are created by dividing wiring patterns 11a to 11d (see FIG. A desired wiring pattern is formed on the printed circuit board 3 by sequentially projecting it onto 3a, 3b, 3c, and 3d, exposing it, and processing it.

これらの各投影用レチクル11A〜11Dのそ
れぞれの分割境界線11ab,11bc,11cd,
11daの近傍にはこれらの分割境界線11ab〜
11daに直交するそれぞれ同一のランドパター
ン12ab,12bc,12cd,12daを備えた接
続部12a1,12b1,12b2,12c1,12c2
12d1,12d2,12a2を設けている(同図ハ参
照)。
The division boundaries 11ab, 11bc, 11cd of each of these projection reticles 11A to 11D,
In the vicinity of 11da, these dividing boundaries 11ab~
Connecting portions 12a 1 , 12b 1 , 12b 2 , 12c 1 , 12c 2 , each having the same land pattern 12ab, 12bc, 12cd , 12da perpendicular to 11da,
12d 1 , 12d 2 , and 12a 2 are provided (see C in the same figure).

したがつて、同図ニに示すように各投影用レチ
クル11A〜11Dをプリント基板3の隣接する
部位3a,3b,3c,3dにそれぞれ各接続部
12a1,12a2〜12d1,12d2を重複させて投
影露光すると、各ランドパターン12ab,12
bc,12cd,12daはそれぞれ二重露光され、
プリント基板3上の各部位3a〜3dに形成され
る各配線パターンはこれらの接続部を介してそれ
ぞれ接続され、合成された所要の配線パターンを
得ることができる。
Therefore , as shown in FIG . By overlapping projection exposure, each land pattern 12ab, 12
bc, 12cd, 12da are each double exposed,
The respective wiring patterns formed on the respective parts 3a to 3d on the printed circuit board 3 are connected to each other via these connecting parts, and a desired synthesized wiring pattern can be obtained.

上記の実施例では、各接続部が重複して露光さ
れ各ランドパターンは各配線パターンの2倍の露
光量が与えられるので、配線パターンを適正露光
にすると、ランドパターンは露光過度になつて光
滲現象により各要素が外側に膨張して露光され
る。
In the above embodiment, each connection part is exposed redundantly and each land pattern is given twice the exposure amount as each wiring pattern, so when the wiring pattern is properly exposed, the land pattern becomes overexposed and exposed to light. Due to the bleeding phenomenon, each element expands outward and is exposed to light.

したがつて、ランドパターンにある程度の間隔
がある場合には問題はないが、その間隔が著しく
小さくなると、隣接したランドパターンが互いに
接触して導通する場合が発生する。
Therefore, there is no problem if there is a certain distance between the land patterns, but if the distance becomes extremely small, adjacent land patterns may come into contact with each other and become electrically conductive.

これを回避するには、各投影用レチクルの接続
部の露光量を減ずる何等からの減光手段を設ける
必要がある。
In order to avoid this, it is necessary to provide some kind of light reduction means to reduce the amount of exposure at the connection portion of each projection reticle.

第2図はこのような減光手段の一例を示すもの
で、各投影用のレチクル11A〜11Dに対応す
るフイルタ4A,4B,4C,4Dを設け、これ
らのフイルタ4A〜4Dに各投影用レチクル11
A〜11Dの接続部12a1〜12d2に対応して透
過率50%の半透過部4a,4b,4c,4dを形
成し、その他の部位は透過率100%に近い透明部
とする。
FIG. 2 shows an example of such a light attenuation means, in which filters 4A, 4B, 4C, and 4D are provided corresponding to each projection reticle 11A to 11D, and each projection reticle is attached to these filters 4A to 4D. 11
Semi-transparent parts 4a, 4b, 4c, and 4d with a transmittance of 50% are formed corresponding to the connecting parts 12a1 to 12d2 of A to 11D, and the other parts are transparent parts with a transmittance close to 100%.

そして、これらのフイルタ4A〜4Dをそれぞ
れ投影用レチクル11A〜11Dに重ねて投影す
ると、各接続部12a1〜12d2は第3図に示すよ
うに重複して露光されるので他の部位の露光量と
ほぼ同等の適正露光量となり、光滲現象を生ずる
ことなく、ランドパターン各要素間の不慮の導通
を防止することができる。
When these filters 4A to 4D are superimposed and projected onto the projection reticles 11A to 11D, each connection part 12a 1 to 12d 2 is exposed redundantly as shown in FIG. 3, so that other parts are not exposed. The appropriate exposure amount is almost the same as the amount of light, and accidental conduction between each element of the land pattern can be prevented without causing a light bleeding phenomenon.

ここで、フイルタ4A〜4Dの半透過部4a〜
4dの過透率は必ずしも50%ずつにする必要はな
く、30%と70%又は40%と60%等、重複露光によ
り100%に近くなればよく、また、第4図に示す
ように、透過率が漸増及び漸減するようにしても
よく、このようにすることにより、投影位置が僅
かにずれた場合にも接続部の露光量を全域に亘つ
て適正にすることができる。
Here, the semi-transparent parts 4a to 4D of the filters 4A to 4D
The transmittance of 4d does not necessarily have to be set to 50% each, but it is sufficient if it is close to 100% by overlapping exposure, such as 30% and 70% or 40% and 60%. Also, as shown in Figure 4, The transmittance may be gradually increased or decreased, and by doing so, even if the projection position is slightly shifted, the exposure amount of the connecting portion can be made appropriate over the entire area.

さらに、このような減光部はフイルタ4A〜4
Dの一部に半透明物質を局部的に蒸着することに
より容易に作成することができるが、フイルタを
廃止して投影用レチクル11A〜11Dの表面又
は裏面に蒸着してもよい。
Furthermore, such a light attenuation section is provided by filters 4A to 4.
Although it can be easily created by locally depositing a translucent material on a part of D, the filter may be omitted and the material may be deposited on the front or back surface of the projection reticles 11A to 11D.

なお、厳密にいえば減光部4a〜4dのすべて
が重なる中央部の一部は露光量が2倍になるが、
この部分は極めて小範囲であるので、この部分に
はランドパターンを設けないようにする。
Strictly speaking, the exposure amount is doubled in a part of the center where all of the light reduction parts 4a to 4d overlap, but
Since this portion is an extremely small area, no land pattern is provided in this portion.

次に、第5図はこの発明を可撓性をもつプリン
ト基板であるフレキシブル基板に適用したこの発
明の他の実施例を示すもので、長手方向に沿つて
両側にパーフオレーシヨンを有する帯状のフレキ
シブル基板13を供給軸と巻取軸間に張装し、回
転するスプロケツトにより矢示B方向に給送可能
とする。
Next, FIG. 5 shows another embodiment of the present invention in which the present invention is applied to a flexible printed circuit board, which is a flexible printed circuit board. A flexible substrate 13 is stretched between a supply shaft and a take-up shaft, and can be fed in the direction of arrow B by a rotating sprocket.

このフレキシブル基板13にプリントすべき配
線パターンを第6図に示したように2部分に分割
してそれぞれ接続部を有する第1,第2の投影用
レチクルを形成し、前実施例と同様にして第1の
投影用レチクルをプリント基板13の第1の部位
13aに投影露光した後、プリント基板13を矢
示B方向に移動させて第2の投影用レチクルを第
2の部位13bに投影露光する。
The wiring pattern to be printed on the flexible substrate 13 is divided into two parts as shown in FIG. 6 to form first and second projection reticles each having a connection part, and the same process as in the previous embodiment is performed. After projecting and exposing the first projection reticle to the first portion 13a of the printed circuit board 13, the printed circuit board 13 is moved in the direction of arrow B and the second projection reticle is projected and exposed to the second region 13b. .

この場合にも、プリント基板13の給送量を部
位13aの横方向の長さより僅かに小さくするこ
とにより、部位13a,13bの中間に接続部1
2aを形成することができ、この接続部12aを
介して第1,第2の各配線パターンを回路的に接
続することが可能となる。
In this case as well, by making the feeding amount of the printed circuit board 13 slightly smaller than the horizontal length of the portion 13a, the connecting portion 1 is placed between the portions 13a and 13b.
2a can be formed, and it becomes possible to connect the first and second wiring patterns in a circuit manner through this connecting portion 12a.

また、同様にしてさらに第3,第4……の配線
パターンを接続することもできる。
Further, third, fourth, . . . wiring patterns can be further connected in the same manner.

なお、上記の実施例においては、投影用レチク
ルの分割境界線近傍にこの分割境界線に直交する
同一のランドパターンを設けたが、このランドパ
ターンは必ずしも分割境界線に直交させる必要は
ない。
In the above embodiment, the same land pattern is provided near the division boundary line of the projection reticle and is perpendicular to the division boundary line, but this land pattern does not necessarily need to be orthogonal to the division boundary line.

また、これらのランドパターンはすべて同一と
する必要はなく、重複するランドパターン同志が
同一であればよい。
Further, all of these land patterns do not need to be the same, and it is sufficient that the overlapping land patterns are the same.

さらに、そのランドパターンの各線の密度は、
先位の投影用レチクルの後位の投影用レチクルの
投影位置のばらつきを考慮して配線パターンの密
度よりやや粗くするのが望ましい。
Furthermore, the density of each line of the land pattern is
It is desirable to make the density slightly coarser than the wiring pattern density in consideration of variations in the projection position of the projection reticle that comes after the front projection reticle.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、この発明によるプリント基
板の分割投影露光方法は、第1の発明ではプリン
トすべき配線パターンを複数の部位に分割して複
数の投影用レチクル上に形成し、これらの投影用
レチクルの分割境界線近傍に同一のランドパター
ンを備えた接続部を設け、隣接する先位と後位の
投影用レチクルの接続部を重複して露光すること
にしたので、この接続部を介してプリント基板上
に形成される先位と後位の配線パターンが回路的
に接続され、これを繰返すことによりきわめて大
形のプリント基板を得ることができる。
As described above, in the divided projection exposure method for a printed circuit board according to the present invention, in the first invention, a wiring pattern to be printed is divided into a plurality of parts and formed on a plurality of projection reticles. We decided to provide a connecting part with the same land pattern near the dividing boundary line of the reticle, and to expose the adjacent leading and trailing projection reticle joints redundantly, so that The leading and trailing wiring patterns formed on the printed circuit board are connected in a circuit manner, and by repeating this process, an extremely large printed circuit board can be obtained.

また、第2の発明では、この接続部に露光量を
減ずる減光手段を設けたので、隣接する先位と後
位の投影用レチクルの接続部の重複した露光量を
他部の露光量にほぼ等しい適正露光量にすること
ができ、ランドパターンを構成する各要素の解像
度が向上して不慮の導通が防止される。
In addition, in the second invention, since a light reduction means for reducing the exposure amount is provided at this connection portion, the overlapping exposure amount of the connection portion of the adjacent front and rear projection reticles can be reduced to the exposure amount of the other portion. Approximately equal exposure amounts can be achieved, the resolution of each element constituting the land pattern is improved, and accidental conduction is prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図イ,ロ,ハ,ニはこの発明の第一実施例
を示す説明図、第2図は本発明に用いるフイルタ
の平面図、第3図はフイルタの透過率を示す線
図、第4図は他のフイルタの透過率を示す線図、
第5図はこの発明の他の実施例を示す説明図、第
6図はこの発明に係る分割投影露光方法の概略を
示す光路図である。 1A,1B,11A,11B,11C,11D
…投影用レチクル、1a,1b,11a,11
b,11c,11d…配線パターン、11ab,
11bc,11cd,11da…分割境界線、12ab,
12bc,12cd,12da…ランドパターン、1
2a1,12a2,12b1,12b2,12c1,12
c2,12d1,12d2,12a…接続部、3…プリ
ント基板、4A,4B,4C,4D…フイルタ
(減光手段)4a,4b,4c,4d…半透過部、
13…フレキシブル基板(プリント基板)。
Figure 1 A, B, C, and D are explanatory diagrams showing the first embodiment of the present invention, Figure 2 is a plan view of a filter used in the present invention, Figure 3 is a diagram showing the transmittance of the filter, and Figure 3 is a diagram showing the transmittance of the filter. Figure 4 is a diagram showing the transmittance of other filters.
FIG. 5 is an explanatory diagram showing another embodiment of the invention, and FIG. 6 is an optical path diagram showing an outline of the divided projection exposure method according to the invention. 1A, 1B, 11A, 11B, 11C, 11D
...Projection reticle, 1a, 1b, 11a, 11
b, 11c, 11d...wiring pattern, 11ab,
11bc, 11cd, 11da...dividing boundary line, 12ab,
12bc, 12cd, 12da...land pattern, 1
2a 1 , 12a 2 , 12b 1 , 12b 2 , 12c 1 , 12
c 2 , 12d 1 , 12d 2 , 12a...Connection part, 3...Printed circuit board, 4A, 4B, 4C, 4D...Filter (light reduction means) 4a, 4b, 4c, 4d...Semi-transparent part,
13...Flexible board (printed board).

Claims (1)

【特許請求の範囲】 1 プリントすべき配線パターンを複数の部位に
分割してそれぞれの配線パターンを複数の投影用
レチクル上に形成し、これらの投影用レチクルの
分割境界線近傍に同一のランドパターンを備えた
接続部を設け、先位の投影用レクチルと隣接して
投影する後位の投影用レチクルとの接続部を重複
して露光することにより、プリントされた各配線
パターンを上記接続部を介して回路的に接続させ
ることを特徴とするプリント基板の分割投影露光
方法。 2 プリントすべき配線パターンを複数の部位に
分割してそれぞれの配線パターンを複数の投影用
レチクル上に形成し、これらの投影用レチクルの
分割境界線近傍に同一のランドパターンを備えた
接続部を設けると共に、該接続部に露光量を減ず
る減光手段を設け、先位の投影用レチクルと隣接
して投影する後位の投影用レチクルとの接続部を
重複して露光することにより、プリントされた各
配線パターンを上記接続部を介して回路的に接続
させると共に、該接続部の重複した露光量を他部
の露光量にほぼ等しくすることを特徴とするプリ
ント基板の分割投影露光方法。
[Claims] 1. A wiring pattern to be printed is divided into a plurality of parts, each wiring pattern is formed on a plurality of projection reticles, and the same land pattern is formed near the dividing boundary line of these projection reticles. By providing a connection part with a projection reticle and exposing the connection part between the front projection reticle and the rear projection reticle that projects adjacently, each printed wiring pattern can be connected to the connection part. A divided projection exposure method for a printed circuit board, characterized in that the printed circuit board is connected in a circuit manner through. 2 Divide the wiring pattern to be printed into multiple parts, form each wiring pattern on multiple projection reticles, and connect parts with the same land pattern near the division boundaries of these projection reticles. At the same time, the connecting portion is provided with a light reduction means for reducing the amount of exposure, and the connecting portion between the leading projection reticle and the rear projection reticle that projects adjacently is exposed redundantly. A divided projection exposure method for a printed circuit board, characterized in that each wiring pattern is connected in a circuit manner through the connection portion, and the overlapping exposure amount of the connection portion is made approximately equal to the exposure amount of the other portion.
JP61199852A 1986-08-26 1986-08-26 Divisionally projecting and exposing method for printed board Granted JPS6355550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61199852A JPS6355550A (en) 1986-08-26 1986-08-26 Divisionally projecting and exposing method for printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61199852A JPS6355550A (en) 1986-08-26 1986-08-26 Divisionally projecting and exposing method for printed board

Publications (2)

Publication Number Publication Date
JPS6355550A JPS6355550A (en) 1988-03-10
JPS6349218B2 true JPS6349218B2 (en) 1988-10-04

Family

ID=16414722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61199852A Granted JPS6355550A (en) 1986-08-26 1986-08-26 Divisionally projecting and exposing method for printed board

Country Status (1)

Country Link
JP (1) JPS6355550A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5107324A (en) * 1989-04-27 1992-04-21 Fuji Electric Co., Ltd. Two-terminal semiconductor device of surface installation type
US6842225B1 (en) 1999-05-07 2005-01-11 Nikon Corporation Exposure apparatus, microdevice, photomask, method of exposure, and method of production of device
TWI658334B (en) * 2017-08-29 2019-05-01 同泰電子科技股份有限公司 Flexible printed circuit board and manufacturng method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57112753A (en) * 1980-12-29 1982-07-13 Fujitsu Ltd Exposure method
JPS57183032A (en) * 1981-05-06 1982-11-11 Toshiba Corp Method for wafer exposure and device thereof
JPS6318352A (en) * 1986-07-11 1988-01-26 Agency Of Ind Science & Technol Mask for split exposure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57112753A (en) * 1980-12-29 1982-07-13 Fujitsu Ltd Exposure method
JPS57183032A (en) * 1981-05-06 1982-11-11 Toshiba Corp Method for wafer exposure and device thereof
JPS6318352A (en) * 1986-07-11 1988-01-26 Agency Of Ind Science & Technol Mask for split exposure

Also Published As

Publication number Publication date
JPS6355550A (en) 1988-03-10

Similar Documents

Publication Publication Date Title
US5015553A (en) Method of patterning resist
JPS6349218B2 (en)
CN108551725B (en) Method for electroplating nickel and gold on printed circuit board circuit and printed circuit board circuit thereof
JPH0537140A (en) Manufacture of printed wiring board
US5254435A (en) Method of patterning resist
JPH04311025A (en) Exposing method
US3574933A (en) Method of making printed circuit boards with plated-through holes
JP2912114B2 (en) Manufacturing method of printed wiring board
JPH04349689A (en) Printed wiring board and its manufacture
JPS6233580B2 (en)
JP2583702B2 (en) Manufacturing method of printed wiring board
EP0346355B1 (en) Photopatternable composite
JP2000068632A (en) Manufacture of printed wiring board
JPH02244791A (en) Formation of printed circuit pattern
JPH02158739A (en) Production of screen plate
JPS60260188A (en) System for producing printed substrate power source layer
JPS61219954A (en) Formation of pattern by liquid crystal panel
JP2546935B2 (en) Method for manufacturing printed wiring board
JPH0286141A (en) Manufacture of tape carrier
JPS61109051A (en) Patterning method of liquid crystal element
JPS639996A (en) Method of forming solder resist layer
JPH02105597A (en) Printed wiring board and its manufacture
JPH01129490A (en) Formation of resist layer for printed board
JPH0461110A (en) Improvement in visibility of character pattern
JPH03190213A (en) Formation of thin film pattern