JPS6345651A - Memory access system - Google Patents

Abstract

PURPOSE:To surely check an extended memory in a short time by giving an access to a memory toward a leading address from the final address for the text of the memory including an extended option memory after obtaining the final address of an extended option memory. CONSTITUTION:When an MPU 1 runs a check program for the contents of a memory (character pattern) 2, the final address of an extended option memory is obtained in an address operation/generation means (address operation/ generation part) 6 based on the ON/OFF information on the option bit set at an option bit register 3. Then an access is given to the memory 2 toward the leading address from a final address. Thus the normality of the option memory is early confirmed and its countermeasure is quickly applied.

Description

[Detailed Description of the Invention] [Summary] A device having a register that manages the capacity of memory for which optional memory is added in units of a predetermined capacity by turning on/off option bits, and which is capable of testing the memory to which optional memory is added. By configuring the memory access to obtain the final address of the added optional memory and access the memory from that final address toward the first address, the normality of the optional memory can be confirmed early and the It becomes possible to take countermeasures quickly.

[Industrial application field]

The present invention relates to a memory access method in which optional memory is added in units of predetermined capacity.

For example, an electrophotographic printing device is equipped with a memory that stores the character pattern to be printed, and the character pattern is created by expanding the corresponding character pattern from the memory using code data transferred from the host device. Data is being printed.

Some such memories are based on a capacity of a predetermined unit, and as the number of character patterns to be stored increases, an optional memory having a capacity of a predetermined unit is added.

It is expected that such an optional memory will be reliably added and a system will be put into practical use that can quickly and simply check whether the contents of the optional memory are normal or not.

[Conventional technology]

FIG. 4 is a block diagram illustrating a conventional example, and FIG. 5 is a diagram illustrating a memory access procedure in the conventional example.

FIG. 4 shows a part of the functional blocks of an electrophotographic printing device, and its configuration consists of a microprocessor (hereinafter referred to as MPtl) 1 that controls processing operations inside the device based on a microprogram, and a processor that stores character patterns. Basic character pattern area 2
a, and an optional character pattern area 2b; and an optional character pattern area 2 in the character pattern memory 2.
an option bit register 3 that stores expansion management information of b by turning on/off option bits; an address generator 4 that sequentially generates addresses for the character pattern memory 2 from the smallest number based on instructions from the MPUI; and a host device ( (not shown).

Optional character pattern area 2 of character pattern memory 2
When a predetermined capacity of option memory is added to b, the option bit at the corresponding position in the option bit register 3 is turned on by the MPUI.

For example, when only the standard memory printed board is set and one optional memory printed board is added, the MPUI turns on the first bit of the optional memory printer 3.

Next, access to the character pattern memory 2 in the above state will be explained based on FIG. 5. In addition, symbols 100~
106 represents a processing step.

(Step 100); The MPUI checks the contents of the corresponding option bit in the option bit register 3, and sets the start address of the character pattern memory 2 based on the turned-on option bit in the address generator 4.

(Steps 101 and 102): The MPUI sequentially accesses the character pattern memory 2 according to the address generated from the address generator 4, writes data, and then reads the written data.

(Step 103); The MPUI checks whether an error has occurred while sequentially accessing the character pattern memory 2.

(Steps 104, 105). If no errors occur, the MPUI instructs the address generator 4 to generate the next address (
The previous address plus 1) is generated, and it is determined whether the address is the final address or not. If it is the final address, it is considered to be a normal end, and if it is not the final address, the operation from the screen 101 is repeated.

(Step 106); When the MPUI confirms an error in accessing the character pattern memory 2, it processes it as an error in the character pattern memory 2, that is, an error due to a setting error in the option memory or an error due to a defect in the memory element.

[Problem that the invention seeks to solve]

As described above, access to the character pattern memory 2 in the conventional method is performed sequentially from the first address of the character pattern memory 2 by turning on/off the option bits set in the option bit register 3.

This allows checking for defects or setting errors in the option memory, but it takes a lot of time to check.

For example, when several tens of megabytes of optional memory is added,
This check will take several tens of minutes or more.

[Means for solving problems]

FIG. 1 shows a block diagram illustrating the invention in detail.

The principle block shown in FIG. 1 consists of the functional blocks 1.2.3.5 explained in FIG. In this case, calculate and find the final address of the added optional memory, send that final address, and set the sent final address? Address calculation/generation means (address calculation/generation unit) that sequentially subtracts a predetermined value from the address value sent according to instructions from PU1 and sends it out.
6.

[Effect]

When the program for checking the contents of memory (character pattern memory) 2 is run in MP[11, the final address of the added option memory is specified based on the option bit on/off information set in option bit register 3. Calculation/generation means (address calculation/
By configuring the memory (character pattern memory) 2 to be accessed from the final address to the first address, the normality of the optional memory can be confirmed at an early stage, and countermeasures can be quickly taken. It becomes possible to apply it to

〔Example〕

The gist of the present invention will be specifically explained below with reference to embodiments shown in FIGS. 2 and 3.

FIG. 2 is a block diagram illustrating the present invention in detail, and FIG. 3 is a diagram illustrating a memory access procedure in an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

As shown in FIG. 2, the address calculation/generation unit 6 of this embodiment includes an address calculation circuit 6 that calculates the address of the character pattern memory 2 from the information G sent from the MPIll.
1 and the address output from the address calculation circuit 61, and set the following address? +1 or -1 depending on the up/down signal sent from IPU1
and a counter 62 which sequentially generates the data.

Now, the address calculation method in the address calculation circuit will be explained.

First, since the final address of the standard memory printed board is unique to the device and determined in advance, the final address A of this standard memory printed board is held.

Furthermore, the memory capacity of the optional memory printed board is also 1
Since a certain capacity (for example, 512 KB) is predetermined for the sheet weight, this capacity information B is also held.

Based on the information on how many bits are turned on, it means that two optional memory printed boards have been added, and the total capacity of the optional memory is 2xB.

Therefore, the final address C is obtained as C=A+2B.

Next, the memory access processing operation in this embodiment will be explained in the third section.
This will be explained based on the diagram.

(Step 200); When the memory check program is sent to the MPUI, the MPtll checks the on/off state of the option bit set in the option bit register 3, and sends the on/off contents to the address calculation/generation section. 6 internal address arithmetic circuit 61, and instructs it to send out the determined final address.

The address calculation circuit 61 calculates the address of the character pattern memory 2 based on the input information, and sets the QH address in the counter 62.

(Step 201) The i counter 62 sequentially transmits the set final address while incrementing it by one in response to a down signal from the MPUI.

(Steps 202, 203); Based on the address sent from the counter 62, MPtll sequentially accesses the character pattern memory 2 from the highest address (the last address of the option memory) to the first address, and reads/writes the data. I do.

(Steps 204 to 206); In MPUI, if an error is not confirmed during data writing/reading, the address is subtracted by one.
Then, it is checked whether the address at that time is the first address or not. If the address is the first address, the processing is terminated normally, and if it is not the first address, the operation from step 202 is repeated.

(Steps 207, 208); M at step 204
When an error is confirmed on the PUI, the error is displayed using a predetermined method, and MPIJI executes error processing.

[Effects of the Invention] According to the present invention as described above, it is possible to check the added memory in a short time and reliably using a simple method.

[Brief explanation of drawings]

FIG. 1 is a block diagram explaining the present invention in detail, FIG. 2 is a block diagram explaining the present invention in detail, FIG. 3 is a diagram explaining the memory access procedure in an embodiment of the present invention, and FIG. 4 is a block diagram explaining the present invention in detail. FIG. 5 is a block diagram illustrating a conventional example, and FIG. 5 is a diagram illustrating a memory access procedure in the conventional example. In the figure, ■ is MPtl. 2 is character pattern memory (memory), 2a is basic character pattern area, 2b is optional character pattern area, 3 is option bit register, 4 is address generation section, 5 is interface section, 6
61 represents an address calculation/generation unit, 61 represents an address calculation circuit, and 62 represents a counter, respectively. Ikuyoriroka's voice easy to blame example and power ≧ Zan H countrybu is Nuku figure $ 2 figure 5 figure

Claims (1)

[Claims] The capacity of the memory (2) can be optionally expanded in predetermined capacity units, and the memory (2) is equipped with an option bit register (3) that manages the expanded capacity by turning on/off option bits. The final address of the added option memory is determined based on the contents of the register (3), and the microprocessor (
An address calculation/generation means (6) is provided which sends out an address obtained by subtracting a predetermined value from the final address value in response to instructions from 1), and accesses the memory (2) sequentially from the final address toward the first address. A memory access method is characterized in that the presence or absence of optional memory is checked based on the results obtained.