JPS6344532U - - Google Patents
Info
- Publication number
- JPS6344532U JPS6344532U JP13741686U JP13741686U JPS6344532U JP S6344532 U JPS6344532 U JP S6344532U JP 13741686 U JP13741686 U JP 13741686U JP 13741686 U JP13741686 U JP 13741686U JP S6344532 U JPS6344532 U JP S6344532U
- Authority
- JP
- Japan
- Prior art keywords
- thyristor
- state
- gate
- gate turn
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims 2
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案の実施例を示す回路図である。
１……ゲートターンオフサイリスタ、２，３…
…フオトカプラ、４……オア回路、５……発振器
、Ｅ１……オン用直流電源、Ｅ２……オフ用直流
電源、Ｅ３……直流電源。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. 1... Gate turn-off thyristor, 2, 3...
...Photocoupler, 4...OR circuit, 5...Oscillator, E1 ...DC power supply for ON, E2 ...DC power supply for OFF, E3 ...DC power supply.
Claims (1)
み合わせられたゲートターンオフサイリスタの状
態検出回路において、 ゲートターンオフサイリスタがオン状態にて短
絡しているときにゲート・カソード間の電圧降下
によりオフ状態になる第１のフオトカプラと、前
記ゲートターンオフサイリスタが正常かつオフ状
態にあるときにカソード・ゲート間の電圧により
オン状態になる第２のフオトカプラと、前記第１
のフオトカプラがオン及びオフの一方の状態のと
きに発振信号を出力する発振器と、この発振器の
出力が一方の入力端に供給されるオア回路と、前
記第２のフオトカプラがオン及びオフの一方の状
態のときにハイレベルの信号を前記オア回路の他
方の入力端に供給する直流電源とを設け、 前記オア回路の出力信号にもとずいてゲートタ
ーンオフサイリスタの状態を検出することを特徴
とするゲートターンオフサイリスタの状態検出回
路。[Claims for Utility Model Registration] In a state detection circuit of a gate turn-off thyristor combined with a gate circuit of the gate turn-off thyristor, when the gate turn-off thyristor is in an on state and short-circuited, it is turned off due to a voltage drop between the gate and cathode. a first photocoupler that is turned on due to a voltage between the cathode and the gate when the gate turn-off thyristor is in a normal and off state;
an oscillator that outputs an oscillation signal when the second photocoupler is in one of on and off states, an OR circuit to which the output of this oscillator is supplied to one input terminal, and one in which the second photocoupler is in on and off state. and a DC power source that supplies a high-level signal to the other input terminal of the OR circuit when the gate turn-off thyristor is in the state, and the state of the gate turn-off thyristor is detected based on the output signal of the OR circuit. Gate turn-off thyristor status detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13741686U JPH0438597Y2 (en) | 1986-09-08 | 1986-09-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13741686U JPH0438597Y2 (en) | 1986-09-08 | 1986-09-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6344532U true JPS6344532U (en) | 1988-03-25 |
| JPH0438597Y2 JPH0438597Y2 (en) | 1992-09-09 |
Family
ID=31041447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13741686U Expired JPH0438597Y2 (en) | 1986-09-08 | 1986-09-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0438597Y2 (en) |
-
1986
- 1986-09-08 JP JP13741686U patent/JPH0438597Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0438597Y2 (en) | 1992-09-09 |
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