JPS63137534U - - Google Patents
Info
- Publication number
- JPS63137534U JPS63137534U JP2570587U JP2570587U JPS63137534U JP S63137534 U JPS63137534 U JP S63137534U JP 2570587 U JP2570587 U JP 2570587U JP 2570587 U JP2570587 U JP 2570587U JP S63137534 U JPS63137534 U JP S63137534U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- power supply
- voltage
- output voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007257 malfunction Effects 0.000 claims description 4
- 230000002265 prevention Effects 0.000 claims description 3
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図は本考案の一実施例のブロツク回路図、
第２図は従来の一例のブロツク回路図である。
１…入力電源、２，１０…インバータ回路、３
，１１…制御回路、４，１２…出力電流検出回路
、５，１３…アンド回路、６…出力電流比較器、
７，１４…出力電圧比較器、８，１５…ダイオー
ド、９…負荷、１６…誤動作防止回路、１７，１
８…基準電圧、１９…誤動作防止用比較電圧。
FIG. 1 is a block circuit diagram of an embodiment of the present invention.
FIG. 2 is a block circuit diagram of a conventional example. 1...Input power supply, 2,10...Inverter circuit, 3
, 11... Control circuit, 4, 12... Output current detection circuit, 5, 13... AND circuit, 6... Output current comparator,
7, 14... Output voltage comparator, 8, 15... Diode, 9... Load, 16... Malfunction prevention circuit, 17, 1
8...Reference voltage, 19...Comparison voltage for preventing malfunction.
Claims (1)
電圧を一定の規準電圧と比較する出力電圧比較器
と、この出力電圧比較器の出力によりインバータ
回路のデユーテイを制御する制御回路とからなる
同種の第１および第２の電源の２台を、入力電源
と負荷との間に並列にして接続してなる出力電圧
安定化電源の並列運転回路において、前記２台の
第１および第２の電源の夫々の出力端子と前記負
荷との間に接続する第１および第２の出力電流検
出回路と、これら出力電流検出回路の検出値を比
較して第１の出力電流が大きい時には正側出力、
第２の出力電流が大きい時には負側出力が得られ
る出力電流比較器と、前記第１および第２の電源
の出力電圧が同時にある一定値の比較電圧を超え
た時に出力が得られる誤動作防止回路と、この出
力と前記出力電流比較器の正側出力とによつて、
前記第１の電源の制御回路に出力電圧を降下させ
るような信号を送る第１のアンド回路と、同じく
前記誤動作防止回路の出力と前記出力電流比較器
の負側出力とによつて、前記第２の電源の制御回
路に出力電圧を降下させるような信号を送る第２
のアンド回路とを設けたことを特徴とする出力電
圧安定化電源の並列運転回路。 First and second circuits of the same type, each consisting of an inverter circuit, an output voltage comparator that compares the output voltage of the inverter circuit with a constant reference voltage, and a control circuit that controls the duty of the inverter circuit based on the output of the output voltage comparator. In a parallel operation circuit of an output voltage stabilized power supply in which two power supplies of No. 2 are connected in parallel between an input power supply and a load, an output terminal of each of the first and second power supplies of the two power supplies is connected. and the load, and the detected values of these output current detection circuits are compared, and when the first output current is large, the positive side output,
an output current comparator that provides a negative output when the second output current is large; and a malfunction prevention circuit that provides an output when the output voltages of the first and second power supplies simultaneously exceed a certain constant comparison voltage. According to this output and the positive output of the output current comparator,
A first AND circuit that sends a signal to the control circuit of the first power supply to lower the output voltage, and also the output of the malfunction prevention circuit and the negative output of the output current comparator. A second circuit that sends a signal that lowers the output voltage to the control circuit of the second power supply.
1. A parallel operation circuit for an output voltage stabilized power supply, characterized in that an AND circuit is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2570587U JPH0521948Y2 (en) | 1987-02-25 | 1987-02-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2570587U JPH0521948Y2 (en) | 1987-02-25 | 1987-02-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63137534U true JPS63137534U (en) | 1988-09-09 |
| JPH0521948Y2 JPH0521948Y2 (en) | 1993-06-04 |
Family
ID=30826112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2570587U Expired - Lifetime JPH0521948Y2 (en) | 1987-02-25 | 1987-02-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0521948Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03256532A (en) * | 1989-12-28 | 1991-11-15 | American Teleph & Telegr Co <Att> | Power converter |
-
1987
- 1987-02-25 JP JP2570587U patent/JPH0521948Y2/ja not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03256532A (en) * | 1989-12-28 | 1991-11-15 | American Teleph & Telegr Co <Att> | Power converter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0521948Y2 (en) | 1993-06-04 |
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