JPS6343392A - Manufacture of circuit board - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a circuit board with strict pattern width specifications.

[Conventional technology]

Conventionally, as a method of manufacturing circuit boards with strict pattern width standards, the amount of compensation for over-etching is adjusted to the desired pattern width. Generally, the added etching mask is formed into a four-piece mask by a normal photo process, and the pattern width is checked during etching using a factory microscope or the like capable of measuring minute dimensions.

[Problem that the invention seeks to solve]

However, in the conventional technology, the pattern width of the circuit board? When manufacturing a large number of circuit boards continuously, the etching speed depends on factors such as the temperature of the etching solution, the degree of fatigue of the solution, etc. It was difficult to respond quickly to changes in the market. However, since it is not possible to perform a sampling inspection during etching, especially for 7-ply circuit boards such as tape carriers, changes in the etching speed can be observed by observation using a stereomicroscope, etc. The problem was that the conditions had to be changed based on intuition, making it difficult to stably manufacture circuit boards with pattern widths that met the standards.

The present invention is intended to solve these problems, and its purpose is to provide a method for manufacturing circuit boards that can easily manufacture circuit boards with strict pattern width standards by just a simple check. .

Means for Solving Problem C] In addition to a circuit pattern made of a predetermined conductive foil, the method for manufacturing a circuit board of the present invention includes a pattern having a width of 2 in the vicinity of the etching correction amount of the circuit pattern. The method is characterized in that the conductive foil is etched using a plurality of etching masks formed simultaneously.

[Implementation row]

FIG. 1 shows an embodiment of the present invention, in which a resist is applied onto a conductor foil 4 of a tape carrier 3, which is made by bonding a conductor foil such as copper foil to the surface of an insulating flexible table made of polyimide or the like, and then exposed to light. FIG. 9 is a plan view showing a partially removed etching mask 1 formed by etching. Here, 2 is a plurality of patterns (hereinafter referred to as etching amount confirmation patterns) having a dimension of 2 widths near the correction amount of the circuit pattern of the conductive foil.

The tape carrier has an inner lead on the conductor W34 for direct bonding to the semiconductor element, and it is desirable that the width of the inner lead is as constant as possible for the stability of the bond, and normally (A) ±5 μm 8 degrees is appropriate. be. In order to obtain this plate after etching the conductor foil 4, although it cannot be said unconditionally depending on the etching method, conditions, etc., the etching mask 1 is usually made thicker by correcting the thickness by about 10 to 10 μm. Here, if the correction i is αμm, then the etching amount confirmation pattern 2 has a length of 15μm, 2jμm.
m's m K. After that, the conductor foil 4 is etched, and if only the conductor foil pattern with a width of 5 μm remains among the etching amount confirmation patterns 2, the overetch amount is 15 μm or more. This means that it is within the standard ±5 Am.

Moreover, if neither of the two patterns remains, it can be determined that there is too much etching. Furthermore, if you increase the number of levels of pattern 2 for checking the amount of etching, you can check the amount left after etching and check if it is overetched! In other words, it is also possible to confirm the pattern width without measuring it.

Figure 2 is pattern 2 for checking the etching amount in Figure 1.
This is an enlarged view of 1. Normally, this pattern is confirmed using a low-magnification microscope, but as shown in Figure 3, it can be confirmed visually by increasing the number of etching amount confirmation patterns 2 of the same level to make it two-dimensional. becomes. The etching amount confirmation pattern may be placed anywhere on the substrate, and may be formed in the area where the circuit pattern is located, and its shape is not limited to a straight line.

Incidentally, the etching amount confirmation pattern is usually formed by a photo process, but the pattern width may also be increased or decreased by development. However, since the @ of all bars including the circuit pattern increases or decreases at the same rate, the width of the multi-circuit pattern can be determined based on the presence or absence of the etching amount confirmation pattern as described above.

FIG. 4 is a plan view of the circuit pattern after etching.

5 and 6 are a plan view and a sectional view showing a 6ft semiconductor device in which a semiconductor element 5 is bonded using the tape carrier 3 of the present invention.

In the above, fr: IIJ was used for the tape carrier, but the present invention is not limited to this. It can be applied to all kinds of circuit boards that use gold as a base material, such as glass and ceramics.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to confirm the circuit pattern width of a conductive foil simply by visually or observing the presence or absence of a pattern on the conductive foil using a microscope. It has the effect of being able to be manufactured stably.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an etching mask of a tape carrier according to one embodiment of the circuit board manufacturing method of the present invention, FIG. 2 is an enlarged plan view of the etching amount confirmation pattern of FIG. 1, and FIG. 3 is another embodiment. 4 is a plan view of a tape carrier after etching according to the present invention, FIG. 5 is a plan view of a semiconductor device using the tape carrier of the present invention, and FIG. 6 is a plan view of a pattern for confirming the amount of etching in a column. FIG. L...Etching mask 2-Pattern for checking the amount of snout etching 3--Tape carrier 4--Conductor foil 5-
Semiconductor confectionery 6.-Semiconductor device, Figure 4, Figure 5

Claims (1)

[Claims] A circuit board characterized in that the conductive foil is etched using an etching mask in which, in addition to a circuit pattern made of a predetermined conductive foil, a plurality of patterns having widths close to the etching correction amount of the circuit pattern are simultaneously formed. manufacturing method.