JPS6342292B2 - - Google Patents

Info

Publication number
JPS6342292B2
JPS6342292B2 JP55012443A JP1244380A JPS6342292B2 JP S6342292 B2 JPS6342292 B2 JP S6342292B2 JP 55012443 A JP55012443 A JP 55012443A JP 1244380 A JP1244380 A JP 1244380A JP S6342292 B2 JPS6342292 B2 JP S6342292B2
Authority
JP
Japan
Prior art keywords
program
storage device
list
application program
transferred
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55012443A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56110154A (en
Inventor
Kuniji Tanmachi
Tsutomu Ochiai
Kazuo Arakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP1244380A priority Critical patent/JPS56110154A/ja
Publication of JPS56110154A publication Critical patent/JPS56110154A/ja
Publication of JPS6342292B2 publication Critical patent/JPS6342292B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP1244380A 1980-02-06 1980-02-06 Sequence control system by microcomputer Granted JPS56110154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1244380A JPS56110154A (en) 1980-02-06 1980-02-06 Sequence control system by microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1244380A JPS56110154A (en) 1980-02-06 1980-02-06 Sequence control system by microcomputer

Publications (2)

Publication Number Publication Date
JPS56110154A JPS56110154A (en) 1981-09-01
JPS6342292B2 true JPS6342292B2 (en, 2012) 1988-08-23

Family

ID=11805450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1244380A Granted JPS56110154A (en) 1980-02-06 1980-02-06 Sequence control system by microcomputer

Country Status (1)

Country Link
JP (1) JPS56110154A (en, 2012)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0473936U (en, 2012) * 1990-11-04 1992-06-29
JPH08117143A (ja) * 1994-10-26 1996-05-14 Maeda:Kk ぬか袋

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62212842A (ja) * 1986-03-14 1987-09-18 Nec Corp 情報処理システムの仮想プロセスタイマ方式

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52131436A (en) * 1976-04-28 1977-11-04 Hitachi Ltd Interruption control system
US4177513A (en) * 1977-07-08 1979-12-04 International Business Machines Corporation Task handling apparatus for a computer system
JPS54111733A (en) * 1978-02-21 1979-09-01 Nec Corp Multiplex processor system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0473936U (en, 2012) * 1990-11-04 1992-06-29
JPH08117143A (ja) * 1994-10-26 1996-05-14 Maeda:Kk ぬか袋

Also Published As

Publication number Publication date
JPS56110154A (en) 1981-09-01

Similar Documents

Publication Publication Date Title
DK94528C (da) Fremgangsmåde til fremstilling af et fibermateriale.
JPS5652949A (en) Interruption control method
JPS6342292B2 (en, 2012)
JPS5299451A (en) Heating time controller
JPS547329A (en) Input data erasing method in computer controlling of copying machines
JPS57153360A (en) Disc device assembling system to computer system
JPS56162123A (en) Electronic computer system
JPS55143680A (en) General arithmetic system for pool matrix
JPS554603A (en) Sequential control system by microprogram
JPS5764810A (en) Production and control system of working program for sequence controller
JPS5515566A (en) Read system for doubled file
JPH0587859B2 (en, 2012)
Tovissi et al. A Model System for the Management of Discontinuous Processes in a Production Sector
Wissmann Model studies with a computer- Finite elements
USD183227S (en) Plastic-binding machine
JPH04146055A (ja) スケジュール作成方法
Kemp et al. Hydrologic modeling and data requirements for analysis of urban streamflow management alternatives
JPS5762648A (en) Input and output control system for teltgram
JPH0295449U (en, 2012)
JPS59114664A (ja) マルチプロセツサによる情報処理方式
JAMES Model behavior of a resource allocation system in a government research and development laboratory(Evaluation of resource allocation system in government research and development laboratory based on project selection and rate of progress)
JPS53139442A (en) Data input process control system
JPS5397733A (en) Automatic power source control device for information process system
BE586714A (fr) Procédé de conditionement d'elements photopolymérisables.
JPS55110352A (en) Backup system between data processors