JPS55110352A - Backup system between data processors - Google Patents

Backup system between data processors

Info

Publication number
JPS55110352A
JPS55110352A JP1764279A JP1764279A JPS55110352A JP S55110352 A JPS55110352 A JP S55110352A JP 1764279 A JP1764279 A JP 1764279A JP 1764279 A JP1764279 A JP 1764279A JP S55110352 A JPS55110352 A JP S55110352A
Authority
JP
Japan
Prior art keywords
control
information
status
nest
backing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1764279A
Other languages
Japanese (ja)
Inventor
Shigeru Yamamoto
Shinichi Takigishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Hokushin Electric Corp
Priority to JP1764279A priority Critical patent/JPS55110352A/en
Publication of JPS55110352A publication Critical patent/JPS55110352A/en
Pending legal-status Critical Current

Links

Landscapes

  • Feedback Control In General (AREA)

Abstract

PURPOSE: To facilitate smooth backing-up by controlling common status information by two CPUs and then by giving a right to control.
CONSTITUTION: When CPUμA with a right to control gets out of order and its activity signal RUN/DOWN stops arriving, control information ACTL and activity information ARDY in a nest control status fall through the operation of hardware. Then when nest control status control program CP is carried into effect, CPUμBi sets control information BCTL to the nest control status by knowing that the right to control is not determined and operation mode alternation switch K is placed at position AB. Next, backing-up operation starts on obtaining the right to control.
COPYRIGHT: (C)1980,JPO&Japio
JP1764279A 1979-02-16 1979-02-16 Backup system between data processors Pending JPS55110352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1764279A JPS55110352A (en) 1979-02-16 1979-02-16 Backup system between data processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1764279A JPS55110352A (en) 1979-02-16 1979-02-16 Backup system between data processors

Publications (1)

Publication Number Publication Date
JPS55110352A true JPS55110352A (en) 1980-08-25

Family

ID=11949506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1764279A Pending JPS55110352A (en) 1979-02-16 1979-02-16 Backup system between data processors

Country Status (1)

Country Link
JP (1) JPS55110352A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5915101U (en) * 1982-07-21 1984-01-30 富士電機株式会社 Controller backup device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5915101U (en) * 1982-07-21 1984-01-30 富士電機株式会社 Controller backup device

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