JPS6341242B2 - - Google Patents

Info

Publication number
JPS6341242B2
JPS6341242B2 JP16167682A JP16167682A JPS6341242B2 JP S6341242 B2 JPS6341242 B2 JP S6341242B2 JP 16167682 A JP16167682 A JP 16167682A JP 16167682 A JP16167682 A JP 16167682A JP S6341242 B2 JPS6341242 B2 JP S6341242B2
Authority
JP
Japan
Prior art keywords
fet
phase shifter
drain electrode
gate electrode
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16167682A
Other languages
Japanese (ja)
Other versions
JPS5951602A (en
Inventor
Shinkei Orime
Teruo Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16167682A priority Critical patent/JPS5951602A/en
Publication of JPS5951602A publication Critical patent/JPS5951602A/en
Publication of JPS6341242B2 publication Critical patent/JPS6341242B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/18Phase-shifters
    • H01P1/185Phase-shifters using a diode or a gas filled discharge tube

Description

【発明の詳細な説明】 この発明は、半導体基板に構成し、FETを制
御素子として用いたマイクロ波の位相を制御する
ローデツトライン形半導体移相器の高性能化に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improving the performance of a Rodet line type semiconductor phase shifter that is constructed on a semiconductor substrate and uses an FET as a control element to control the phase of microwaves.

まず従来の半導体移相器について説明する。 First, a conventional semiconductor phase shifter will be explained.

第1図は従来のローデツドライン形半導体移相
器の構造の一例を示す。
FIG. 1 shows an example of the structure of a conventional loaded line type semiconductor phase shifter.

図中、1は半導体基板、2は地導体、3は地導
体2と共に構成されるマイクロストリツプ線路の
主線路、4は同じく分岐線路、5はFET、6は
FET5のドレイン電極、7は同じくソース電極、
8は同じくゲート電極、9はソース電極7と地導
体2を接続する貫通導体、10はゲート電極8に
バイアスを印加するためのマイクロストリツプ線
路からなるバイアス回路である。
In the figure, 1 is a semiconductor substrate, 2 is a ground conductor, 3 is a main line of a microstrip line configured together with the ground conductor 2, 4 is a branch line, 5 is an FET, and 6 is a
The drain electrode of FET5, 7 is also the source electrode,
8 is a gate electrode, 9 is a through conductor connecting the source electrode 7 and the ground conductor 2, and 10 is a bias circuit consisting of a microstrip line for applying a bias to the gate electrode 8.

主線路3に概略1/4波長間隔で2本の分岐線路
4を接続し、分岐線路4の他の一端にはFET5
が接続された構成である。このような構成を有す
る半導体移相器は、ゲート電極8へ印加するバイ
アス電圧を変えることによりドレイン、ソース間
がマイクロ波に対して示すインピーダンスを変
え、分岐線路4と主線路3の接続点からFET5
側を見たインピーダンスを同時に容量性から誘導
性へ、またその逆へと変えることにより主線路を
伝搬するマイクロ波の位相を変え、移相器として
動作している。
Two branch lines 4 are connected to the main line 3 at approximately 1/4 wavelength intervals, and an FET 5 is connected to the other end of the branch line 4.
are connected. The semiconductor phase shifter having such a configuration changes the impedance between the drain and the source with respect to microwaves by changing the bias voltage applied to the gate electrode 8, and FET5
By simultaneously changing the impedance when looking at the side from capacitive to inductive and vice versa, it changes the phase of the microwave propagating through the main line and operates as a phase shifter.

ところが、ローデツドライン形導体移相器は2
個のFETの特性に差があると、移相器の位相特
性、損失特性、反射特性が劣化する。
However, the loaded line type conductor phase shifter has 2
If there are differences in the characteristics of the individual FETs, the phase characteristics, loss characteristics, and reflection characteristics of the phase shifter will deteriorate.

そのため、2個のFETの特性が揃うことが要
求されるが、一般に同一半導体基板に構成された
場合でも異なるFET間には特性のバラツキが見
られ、この種の半導体移相器を製作する上での問
題となつていた。さらに前述した如く、分岐線路
4と主線路3の接続点からFET5側を見たイン
ピーダンスを同時に、例えば容量性から誘導性へ
切換える機能を単に有すればよいとするならば、
半導体移相器の小形化、簡素化の為にはバイアス
回路を極力少なくしたいという潜在的要求があ
る。
Therefore, it is required that the characteristics of the two FETs be the same, but in general, there are variations in characteristics between different FETs even when they are configured on the same semiconductor substrate, so it is difficult to manufacture this type of semiconductor phase shifter. It was becoming a problem. Furthermore, as mentioned above, if it is sufficient to simply have a function of simultaneously switching the impedance viewed from the connection point of the branch line 4 and the main line 3 to the FET 5 side, for example from capacitive to inductive, then
In order to downsize and simplify semiconductor phase shifters, there is a latent demand for reducing the number of bias circuits as much as possible.

この発明は、上記問題を解決する為、一個の
FETのドレインを分離し、ゲートをマイクロ波
的には分離し、直流的には共通となる構成とし、
かつソースを共通にした構成を有するFETをロ
ーデツドライン形半導体移相器に用い、FETの
特性の不揃いによる移相器特性の劣化を無くし、
かつバイアス回路数の削減を行ないかつ小形化す
ることを目的としたもので以下詳細に説明する。
In order to solve the above problem, this invention provides one
The drain of the FET is separated, the gate is separated in terms of microwaves, and the structure is common in terms of DC.
In addition, FETs with a common source configuration are used in loaded line semiconductor phase shifters to eliminate deterioration of phase shifter characteristics due to uneven FET characteristics.
The purpose of the present invention is to reduce the number of bias circuits and downsize the circuit, and will be described in detail below.

第2図はこの発明の一実施例を示す半導体移相
器の構成図であり、ここで用いられるFET11
はドレイン及びゲートをそれぞれ2分し、それぞ
れ第1のドレイン電極12、第2のドレイン電極
13および第1のゲート電極14、第2のゲート
電極15を構成しソースは共通にして共通ソース
電極16を貫通導体9によつて地導体2と接続し
た構成である。
FIG. 2 is a block diagram of a semiconductor phase shifter showing one embodiment of the present invention, and the FET 11 used here is
divides the drain and gate into two, forming a first drain electrode 12, a second drain electrode 13, a first gate electrode 14, and a second gate electrode 15, respectively, and a common source electrode 16 with a common source. is connected to the ground conductor 2 by a through conductor 9.

また、第1のゲート電極14、第2のゲート電
極15はキヤパシタ17に双方接続され、そのキ
ヤパシタ17の一端に更にバイアス回路18が接
続され、ゲート電極にバイアス電圧を印加するよ
うにしている。
Further, the first gate electrode 14 and the second gate electrode 15 are both connected to a capacitor 17, and a bias circuit 18 is further connected to one end of the capacitor 17 to apply a bias voltage to the gate electrode.

さらに、第1のドレイン電極12は一方の分岐
線路4に第2のドレイン電極13はもう一方の分
岐線路4に接続され、これら分岐線路4の一端
は、主線路3に概略1/4波長の間隔を持つて接続
されている。
Further, the first drain electrode 12 is connected to one branch line 4, and the second drain electrode 13 is connected to the other branch line 4, and one end of these branch lines 4 is connected to the main line 3 with approximately 1/4 wavelength. Connected with intervals.

上記構成の半導体移相器は、バイアス回路18
を介して印加されるバイアス電圧を変えることに
より、第1のドレインとソース、第2のドレイン
とソース間がマイクロ波に対して示すインピーダ
ンスが変わり、主線路3に概略1/4波長間隔で装
荷されるサセプタンス値が変化するため主線路3
を伝搬するマイクロ波の位相が変わり移相器とし
て動作している。
The semiconductor phase shifter having the above configuration has a bias circuit 18
By changing the bias voltage applied through the , the impedance shown to microwaves between the first drain and source and between the second drain and source changes, and the main line 3 is loaded at approximately 1/4 wavelength intervals. Because the susceptance value changes, the main line 3
The phase of the microwave propagating changes and operates as a phase shifter.

この時、キヤパシタ17は非常に重要な役割を
演じている。即ち、主線路3にマイクロが入射さ
れると、当然前述した動作からも明らかなように
第1のゲート電極14及び第2のゲート電極15
にもマイクロ波が結合される。その結合されたそ
れぞれのマイクロ波が互に干渉をおこすと分岐線
路4と主線路3の接続点からFET11側を見た
インピーダンスを、第1のゲート電極14及び第
2のゲート電極15に印加するバイアス電圧を変
えることにより、同時に所望の容量性から誘導性
へまたはその逆へと変えることが困難となる。そ
こでキヤパシタ17はそれらの不具合を解決する
為に設けられており、それぞれのゲート電極14
及15に結合したマイクロ波をバイパスしてアー
スにシヨートし、それぞれの相互干渉をなくす働
きをするとともにバイアス電源をそれぞれのゲー
ト電極14及び15に一点供給する為の中継点と
もなり小形化に寄与している。
At this time, the capacitor 17 plays a very important role. That is, when a micro beam is incident on the main line 3, the first gate electrode 14 and the second gate electrode 15 are
Microwaves are also coupled. When the combined microwaves interfere with each other, an impedance viewed from the connection point of the branch line 4 and the main line 3 to the FET 11 side is applied to the first gate electrode 14 and the second gate electrode 15. By changing the bias voltage, it becomes difficult to change from the desired capacitive to inductive or vice versa at the same time. Therefore, the capacitor 17 is provided to solve these problems, and the capacitor 17 is provided for each gate electrode 14.
It bypasses the microwaves coupled to the gate electrodes 14 and 15 and shoots them to the ground, and serves to eliminate mutual interference between them. It also serves as a relay point for supplying bias power to each gate electrode 14 and 15 at one point, contributing to miniaturization. are doing.

このように構成された移相器では、FET11
内の第1のドレイン電極12、第1のゲート電極
14と共通ソース電極16及び第2のドレイン電
極13、第2のゲート電極15と共通ソース電極
16が極めて接近した位置に製作されそれぞれ以
かよつた特性となる。
In the phase shifter configured in this way, FET11
The first drain electrode 12, the first gate electrode 14 and the common source electrode 16, and the second drain electrode 13, and the second gate electrode 15 and the common source electrode 16 are fabricated in extremely close positions. It has ivy characteristics.

そのため、第1のドレイン電極12とソース電
極16間および第2のドレイン電極13とソース
電極16間がマイクロ波に対して示すインピーダ
ンスが等しくなり、このFET11を用いて製作
したローデツドライン形半導体移相器は、FET
の特性不揃による性能劣化を防ぐことができると
ともに、前述したバイアス回路の簡素化にともな
り半導体移相器の小形化を実現することができ
る。
Therefore, the impedance shown to microwaves between the first drain electrode 12 and the source electrode 16 and between the second drain electrode 13 and the source electrode 16 becomes equal, and the loaded line type semiconductor transistor manufactured using this FET 11 Phase device is FET
It is possible to prevent performance deterioration due to uneven characteristics of the semiconductor phase shifter, and the semiconductor phase shifter can be downsized due to the simplification of the bias circuit described above.

なお、以上は、主線路3が直線的に配置された
場合について説明したが、この発明はこれに限ら
ず各分岐線路4の間の主線路3を折り曲げ伝搬方
向に小形化をはかつた半導体移相器に適用しても
よい。
Although the above description has been made regarding the case in which the main line 3 is arranged linearly, the present invention is not limited to this, and the present invention is not limited to this, but the present invention is also applicable to semiconductors in which the main line 3 between each branch line 4 is bent to reduce the size in the propagation direction. It may also be applied to a phase shifter.

またこの発明による半導体移相器を縦続接続し
た多ビツトデイジタル半導体移相器に適用しても
よいのは当然である。またこの発明によるキヤパ
シタについてはオーバレイ、インターデイジタル
その他のタイプにはとらわれないのは当然であ
る。
It goes without saying that the semiconductor phase shifter according to the present invention may also be applied to a multi-bit digital semiconductor phase shifter in which the semiconductor phase shifter is cascaded. Furthermore, the capacitor according to the present invention is naturally not limited to overlay, interdigital, or other types.

以上のように、この発明に係る半導体移相器で
は、概略1/4波長間隔で主線路に接続さる2本の
分岐線路の先端に特性の類似したFETを装荷で
き、かつキヤパシタにそれぞれのゲートを接続し
ている為、バイアス回路の簡素化が実現でき、特
性の良好でかつ小形化、簡素化を計つた半導体移
相器が実現でき、その工業的価値は高い。
As described above, in the semiconductor phase shifter according to the present invention, FETs with similar characteristics can be loaded at the ends of two branch lines connected to the main line at approximately 1/4 wavelength intervals, and the capacitors can be connected to the respective gates. Since the bias circuit is connected, it is possible to simplify the bias circuit, and it is possible to realize a semiconductor phase shifter that has good characteristics and is compact and simple, and its industrial value is high.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のローデツドライン形半導体移相
器の構造を示す斜視図、第2図はこの発明の一実
施例を示す斜視図である。 図中1は半導体基板、2は地導体、3は主線
路、4は分岐線路、5はFET、6はドレイン電
極、7はソース電極、8はゲート電極、9は貫通
導体、10はバイアス回路、11はFET、12
は第1のドレイン電極、13は第2のドレイン電
極、14は第1のゲート電極、15は第2のゲー
ト電極、16は共通ソース電極、17はキヤパシ
タ及び18はバイアス回路である。なお、図中、
同一あるいは相当部分には同一符号を付してあ
る。
FIG. 1 is a perspective view showing the structure of a conventional loaded line type semiconductor phase shifter, and FIG. 2 is a perspective view showing an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a ground conductor, 3 is a main line, 4 is a branch line, 5 is an FET, 6 is a drain electrode, 7 is a source electrode, 8 is a gate electrode, 9 is a through conductor, and 10 is a bias circuit , 11 is FET, 12
13 is a first drain electrode, 13 is a second drain electrode, 14 is a first gate electrode, 15 is a second gate electrode, 16 is a common source electrode, 17 is a capacitor, and 18 is a bias circuit. In addition, in the figure,
Identical or equivalent parts are given the same reference numerals.

Claims (1)

【特許請求の範囲】[Claims] 1 上記半導体基板に構成したマイクロストリツ
プ線路にFETを接続してなる半導体移相器にお
いてマイクロストリツプ線路から成る主線路に概
略1/4波長間隔でマイクロストリツプ線路から成
る2本の分岐線路の一端を接続し、また上記2本
の分岐線路の他の一端はFETの第1のドレイン
電極と第2のドレイン電極にそれぞれ接続し、上
記第1および第2の各ドレイン電極に対し、共通
に設けられた上記FETのソース電極を接地し、
かつ上記FETの第1のドレイン電極とソース電
極間の第1のゲート電極および第2のドレイン電
極間の第2のゲート電極をキヤパシタの一方の導
体に接続し、かつ上記キヤパシタの他方の導体は
接地導体であるとともに、上記キヤパシタの第1
および第2のゲート電極接続側の一端をバイアス
回路に接続したことを特徴とする半導体移相器。
1 In a semiconductor phase shifter in which an FET is connected to a microstrip line constructed on the semiconductor substrate, a main line consisting of a microstrip line is connected to two lines consisting of a microstrip line at approximately 1/4 wavelength intervals. One end of the branch line of the above two branch lines is connected, and the other end of the above two branch lines is connected to the first drain electrode and the second drain electrode of the FET, respectively, and the other end of the above two branch lines is connected to the first drain electrode and the second drain electrode of the FET. On the other hand, the source electrode of the above FET provided in common is grounded,
and a first gate electrode between the first drain electrode and the source electrode of the FET and a second gate electrode between the second drain electrode are connected to one conductor of a capacitor, and the other conductor of the capacitor is In addition to being a grounding conductor, the first
and a semiconductor phase shifter, characterized in that one end of the second gate electrode connection side is connected to a bias circuit.
JP16167682A 1982-09-17 1982-09-17 Semiconductor phase shifter Granted JPS5951602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16167682A JPS5951602A (en) 1982-09-17 1982-09-17 Semiconductor phase shifter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16167682A JPS5951602A (en) 1982-09-17 1982-09-17 Semiconductor phase shifter

Publications (2)

Publication Number Publication Date
JPS5951602A JPS5951602A (en) 1984-03-26
JPS6341242B2 true JPS6341242B2 (en) 1988-08-16

Family

ID=15739718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16167682A Granted JPS5951602A (en) 1982-09-17 1982-09-17 Semiconductor phase shifter

Country Status (1)

Country Link
JP (1) JPS5951602A (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4801901A (en) * 1987-03-13 1989-01-31 Hittite Microwave Corporation Non-ferrite non-reciprocal phase shifter and circulator
JPS63246901A (en) * 1987-04-02 1988-10-13 Mitsubishi Electric Corp Loaded line type semiconductor phase shifter
JPS63276902A (en) * 1987-04-02 1988-11-15 Mitsubishi Electric Corp Hybrid coupler type semiconductor phase shifter
GB2207805B (en) * 1987-08-06 1991-12-11 Plessey Co Plc Improvements in or relating to microwave phase shifters
JPH07101801B2 (en) * 1989-08-09 1995-11-01 三菱電機株式会社 Loaded line type phase shifter
JPH0421201A (en) * 1990-05-16 1992-01-24 Toyota Central Res & Dev Lab Inc Phase shifter
KR950014523B1 (en) * 1991-04-29 1995-12-05 주식회사 코오롱 Aromatic polyamide pulp and preparation method thereof
JP6972975B2 (en) 2017-11-29 2021-11-24 横浜ゴム株式会社 Pneumatic tires

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