JPS6338992A - Electronic musical instrument - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sound source type electronic musical instrument that has many tone parameters.

[Prior art and problems]

Conventionally, in order to generate musical instrument sounds in electronic musical instruments, V
CO (Voltage Controlled 0sc
A signal waveform called the original waveform is first generated by an oscillation circuit such as a VCF (Vottt
A frequency F/note sub-control filter such as Lgtt Controlledpiltttr
(Voltage Controlled), mpl
By applying a volume characteristic control circuit such as
CO,'VCF.

LFQ (Low Frequeng)
0scillator).

Many methods have been used to supply temporal characteristic data using an EG (Envelope Generator) or the like.

In such electronic musical instruments, the parameters that determine the final musical tone signal are the harmonic spectrum of the original waveform and the resonance characteristics of the VCF.

VCF cutoff frequency, EG parameters for VCF or VCA (attack, decay, sustain nine,
release), vibrato, voltamento, tremolo, etc. However, in musical tone synthesis using this method,
Although it is possible to generate various tones as an instrument sound with a fixed pitch, it is a "musical sound" in a broader sense that goes beyond the general concept of "instrumental sound", that is, a sound with extreme characteristics that changes rapidly and then returns to its original state. It is difficult to generate sound effects, stimulating sounds, etc.
This method has a drawback in that it has limitations in the case of sound source systems for musical instruments that want to expand the parameters and generate special sound effects.

Furthermore, even in electronic musical instruments that use the so-called "waveform readout method," in which a fixed waveform pattern stored in a memory circuit is read out in accordance with the musical tone frequency and used as the original waveform, the musical tone frequency is used as the standard for the address from which the waveform data is read. In this case, as mentioned above, it is difficult to generate musical sounds that go beyond the realm of general "instrument sounds," and even if modulation is performed in the effect circuit at a later stage, the parameters can be expanded to create special effects. The drawback is that there are limitations when it comes to sound source systems for musical instruments that require the generation of sound.

The inventor of the present invention has thought of realizing the synthesis of musical tones that is difficult to generate using the above-mentioned normal musical tone synthesis method or waveform readout method, without increasing the circuit size. It is.

An object of the present invention is to provide an electronic musical instrument that can generate special sound effects, stimulating sounds, etc. that are difficult to generate using conventional methods.

[Means for solving problems]

In order to achieve the above object, the present invention includes a plurality of waveform generation circuits that generate waveform signals based on a plurality of types of waveform parameters, a plurality of envelope generation circuits that generate envelope signals based on a plurality of types of envelope parameters, a plurality of modulation circuits that modulate the output signal of the waveform generation circuit with the output signal of the envelope circuit; A plurality of designation circuits are provided to designate and supply the envelope parameters as part of the envelope parameters.

[For production]

With the above configuration, a plurality of types of waveform parameters and a part of a plurality of types of envelope parameters are specified, and the output signal of the waveform generation circuit generated by the waveform parameter is modulated by the output of the envelope circuit generated by the envelope parameter, Using these logic circuit gates, it is possible to generate rapidly changing musical tones, special sound effects, stimulating sounds, etc. using a special combination of gates.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic explanatory diagram of an embodiment of an electronic musical instrument according to the present invention, in which 1 is a keyboard, 2 is a CPU circuit, 3 is a sound source circuit, and 4
5 is a sound system, and 5 is a system memory circuit.

That is, in FIG. 1, the operation of the entire musical instrument is controlled by a CPU circuit 2. In FIG. The CPU circuit 2 detects performance operations on the keyboard 1, and further detects information on tablet switches, panel switches, etc., as necessary. These operating parameters are stored in the system memory circuit 5 and referenced as needed. When generating a musical tone, the CPU circuit 2 passes the ON-OFF control of the musical tone to the sound source circuit 3.
Information, pitch information, timbre information, etc. are supplied, and the musical sound signal generated by the sound source circuit 3 is converted into sound by a sound system 4 including an amplifier and a speaker, and is generated as a musical instrument sound.

Diagram M2 shows the sound source circuit 3 which is the main part of the present invention shown in FIG.
This is the configuration theory BA diagram, 11 is the parameter specification circuit, 1
2, the waveform generation circuit A 116 is a waveform generation circuit B, and 14, the waveform generation circuit 0116 is a control bus.

That is, in the second example, five sets of 17, 18, and 19 are shown as blocks that each generate one sound, and one
The waveform generation circuits composing blocks 7 are A, B,
Similarly, if the system generates 8 tones, 8 sets of blocks are used, and if you want to make the operation more complex, you can use the waveform generation circuit in 1 block. This can be easily achieved by combining a larger number.

Note that this block is conceptual, and it is possible to actually line up the same number of blocks as an analog circuit.Furthermore, if you use the time division processing method of digital circuits, you can use the same circuit at different times. It can also be thought of as a slot operation.

Regarding this one block 17, the parameter designation circuit 11 receives control information 10 from the CPU circuit and supplies predetermined parameter supply designation information to the control bus 16. Waveform generation circuits (A) with mutually equivalent functions
12, Waveform generation circuit (B) 13, Waveform generation circuit (C) 1
4 inputs predetermined musical tone generation parameters and performance information from the control bus 16, and performs a predetermined waveform generation operation 't to be described later.
- The output signal of this block 17 is the output signal 15 of the waveform generation circuit (C) 14, which is supplied to the subsequent stage. Here, the outputs of six blocks 17, 18, and 19 are mixed to obtain a sound source circuit output 20.

FIG. 6 is a detailed configuration diagram of the waveform generation circuit (C) 14 shown in FIG. 2, and 21 is a frequency data generation circuit (DCO).
, 22 is a waveform memory (RAM) circuit, 26 is a logic processing circuit, 24 is an envelope (DEC) generation circuit, and 25 is a modulation circuit.

That is, in the example of FIG. 6, 17 in FIG.
A shown as a waveform generation circuit constituting a block of
The waveform generating circuit (C) 14 is shown as one of the six waveform generating circuits B and C, and the remaining waveform generating circuits have the same function. Note that these three waveform generation circuits are conceptual, and it is possible to actually line up as many analog circuits as there are circuits, and furthermore, if you use a time-division processing method for digital circuits, they can be identical. It can also be considered as the operation of different time slots of the circuit. Regarding this waveform generation circuit 14, information given to the control bus 16 via the parameter specification circuit 11 causes the frequency data generation circuit (DCO
) 21 generates an output signal of predetermined frequency data. Based on this output signal and the waveform selection signal applied from the control bus 16, predetermined waveform data is read out from the waveform memory circuit 22. If the frequency data generation circuit 21 is an analog oscillation circuit, this can be easily achieved by converting its output into a digital address signal using a counter. If so, you can use the output as is. It is also possible to directly write μ as the waveform data stored in the waveform memory circuit 22 from the CPU circuit 2 via the control bus 16 and further via the parameter designation circuit 11.
In the signal processing circuit 23, the signal is subjected to predetermined logical operations such as inversion, shift, and limiting operations, and if necessary, is subjected to D/A (digital-to-analog) conversion and supplied to the modulation circuit 25. The operating parameters of this logic processing circuit 26 can also be specified by the CPU circuit 2 via the control bus 16 and the parameter specification circuit 11. On the other hand, according to predetermined parameters from the control bus 16, an envelope generation circuit (DEC) 24 generates a time-varying % forward signal and supplies it to a modulation circuit 25. In the modulation circuit 25, the input signal from the logic processing circuit 23 is modulated according to a predetermined operation by the input signal from the envelope circuit 24, and the output signal is output from the control bus 16, and is also output from the output stage of the block. For example, it is supplied to a subsequent stage as a sound source output signal 15. The modulation operation parameters of this modulation circuit 25 can also be set from the CPU circuit 2 via the control bus 16 and the parameter designation circuit 11.

FIG. 4 is a detailed diagram of the frequency data generation circuit 21 and waveform memory circuit 22 shown in FIG. It is.

That is, in the example of FIG. 4, frequency data applied from the control bus 16 is set in the latch circuit 66 by the latch pulse 37 under the control of the parameter designation circuit 11. Based on this frequency data, the oscillator circuit 6
1, a clock signal of a predetermined frequency is generated and supplied to the counter circuit 32. The counter circuit 32 generates a counter output signal according to the input clock signal, and this is guided to the AND gate group circuit 36. The oscillator circuit 31 and the counter circuit 32 here are just one example, and when actually realized, the output of the two-way circuit 33 is set to -H/A.
It is also possible to perform both functions by converting the signal and applying it to vCO, by using a logarithm counter, by using a grid center divider means of a rate multiplier, or by using an addition accumulator. What is important about the operation of the present invention is that the data written to the latch circuit 36 is not limited to constant pitch information from the CPU circuit 2, but changes periodically as an output signal of another waveform generating circuit, for example. If a signal with an envelope is given as the output signal of another waveform generation circuit, a modulation effect such as vibrato will be applied, and if a signal with an envelope is given as the output signal of another waveform generation circuit, a wave (voltament)-like modulation will occur. The effect is easy to obtain. The output signal of the counter circuit 62 obtained in this way and the latch pulse 38K controlled by the parameter specifying circuit 11 are combined with the latch circuit 64.
The gate control information set in 1 is individually subjected to AND operation processing by the AND gate group circuit 36. That is, when the corresponding bit of the latch circuit 64 is set to 1>, the data of that bit is directly supplied to the corresponding pin of the waveform memory circuit 22, and the corresponding bit of the latch circuit 64 is set to 0>. When set, the data of that bit is supplied to the corresponding bit of the waveform memory circuit 22 as 0>. This is an operation on the address to read the waveform data) and sets a small number of bits to <0.
By simply setting >, it is possible to make the output waveform data of the waveform memory circuit 22 suddenly discontinuous, and the frequency characteristics of the generated signal waveform can be significantly changed. What is important about the operation according to the present invention is that the data written to the latch circuit 64' is not limited to a fixed mask value from the CPU circuit 2, but is suddenly written as an output signal of another waveform generating circuit, for example. When data that changes is given, a highly noisy output signal can be obtained, and rapid changes that could not be achieved with conventional sound source methods can be obtained. In addition to the address word thus obtained, the waveform memory puncture switching data set in the latch circuit 35 by the latch pulse 59 under the control of the parameter designation circuit 11 is also given to the waveform memory circuit 22. In addition to the conventional production method of switching the tone bank based on the settings from the CFU cycle, it is also possible to change the original waveform rapidly during sound generation. in this case,
The state of a specific bit of the output signal of another waveform generating circuit may be set in the two-way circuit 65 by the latch pulse 59 controlled by the parameter specifying circuit 11.

Through the processing described above, it becomes possible to function as a sound source circuit that dramatically increases the possibility of generated waveform signals without significantly increasing the circuit scale compared to the conventional sound source system. In this example, the filled-in portion shown as the AND gate group circuit 66 is an adder circuit that adds the output signals of the counter circuit 32 and the latch circuit 34, and the counter circuit 32 and the latch circuit 64 are It is easy to use a multiplication circuit that multiplies the output signals of each other, and it can also be easily replaced with a subtraction circuit, a division circuit 2 inverting circuit, an OR gate group circuit, an exclusive OR gate group circuit 9, etc., and each has sufficient capacity. Choose something that can be expected to be effective. The output signal 40 obtained from the waveform memory circuit 22 in this manner is transmitted to the logic processing circuit 2 shown in FIG.
3.

′? Figure J5 is a detailed explanatory diagram of the logic processing circuit 26 shown in the sixth factor, in which 41 to 46 are latch circuits, 47 is an exclusive OR gate group circuit, 48 is an AND gate group circuit, and 49 is an OR gate group circuit. be.

That is, in the example shown in FIG. 5, the first logic processing data given from the control bus 16 is sent to the latch circuit 41 by the latch pulse 44 under the control of the parameter designation circuit.
, and is supplied to the exclusive OR gate group circuit 47, while the output signal 40 from the waveform memory circuit 22 is supplied as another input to the exclusive OR gate group circuit 47.

The two series of input signals obtained in this way are individually processed by the exclusive OR gate group circuit 47 to generate an exclusive OR wave y.
! be satiated. In other words, if the two inputs of the corresponding bit are both 1〉 or K0〉, the output of that bit will be <0>, and the corresponding focus will be 2.
If the two inputs are different, the output of that bit will be 1>. This is a direct digital operation on the input waveform f, and means that for the bit of data given from the latch circuit 41, the other input is inverted, and the latch circuit If it is possible to make the input data suddenly discontinuous by simply setting the focus of a small number of 41 to 1>, it is possible to significantly change the frequency characteristics of the generated signal waveform. What is important about the operation of the present invention is that the data stored in the latch circuit 41 is not limited to a fixed predetermined value from the CPU circuit 2, but changes suddenly as an output signal of another waveform generating circuit, for example. If such data is given, a highly noisy output signal can be obtained, and rapid changes that could not be achieved with conventional sound source methods can be obtained. The output signal thus obtained is supplied to the AND gate 1# circuit 48, while the second logic processing data given from the control bus 16 is supplied to the parameter designation circuit 1
The latch circuit 4 is controlled by the latch pulse 45 controlled by the latch circuit 4.
Set to 2 and gate! The signal is supplied to the P circuit 48. These two series of input signals are individually subjected to AND operation processing by the AND gate group circuit 48.

That is, both inputs of corresponding bits are 1>
Only when , the output of that bit becomes <1>; otherwise, the output of that bit becomes 0). This means that for bits whose data is 0〉 given by the latch circuit 42 through direct digital manipulation of the input waveform data, the other input is forcibly set to 0〉. However, by simply setting the focus of a small number of the two-way circuits 42 to 0, it is possible to make the input data suddenly discontinuous, and the frequency characteristics of the generated signal waveform can be significantly changed. It is. What is important about the operation of the present invention is that the data written to the latch circuit 42 is not limited to, for example, a certain mask value set by the CPU circuit 2 in order to limit the output range within a certain value. For example, if data that changes rapidly is given as the output signal of another waveform generation circuit, a strongly noisy output signal will be obtained. You can get change. The output signal thus obtained is supplied to the OR gate group circuit 49, while the control bus 1
The sixth logic processing data given from 6 is set in the latch circuit 46 by the latch pulse 46K under the control of the parameter designation circuit 11, and is supplied to the OR gate group circuit 49. These two series of input signals are individually subjected to OR operation processing by an OR gate group circuit 49. That is,
Only when the two inputs of the corresponding bit are both <0>, the output of that focus becomes <0>; otherwise, the output of that bit becomes <1>. This means that for the data bit given from the latch circuit 46 by direct digital manipulation on the input waveform data, the other input is forcibly set to 1). However, by simply setting a few bits of the latch circuit 43 to 1), it is possible to make the input data suddenly discontinuous1), which greatly changes the frequency characteristics of the generated signal waveform. It is. What is important about the operation of the present invention is that the data written to the latch circuit 43 is not limited to, for example, a fixed offset value set by the CPU circuit 2 in order to increase the output level to a fixed value or higher; If data that changes rapidly is given as the output signal of another waveform generation circuit, a strongly noisy output signal will be obtained), and the sudden change that could not be achieved with conventional sound source methods. is obtained. The output signal 50 obtained in this way is the sixth
The signal is supplied to the modulation layer circuit 25 shown in the figure.

FIG. 6 is a detailed diagram of the envelope generating circuit 24 shown in the sixth factor, 51 to 56 are latch circuits, and 57 is an envelope generator circuit.

That is, in the example of FIG. 6, predetermined attack level setting data given from the control bus 16 is set in the latch circuit 51 by a latch pulse controlled by the parameter designation circuit 11, and is supplied to the envelope generator circuit 57. Predetermined attack speed setting data given from the control bus 16 is transmitted to the parameter specifying circuit 11.
The predetermined decay level setting data given from the control bus 16 is set in the latch circuit 52 by the latch pulse under the control of the parameter specifying circuit 11 and supplied to the envelope generator circuit 57. 53 and supplied to the envelope generator circuit 57, and predetermined Decay speed setting data given from the control bus 16 is set in the latch circuit 54 by a latch pulse controlled by the parameter designation circuit 11, and is supplied to the envelope generator circuit 57. The predetermined sustain level setting data given from the control bus 16 is set in the latch circuit 55 by a latch pulse controlled by the parameter designation circuit, and is supplied to the envelope generator circuit 57, and given from the control bus 16. Predetermined release speed setting data is set in the latch circuit 56 by a latch pulse controlled by the parameter designation circuit 11 and supplied to the envelope generator circuit 57. The envelope generator circuit 57 generates an envelope output signal of a predetermined shape, that is, a time-varying characteristic signal, based on these input signals and the sound generation start information, and supplies it as an output signal 58 to the modulation circuit 25 shown in FIG.

In order to actually realize this configuration example, the output signal of each latch circuit may be converted into an In/A signal and supplied as an analog quantity to an analog envelope generator, or the output signal of each latch circuit may be converted into an analog quantity, or the function may be generated entirely digitally. It may also be used as a circuit. Regarding the output signal 58, depending on the operation form of the modulation circuit in the subsequent stage, it may be outputted as an f digital quantity, or it may be outputted as a V
It is also optional to perform A conversion to obtain an analog quantity. Although this is an important operation according to the present invention, in the conventional system, the data written to each latch circuit is
Whereas it was limited to a constant envelope parameter value set from the PU circuit 2, for example, if data that changes rapidly is given as an output signal of another waveform generation circuit, it will cause a modulation effect on the envelope itself. Second, as a result, a highly unexpected output signal is obtained, and more rapid changes than can be achieved with conventional sound source systems can be obtained.

FIG. 7 is a detailed diagram of the modulation circuit 25 shown in FIG.
62 is a multiplication circuit, 64 is a latch circuit, and 63 is an AND gate group circuit.

That is, in the example h of FIG. 7, the output signal 50 of the logic processing circuit 26 described above and the output signal 58 of the envelope generation circuit 24 described above are supplied to the multiplication circuit 62 in the form of digital quantities. . This modulation is so-called AM modulation, and when sine focus is used for multiplication, it is so-called ring modulation.

For example, if the envelope input signal is an analog quantity, this arithmetic processing may be performed by analog multiplication using multiplication-type D/A conversion, and the principle is the same regardless of the data format.

This output is supplied here as a digital quantity to an AND gate group circuit 66. On the other hand, the modulation data given from the control bus 16 is the parameter specified o.

A latch circuit 64 is set by a latch pulse 66 under the control of line 11. The two series of input signals thus obtained are individually subjected to AND operation processing by the AND gate evaluation circuit 63. That is, when the corresponding bit of the latch circuit 640 is set to 1>, the data of that focus is directly supplied as the corresponding pin of the output signal 65, and the corresponding bit of the latch circuit 64 is set to 0>.
When the bit is set, the data of that bit is set as 0> and is supplied as the corresponding bit of the output signal 65.

This is a direct digital operation on the output data, and by simply setting a small number of bits to 0, it is possible to make the output waveform data suddenly decrease and become discontinuous, and the frequency characteristics of the generated signal waveform. can be changed significantly.

What is important about the operation according to the present invention is that the data written to the latch circuit 66 is not limited to a fixed mask value from the CPU circuit 2, but rather, for example, data that changes rapidly as an output signal from another waveform generation circuit. hb in that a highly noisy output signal is obtained when data is given, and rapid changes that could not be achieved with conventional sound source systems can be obtained.

The output signal 65 obtained in this way is I)/
The A-converted output signal 65 is supplied to the sound system 4 as an output signal 20, and furthermore, in all waveform generation circuits, the output signal 65 is sent to the control bus 1 via a three-state gate, for example.
6, and is supplied as a parameter to a predetermined portion of a predetermined waveform generating circuit under the control of the parameter specifying circuit 11, and is specified to a latch circuit for storing parameters at a necessary location.

FIG. 8 is an operation explanatory diagram for explaining the operation of the sound source circuits shown in FIGS. 2 to 7, and 7o is a first waveform generation circuit, 71 is a second waveform generation circuit, and 72 is an operation explanatory diagram for explaining the operation of the sound source circuit shown in FIGS. This is a sixth waveform generation circuit.

That is, in the example of FIG. 8, the part of the waveform memory circuit 22 of the waveform generation circuit described above is omitted for the sake of simplicity, and an example of the flow of parameters exchanged via the control bus 16 is shown. be.

In the same figure, a first waveform generation circuit 70, a second waveform generation circuit 71, and a sixth waveform generation circuit 72 are respectively a frequency data generation circuit, a logic processing circuit, an envelope generation circuit, and a modulation circuit. have. In this example, the output signal 73 from the modulation circuit of the first waveform generation circuit 70 is supplied as a parameter to the frequency data generation circuit of the second π-type generation circuit 71 via the control bus and the parameter specification circuit 11. be done. Further, the output signal 74 from the modulation circuit of the second waveform generation circuit 71 is sent as a parameter of the frequency data generation circuit of the fifth waveform generation circuit 71 via the control bus and the parameter specification circuit 11, and as a parameter of the frequency data generation circuit of the fifth waveform generation circuit 71. It is supplied as a parameter of the enveloping generation circuit of the generation circuit 70. Further, the output signal 75 from the modulation circuit of the third waveform generation circuit 72 is transmitted to the second waveform generation circuit 7 via the control bus and the parameter specification circuit 11.
The signal is supplied as a parameter to the first logic processing circuit, and is further supplied to the subsequent stage as an output signal of this sound generation block.

The designation of such control parameters is all determined by the latch pulse from the parameter designation circuit 11, and at what timing data is set in the desired latch circuit.
Since a special data transfer circuit is not required just by specifying , the degree of freedom in manipulating the musical tone signal that is finally generated is extremely large. In addition, even if you want to change the flow of parameters to a completely different form as in the example here, you only need to change the timing specification from the parameter specification circuit 11, making it very easy to operate in terms of immediacy and arbitrariness. It's easy to do.

As described above, the electronic musical instrument according to the present invention can generate musical tone signals with much greater potential with a circuit scale that is approximately the same as that of conventional electronic musical instruments.

〔Effect of the invention〕

As explained above, multiple types of waveform parameters and multiple types of envelope parameters are specified, and the output signal of the waveform generation circuit generated by the waveform parameters is modulated by the output signal of the envelope circuit generated by the envelope parameters. However, by combining these using a logic circuit or the like, it is possible to produce rapidly changing musical tones or special combinations of sound effects. This makes it possible to easily generate a wide variety of musical tone signals that could not be obtained using conventional tone synthesis methods or waveform readout methods, and is greatly useful for the development of creative music.

[Brief explanation of drawings]

FIG. 1 is a schematic explanatory diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the configuration of the sound source circuit of the embodiment, #'c6 is a detailed diagram of the waveform generation circuit of FIG. 2, and FIG. The detailed diagram of the frequency data generation circuit (DCO) and waveform memory shown in the figure, Figure 5 is the detailed diagram of the logic processing circuit of Figure 3, and the sixth cause is the detailed diagram of the envelope generation circuit (DEC) of Figure 6. 7 is a detailed diagram of the modulation circuit of FIG. 3, and FIG. 8 is an operation explanatory diagram showing the operation of the sound source circuit of the embodiment. In the figure, 1 is ! ! board, 2 is the CPU circuit,
3 is a sound source circuit, 4 is a sound system, 5 is a system memory circuit, 11 is a parameter specification circuit, 12 is a waveform generation circuit A116 is a waveform generation circuit B114 is a waveform generation circuit C
116 is a control bus, 21 is a frequency data generation circuit, 22
23 is a waveform memory circuit, 23 is a logic processing circuit, 24.57 is an envelope generation circuit, 25 is a Fi Hengu circuit, 31 is an onlator circuit, 32 is a kakunta circuit, 63 to 35.41
~43.51~56.64 are latch circuits, 36°48.
63 is an AND gate group circuit, 47 is an exclusive m@sum gate group circuit, 49 is an OR gate group circuit, 62 is a multiplication circuit, 7
0 is the first waveform generation circuit, 71 is the second waveform generation circuit,
72 indicates a sixth waveform generation circuit.

Claims (2)

[Claims] (1) a plurality of waveform generation circuits that generate waveform signals according to a plurality of types of waveform parameters; a plurality of envelope generation circuits that generate envelope signals according to a plurality of types of envelope parameters; a plurality of modulation circuits that modulate with output signals of envelope circuits; and specifying and supplying output signals of the modulation circuits as part of the plurality of types of waveform parameters and the plurality of types of envelope parameters of the plurality of waveform generation circuits. An electronic musical instrument characterized in that it is equipped with a plurality of designation circuits for controlling musical tone parameters over a wide range of parameters. (2) A control bus shared for transferring the waveform parameters and envelope parameters, and a plurality of latch circuits for receiving and holding desired parameters from the control bus, and providing the plurality of designated parameters. 2. The electronic musical instrument according to claim 1, wherein the circuit provides a latch timing signal for the plurality of latch circuits.