JPS6331298A - Competition preventing system for multiprocessor - Google Patents

Abstract

PURPOSE:To prevent the competition of a multiprocessor by providing a means for informing a call in which an event is generated to other processor, a memory for holding this call, a means for searching this memory and a means for clearing this call after a constant time. CONSTITUTION:The processor PROC-i detects the generation of the event from a terminal A and sets to a search circuit SRCH. The processor PROC-j transmits call identification information having a state to be transited next to other control module through a bus interface BINF. The processor PROC-j checks whether the state is transiting or not in the terminal A. This operation is carried out in a competition preventing device CONT. In this case, since the call identification information is stored in the memory MEM, the processor PROC-j holds the processing of the state transition to the event of the terminal B. A clear circuit CLR clears the memory MEM after a constant time when the call identification information is stored in the memory MEM.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to electronic communication 1! g! This paper relates to multiprocessor contention prevention methods for machines.

[Conventional technology]

The processing capacity of an electronic exchange mainly depends on the processing capacity of a control processor that constitutes a control system. Therefore, in order to increase the processing capacity of the control system, a plurality of processes are often used.

However, in this multiprocessor system, since a plurality of control processors execute processing simultaneously, a number of problems occur that do not occur in the case of a single processor system.

A typical example is multiprocessor competition (hereinafter simply referred to as competition). This competition will be explained below using the diagram.

FIG. 3 is a configuration diagram of a control system of a conventional multiprocessor type electronic exchange. A plurality of control modules are connected by a bus, and each control module controls nine terminals housed in its own module. When it becomes necessary to control terminals housed in other modules, the module communicates with the other modules via the bus, forming one switching system as a whole.

The ffdJXI module has a bus interface BINF that has an interface function with the bus, and a terminal interface TI that interfaces with terminals.
, the control of the module is carried out by a row 9 processor PJL (JC"-
6&l., Processor PL (, QC, when an event such as call origination or recovery occurs in a terminal housed in its own module, executes a call processing program corresponding to this event and controls the state transition of call processing. .

For example, in FIG. 3, when an event occurs to a terminal person accommodated in control module i, PROC-
Terminal B controlled by i and accommodated in control module j
If an event occurs in , PROC-j controls.

With the above configuration, terminals A and B are connected (hereinafter referred to as A-
FIG. 4 shows an example of normal state transition when an event occurs from the B connection state.

Terminal A performs hooking from the A-B connection state! :,
Under the control of PRUC-i, it transitions to the A-register connected state in order to receive dialed digits from A. on the other hand,
When terminal B recovers from the A-B connection state, PROC-j
Under the control of , a transition is made to the A busy tone connection state. In the figure, B
B represents the state in which the state has been restored.

Next, from the A-B connection state, PMUC-7 and PRQC-j
An example in which a conflict occurs and an abnormal state occurs will be explained with reference to FIG.

In the A-B connection state, A's hooking and B's recovery occur almost simultaneously, and due to the difference in program processing time, 9
Assume that the state transition process for A's 7-t kink ends p earlier than the process for B's recovery. In this case, the process for A's hooking is executed in PROC-7 that accommodates A, and then -A- register connection state is entered.

Next, the state transition process for B's recovery is executed in PROC-j, but this process in PROC-j is for the case where B recovers from the A-B connection state, so
As already shown in FIG. 4, the content is to connect the busy tone to A and leave B in the empty state.

However, this operation is not performed for the A-B connection state in FIG. 5, but is performed for the A-register connection state. The reason for this is that A's hooking and B's recovery are t-i
This is because tr occurs simultaneously and the hook of A is transferred. As a result, A and B fall into an abnormal state that does not exist in a normal call connection state as shown in the fifth cause. Since the normal call processing system of 10 Grams was not created with such an abnormal situation in mind, in the worst case, it may become impossible to recover from the abnormal situation forever. Therefore, conflict prevention U is a major challenge for the multi-10 sevsa system.

From the above examples, in general, the basic principle of conflict prevention is that multiple related terminals (A and B in the above example) that constitute one set of call connections
If multiple events occur at the same time, the events occurring at all other terminals can be suspended until the state transition for one event is completed.

Conventionally, as a method for preventing contention, a shared memory CM as shown in FIG. 3 has often been adopted.

The shared memory CM holds information for all terminals indicating whether or not the terminal is currently undergoing state transition, and is connected to the bus via the bus interface BINF. In this method, even if multiple events occur simultaneously, contention is prevented by sequentially accessing the shared memory.

This operating principle can be explained from A to B in the same way as in the example previously explained in FIG.
A case will be explained in which a connection occurs at the same time as A's blocking and B's recovery occur at the same time. Here, it is assumed that access to the shared memory CM is performed with priority over PROC-i and PROC-j. When PROC-1, which controls A, detects A's hooking via the terminal interface TINF, it connects the bus interface BINF and the bus before starting processing for it.

Shared memory CM via bus interface BINF
Read the contents corresponding to B. At this time, PR controlling B
Since OC-j has not yet started the recovery process for B, its contents are displayed as 'empty'. After setting "state transition in progress", processing for A's hooking is started.

On the other hand, P'kLOC-j similarly accesses the shared memory and reads the contents corresponding to A before starting the process of restoring B. However, in this case, it shows that the person is already in the 1st state transition, so PROC-j performs B's recovery process and A's 7-king process performs PROC-i.
It is possible to prevent contention by suspending the process until the process is completed.

[Problem that the invention seeks to solve]

In the conventional multiprocessor contention prevention method using shared memory described above, as the scale of the switch increases and the number of control modules increases, accesses to the shared memory become concentrated, waiting time increases, and the system processing The disadvantage is that the ability is reduced.

Furthermore, since the shared memory unit centrally manages the status of all terminals in the system, if a failure occurs there, the system will go down, which also poses a problem in terms of reliability.

[Means for solving problems]

The present invention provides a multi-crosser type switching system in which a plurality of 10 sevusas are connected through an inter-processor communication network, in which a plurality of calls simultaneously connected to each processor are
means for transmitting the call identification information to another processor via the inter-grocers communication network; means for receiving the call identification information from the other 10 processors; and retaining the received call identification information. a memory for storing the call identification information, a means for searching the contents of the memory, and a means for clearing the call identification information after a certain period of time from the time when the call identification information is stored in the memory. The memory of the processor is searched for the call identification information of the call to which the event belongs, and if the call identification information is stored, the state transition processing for the event is suspended, and if the call identification information is not stored, the call identification information is searched. This multiprocessor contention prevention method is characterized in that information is transmitted to other glossaries via the interprocessor communication network, and at the same time, state transition processing for the ml event is started.

[Effect]

The present invention provides call identification information for identifying a call in which an event has occurred in a multiprocessor type electronic switching system.
9-> A memory that holds the call identification information received from the processor, a means to search the contents of the memory, and a means to clear the call identification information after a certain period of time from the time it is stored in the memory. and means.

Here, the call identification information is information for distinguishing between a plurality of calls that exist simultaneously within an exchange.

For example, multiple related terminals (
In the conventional example, it is sufficient to select one terminal from A and B) and define the terminal address as call identification information.

When an event occurs in a terminal under the control of each processor, each processor searches whether call identification information for a call related to this terminal is stored in memory, and if it exists, the processor This process is suspended, and only if the call identification information does not exist, the call identification information is notified to other processors, and other processors are notified that the terminal is in the process of state transition, thereby preventing contention.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a configuration diagram of an embodiment of the uninvented multi-10 sedasa competition prevention method. In the figure, the bus, F to the bus interface BI in the control module.
, terminal interface TINF, grosser PROC
The operating principle is the same as the conventional example shown in the third factor. The difference from the conventional example is that a contention prevention device [C0NT] is added between the bus interface BINF and the processor PRUC.

Contention prevention device C (JNT is a memo 1, INEM, which holds call identification information sent from other modules via the bus and bus interface BINF, as shown in Figure 2.
, a search circuit SL%CH that searches the inside of this memory, and a clear circuit CLR that clears the call identification information after a certain period of time from the time when the call identification information is stored in the memory.

As in the conventional example, a case will be described in which, in FIG. 1, an event occurs at the same time in terminal A accommodated in control module I and terminal B accommodated in control module j. In this case, even if 11 events occur at the same time in A and B, there is only one control bus from ``''C to 6.%
), , 7' and ゞ' can be sequentially ordered. In this embodiment, it is assumed that POC-e acquires the right to transmit the bus before pmoC-j.

Processor PROC-i receives event occurrence from A,
When detected through the terminal interface TINF, A
The search circuit 8R of FIG. 2 searches the call identification information of the call to which
Set to CH. The search circuit 5RCH checks whether the set call identification information exists in the memory.

Because PROC-j is still unable to access the bus due to the bus transmission right control described above, the search circuit S OH of PROC-i returns a search result of "1 does not exist in PROC-i." -i has confirmed that B is not currently undergoing a state transition, so it sends the call identification information of the call about to undergo a state transition to other control modules using the bus interface BINF and fffllN bus. .B receives said call identification information via a bus interface B I N l!' and stores it in a memory.

On the other hand, Grosse's PROC-j also has a terminal interface TINI! Since the occurrence of an event in B is detected via ', it is necessary to check whether A is undergoing a state transition before starting the state transition of B. This operation is also performed by the contention prevention device C0NT in the control module j in the same way as the processing in the above-mentioned PROC-i. However, in this case, since the call identification information is stored in the memo IJMEM,
Grosse PROC-j learns that the other party's terminal A is currently changing its state, and suspends processing of the state transition in response to B's event. As a result, P L%OC-i and PROC
-j can be prevented from conflicting.

However, if the call identification information for A and B continues to remain in the memory MEN in the control module j, the pending event for B will not be processed forever, so it is necessary to clear it by some means. Ruru. This function is performed by the clear circuit CLI (, in Figure 2.The clear circuit CLR monitors all call identification information in the memory MEM and
The time stored in EM is 10 when a state transition occurs.
It is best to set this value to a value larger than the maximum processing time of the Sezusa PROC software.

Although the present embodiment has been described above for the case where the number of terminals is two, competition can be prevented with exactly the same cost even when the number of terminals constituting one call is three or more.

Further, in this embodiment, a configuration in which a plurality of control modules are connected through a cab has been described, but the present invention can be applied in exactly the same manner to a system in which a plurality of control modules are connected through a loop-shaped transmission line.

〔Effect of the invention〕

As described above, according to the present invention, conflict prevention can be achieved without having a centralized management part like the shared memory shown in the conventional example, so the scale of the switch becomes large and the number of control modules increases. However, the system's processing capacity will not decrease.

Furthermore, there is no problem of system failure due to failure in the common memory section, which is advantageous in terms of reliability.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an exchange in an embodiment of the contention prevention method of the present invention, Fig. 2 shows the detailed structure of the control module in Fig. 1, and Fig. 3 shows a conventional contention prevention method. The configuration diagram of the adopted exchange, Figure 4, shows terminals A and B in Figure 3.
is a normal state transition diagram from a connected state, and FIG. 5 is a diagram showing an example in which terminals A and B in the third cause fall into an abnormal state due to a conflict from a connected state. BINF・・・Bus interface, TlNl
1”...Terminal interface, PROC...
...Processor, C0NT...Conflict prevention device, MEM...Memory, CLR...Clear circuit, 5RCH...Search circuit, Figure 4A Saiko→・Otooke Daiso A-1, Sista Ii Saisashi state,

Claims (2)

[Claims] (1) In a multiprocessor contention prevention method in a multiprocessor exchange in which a plurality of processors are connected via an interprocessor communication network, call identification information for identifying multiple concurrently connected calls is transmitted via the interprocessor communication network. means for transmitting the call identification information to another processor, means for receiving the call identification information from another processor, a memory for holding the received call identification information, means for searching the contents of the memory, and the call identification information. Each processor is provided with means for clearing the event after a certain period of time from the time when it is stored in the memory, and when an event occurs in the processor, each processor stores the call of the call to which the event belongs from the memory of the processor itself. The identification information is searched, and if the call identification information is stored, the state transition processing for the event is suspended; if the call identification information is not stored,
A multiprocessor contention prevention method, characterized in that the call identification information is transmitted to other processors via the inter-processor communication network, and at the same time, state transition processing for the event is started. (2) The multiprocessor contention prevention method according to claim 1, wherein the inter-processor communication network is controlled so that only one processor acquires the transmission right at a time.