JPS56131288A - Competition prevention system of multiprocessor exchange processing system - Google Patents

Competition prevention system of multiprocessor exchange processing system

Info

Publication number
JPS56131288A
JPS56131288A JP3428380A JP3428380A JPS56131288A JP S56131288 A JPS56131288 A JP S56131288A JP 3428380 A JP3428380 A JP 3428380A JP 3428380 A JP3428380 A JP 3428380A JP S56131288 A JPS56131288 A JP S56131288A
Authority
JP
Japan
Prior art keywords
event
call
exchange processing
processors
tkpj
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3428380A
Other languages
Japanese (ja)
Inventor
Shinji Hayashi
Keiichi Koyanagi
Keiichi Ito
Hiroshi Kawamura
Takamichi Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP3428380A priority Critical patent/JPS56131288A/en
Publication of JPS56131288A publication Critical patent/JPS56131288A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To prevent the competition of events transferred between processors unitedly by giving discrimination information to a call in exchange processing and by referring to the discrimination information. CONSTITUTION:Trunk control processors TKPi and TKPj are connected respectively corresponding to digital signal processors DSGE, and the multiprocessor exchange processing system is composed of call processors CPi and CPj with decentralized loads, common memory CM, and network NW. When CPi accepts the start of a call, the call is given ID as an identifier, and a circuit number is also given ID as a circuit event and sent to CPi, which stores CM with it. To TKPj for the call, an event of ID and the circuit number is sent and, while stored, sent to CPj. When this event is received, CPj collates ID of an assigned event with that of the event from TKPj and, when those IDs agree, executes the event.
JP3428380A 1980-03-17 1980-03-17 Competition prevention system of multiprocessor exchange processing system Pending JPS56131288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3428380A JPS56131288A (en) 1980-03-17 1980-03-17 Competition prevention system of multiprocessor exchange processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3428380A JPS56131288A (en) 1980-03-17 1980-03-17 Competition prevention system of multiprocessor exchange processing system

Publications (1)

Publication Number Publication Date
JPS56131288A true JPS56131288A (en) 1981-10-14

Family

ID=12409824

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3428380A Pending JPS56131288A (en) 1980-03-17 1980-03-17 Competition prevention system of multiprocessor exchange processing system

Country Status (1)

Country Link
JP (1) JPS56131288A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331297A (en) * 1986-07-24 1988-02-09 Nec Corp Competition preventing system for multiprocessor
JPS6331298A (en) * 1986-07-24 1988-02-09 Nec Corp Competition preventing system for multiprocessor
JPH0334049A (en) * 1989-06-30 1991-02-14 Nec Corp Information processor
WO2000060828A1 (en) * 1999-03-31 2000-10-12 Fujitsu Limited Data communication processing device and method and recording medium storing data communication processing program

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331297A (en) * 1986-07-24 1988-02-09 Nec Corp Competition preventing system for multiprocessor
JPS6331298A (en) * 1986-07-24 1988-02-09 Nec Corp Competition preventing system for multiprocessor
JPH0334049A (en) * 1989-06-30 1991-02-14 Nec Corp Information processor
WO2000060828A1 (en) * 1999-03-31 2000-10-12 Fujitsu Limited Data communication processing device and method and recording medium storing data communication processing program

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