JPS6331284A - Input controller for plural video signals - Google Patents

Abstract

PURPOSE:To record (n) pieces of video in a same memory in parallel by fetching the video signals of (n) pieces of video signal sources to the A/D converter at every horizontal scanning line and making the count of the horizontal and vertical addresses of the video signal to 1/n of the clock of the A/D converter. CONSTITUTION:The input controller of the plural video signals is provided with a synchronizing signal generator 9, a high speed switching part 10, the A/D converter for converting the video signal into a digital signal and memory parts 4A, 4B, 4C, 4D for recording the video signal converted into the digital signal. By the synchronizing signal of the synchronizing signal generator 9, two cameras CF, CS are synchronized, the video signals are alternately switched by the high speed switch 10 at every horizontal period to become a synthesized video C, it is amplified by an amplifier 2, converted into the digital signal in the A/D converter 3 and stored in the memory part 4. The horizontal address and the vertical address at the time of fetching to the memory part 4 are made 1/n to the clock of the A/D converter 3, thereby, the printing of an object from the (n) pieces of video signal source can be obtained by one printer.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to processing video signals supplied from a plurality of video signal sources and processing the video signals to be used, for example, when inputting the resulting video signals to a video printer. The present invention relates to an input control device.

[Summary of the invention]

The input control device for a plurality of video signals according to the present invention includes a synchronizing signal generator, a switch section, an A/D converter that converts the video signal into a digital signal, and a memory that records the video signal converted into the digital signal. and a switch section synchronized with the synchronization signal of the synchronization signal generator to switch the video signals of n video signal sources, for example, a video camera, every horizontal scanning line in synchronization with the synchronization signal of the synchronization signal generator. By setting l/n to the clock of the A/D converter, which is the count of the horizontal address and vertical address when taking the video signal converted into a digital signal into the memory unit, as well as taking it into the A/D converter, In this system, prints of a subject from n video signal sources recorded in a memory section can be obtained using, for example, one video printer.

[Traditional branch technique]

Methods for analyzing the form of people playing sports such as golf and tennis and determining whether the form is good or bad include high-speed photography using a VTR, motor-driven high-speed camera, etc., and video printers (especially Kaisho 59-226
583, JP-A No. 59-226584, etc.) kg.

When analyzing the form in this way, there are cases where it is desired to examine not only the image from one direction but also from two directions, for example, both the rE plane and the side. In such a case, for example, 1
If you use a stand-up VTR to take pictures first from the 1st floor and then from the side, the two forms may not be exactly the same, so separate VTRs, etc., are installed for the front and side. The form will be recorded and an analysis of the four J.

FIG. 5 is a schematic diagram showing an example of analyzing such a form, in which Cr, , and Cs indicate video cameras, and each of the video cameras cr, cs represents one side and one side of a person M swinging with a golf club, for example. It is installed in

P, , Ps indicate video printers, and the video printers pr and ps print video No. 48 output from the video cameras cr and cs, respectively.

Video printers PF and PS include video cameras Cr.

An input terminal l into which a Cs video signal is input, a video amplifier 2 which amplifies the video signal input to the input terminal l, an A/D converter 3 which converts the amplified video signal into a digital signal, and a converter into a digital signal. a data converter 5 that converts the signals read from the memory sections 4A to 4D into print signals, a thermal head 6 that prints the image on photographic paper 7,
and memory sections 4A to 4D, data converter 5. It is comprised of a print control section 8 that controls a thermal head 6, a motor (not shown), and the like.

Each of the memory sections 4A to 4D can sequentially record one field's worth of video in response to a write command, and for example, a dynamic RAM of Kawa PD41221C manufactured by NEC Corporation can be used.

When performing form analysis by installing video cameras cr and cs as shown in Fig. 5, video signals from the video cameras CF and CS installed in front and on the side of the person M swinging the club are shown in the diagram. Video printer PF, PS depending on the write signal timing
Since the video signals recorded in the memory units 4A to 4D are read out at a predetermined speed, the video signals photographed from two directions can be obtained as a hard copy. .

Therefore, since the continuous movement of one form from the front and side can be seen from the hard copy obtained by the video printer P r + PS, it is possible to analyze the form and judge whether it is good or bad.

[Problem that the invention seeks to solve]

However, when performing form analysis as described above, video camera CF+CS, video printer Pt
There is a problem in that two video signal processing systems consisting of , and PS are required.

Therefore, one video printer has two signal processing systems,
It is conceivable to have two systems of memory sections and combine the images at the stage of finally sending the print signal to the thermal head to obtain two systems of hard copies on one sheet of photographic paper.
Since this is equivalent to using two video printers Pf and PS, the video printer becomes expensive.

The present invention provides an input control device for a plurality of video signals that solves the above problems.

[Means for solving problems]

The input control device for a plurality of video signals according to the present invention includes a synchronizing signal generator, a switch section, an A/D converter that converts the video signal into a digital signal, and a memory that records the video signal converted into the digital signal. A switch unit synchronized with the synchronization signal of the synchronization signal generator switches the video signals of the n video signal sources synchronized with the synchronization signal of the synchronization signal generator for each horizontal scanning line, and converts the A/D converter. In addition to incorporating
The configuration is such that the count of horizontal addresses and vertical addresses when a video signal converted into a digital signal is taken into the memory section is 1/n with respect to the clock of the A/D converter.

[Effect]

In the input control device for multiple video signals of the present invention,
The video signals of n video signal sources are switched every horizontal scanning line by the switch unit and taken into the A/D converter, and the horizontal and vertical addresses of the video signals converted into digital signals are recorded in the memory unit. Since the ratio is set to 1/n with respect to the clock of the A/D converter, images from n video signal sources can be recorded in parallel in the same memory section.

Therefore, by supplying the video signals in the memory section to, for example, one video printer and printing them, it is possible to obtain prints of the subject supplied from n video signal sources as one hard copy.

〔Example〕

FIG. 1 is a block diagram showing an example of a video printer employing the input control device for multiple video signals according to the present invention.
The same reference numerals as in FIG. 5 indicate the same or corresponding parts.

In this figure, P denotes a video printer, and 9 denotes a synchronization signal generator, which generates a synchronization signal to synchronize two video cameras Cr Cs and a high-speed switcher 10. In the high-speed switcher 10, the contact r is switched between contacts a and b every horizontal scanning line in synchronization with the synchronizing signal from the synchronizing signal generator 9.

Note that 11 indicates various clock signals and address signals in synchronization with the synchronization signal of the synchronization signal generator 9.

A timing circuit that can output print signals, etc. is shown.

Figure 2 shows the dynamic RAM of μPD4122IC manufactured by Ichiki Electric Co., Ltd., which is used as each memory section.
In this block diagram, numeral 41 indicates a timing generation circuit, and a data transfer/restore control clock signal RAS.
and a refresh control clock signal REF.

42 indicates a row address counter controlled by the timing generation circuit 41, and receives a row counter reset signal R.
A CR1 row counter increment clock signal INC and a row counter decrement signal DEC are supplied.

Reference numeral 43 indicates a read/write timing generation circuit controlled by the timing generation circuit 41, and is supplied with a read/write control signal WE.

Reference numeral 44 indicates a serial control timing generation circuit controlled by the read/write timing generation circuit 43, and is supplied with a serial control clock signal SC.

45 is the serial control timing generation circuit 4
4, which is supplied with input data DIN and outputs output data DOUT.

Reference numeral 46 indicates a refresh address counter controlled by the timing generation circuit 41, and the outputs of the row address counter 42 and the refresh address counter 46 are sent to the address selector 47 and the address manual buffer 4B.
and 320 lines x 700 through address recorder 49
Columns (224 bits) of memory cell array 50 are provided. The address selector 47, address manual buffer 48, and address recorder 49 are controlled by the timing generation circuit 41.

51 is a 700-bit line buffer controlled by the timing generation circuit 41, and the memory cell array 5
700 data transfer gates 52 controlled by a read/write timing generation circuit 43 are interposed between the read/write timing generating circuit 43 and the read/write timing generating circuit 43.

53 indicates 700 gates interposed between the data input/output buffer 45 and the line buffer 51; 54 indicates a serial selector controlled by the serial control timing generation circuit 44 and the data input/output buffer 45; 1.53.

Then, the data transfer/restore control clock 4ji R
AS is read/write control illi lj W E's 1
7 bells will send one line of data to Memorial A1/I5.
0 and the line buffer 51.

The refresh control clock 48'jREF is input during the period when the data transfer/restore control signal RAS is active in J1, so that the built-in refresh control circuit executes the on-chip refresh.

Each item t1 RCR1INC and DEC is to control the row address.
CR is row at]/counter reset, row counter increment] Clock INC is row at 1/s increment 1-(-1-1), row counter decrement signal DEC is row at 1/s Decrement of (-1
).

Read/write I/control signal W E +; j, controls data transfer/data restore cycle and serial read/write cycle, and in case of data transfer/data restore cycle, data transfer/restore control lock signal 1: RAS No☆chi 14 is the edge, serial lead/
In the case of a cycle, each operation is determined by the falling amplifier of the serial control clock signal SC.

The serial control clock signal SC controls serial read/write operations of the line buffer 51.

In the video printer P configured as shown in FIG. Video No. 471 taken by
is configured so that it can be switched to cross force ′, so
For example, the video F captured by the video camera CF is shown in Figure 3 (a
), the image S captured by the video camera Cs is shown in Figure 3(b).
In this case, the composite video C output from the high-speed switcher 10 is switched every 11i period, as shown in FIG. 3(c). The signal of this composite video C is amplified by the video amplifier 2 as in the conventional case, and the signal is amplified by the timing circuit 11.
The signal is converted into a digital signal by the A/D converter 3 according to the clock signal and the AT1/S signal outputted from the A/D converter 3, and is recorded in the memory section 4A when a write command is input.

In this way, when recording the signal of the composite image C in the memory section 4A, the horizontal at1/s and the vertical at1/s are generated to be supplied to the memory section 4A with respect to the clock of the A/D converter 3. When the increment pulse of the counter is reduced to 1/2, the memory address (horizontal address) when one line 11 (Fl) of the composite image C is written is, for example, memory section 4.
It's in the center of A. Therefore, if the second row Fl (S2) of the composite video C is written to the rest of the memory section 4A without resetting the memory address, the first row l-1 of the video F will be written to the left half of the first row 11 of the memory section 4A. 1 can be written in 2 lines of the image S on the right side, and 1 and 2 lines of the composite image C [I is 1 in the memory section 4A.
Recorded at the row address.

Then, if you write line 3]1 (F:+) of synthesized image C and line 4 rl (S4) of synthesized image C in the same way, line 3.4 of synthesized image C "1 is in memory section 4A. It is recorded in the address of the second line.

Therefore, by sequentially writing data in the same manner as described above, as shown in FIG. 3(d), the video signal f consisting of the odd rows of the video F is transferred to the left side of the memory section 4A divided into four parts, and the video signal f consisting of the odd rows of the video F is written to the top right side of the memory section 4A. A video signal S consisting of even-numbered rows is recorded.

Thereafter, video signals from the video cameras Cr and Cs are sequentially written into each of the memory sections 4A to 4D in the same manner.

At the same time as the recording to the memory section 4A is performed in this way,
The video signal in the memory section 4A is converted into a print signal by the data converter 5 according to a command from the timing circuit 11.
The thermal head 6 prints images fl and f2 on the photographic paper 7, which are composed of video signals along one time series, as shown in FIG.
．． ..., sl, 52°◆kai・ is printed.

Therefore, the printed image fllf2. Φ..., 5I
I32.・By examining and analyzing 〇, it is possible to judge whether the fort is good or bad, and to point out areas for improvement.

As mentioned above, by applying the present invention to a video printer, two video cameras Cr,
By processing the synchronized video signals output from the Cs, it is possible to obtain hard copies from two directions at the same moment in time.

Therefore, it is possible to analyze forms and the like from multiple directions with one video printer P, and there is an effect that only one video printer P is required.

1-The described embodiment uses a video camera C as a video signal source.
Although F*CS is used, vTnl provided with a synchronization terminal may also be used.

Further, the number of video signal sources for forming the composite video C can be set to 3.4, .
The contacts of the memory sections 4A to 4 correspond to the number of video signal sources.
When writing a video signal to D, the increment pulse of the address signal is set to 1/1 with respect to the clock of the A/D converter 3.
If you set it to 3, l/4, fist, l/n, you can obtain a hard copy in which the ■ field is divided into 9, 16, . . . , n2.

Furthermore, the number of memory units that can record video signals for one field is not limited to four, and the number may be increased depending on the subject to be photographed.

In addition to the video printer P, images can also be examined by displaying the images in the memory units 4A to 4D as still images on a monitor or the like.

〔Effect of the invention〕

As described above, the synchronizing signal generator of the present invention, the switch section, and the A/C converting the video signal into a digital signal are provided.
It is equipped with a D converter and a memory unit for recording video signals converted into digital signals, and converts video signals from n video signal sources synchronized to the synchronization signal of the synchronization signal generator into the synchronization signal of the synchronization signal generator. The synchronized switch unit switches each horizontal scanning line and inputs it to the A/D converter, and the A/D converts the count up of horizontal and vertical addresses when inputting the video signal converted into a digital signal to the memory unit.
Since the converter clock is set to 1/n, images from n video signal sources can be recorded in the same memory section.

Therefore, by supplying the video signal in the memory section to, for example, one video printer and printing it, it is possible to obtain a print of the subject supplied from n video signal sources as one hard copy. It is very suitable for form analysis and study.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a video printer employing the input control device for multiple video signals of the present invention, FIG. 2 is a block diagram showing the configuration of each memory section, and FIG. 3(a),
(b), (c) and (d) are diagrams showing images, FIG. 4 is a diagram showing a printed image, and FIG. 5 is a schematic diagram showing an example of conventional form analysis. In the figure, 2 is a video amplifier, 3 is an A/D converter, 4A to 4
D is a memory section, 5 is a data converter, 6 is a thermal head, 7 is a photographic paper, 9 is a synchronizing signal generator, IO is a high-speed switcher, 11 is a timing circuit, P is a printer, Cr, C
s indicates a video camera. (a) S (b) Rakumasuzo (c) (d) 1 Shenkyo I East Tai, Yi 4 Sin printed P, clear ((t1 Figure 4 Figure 13 and Figure 5

Claims (1)

[Claims] a synchronization signal generator that synchronizes video signals output from n video signal sources; and a synchronization signal generator that synchronizes video signals of the n video signal sources for each horizontal scanning line in synchronization with the synchronization signal of the synchronization signal generator. A switch section that can be switched and output, an A/D converter that converts the video signal outputted by the switch section into a digital signal, and a memory section that records the video signal converted to the digital signal, The count of horizontal addresses and vertical addresses when capturing video signals into the memory section is set to 1/1 with respect to the clock of the A/D converter.
1. An input control device for a plurality of video signals, characterized in that n is the input control device for a plurality of video signals.