JPS6331152A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize uniformity in film thickness and dielectric for the excellent reproduction of capacity elements of desired values by a method wherein the ion implantation method capable of uniform element addition is employed in a process of forming a dielectric layer in a capacity element. CONSTITUTION:On impurity-diffused layers 5 and insulating layer 2 formed on a semiconductor substrate 1, a photoresist layer 7 is formed and then subjected to selective patterning. Selective ion implantation is accomplished whereby oxygen, nitrogen, or the like is implanted into a capacitor forming region 3 positioned in an opening in a specified impurity-diffused layer 5. Heat treatment is then performed for the formation of a dielectric layer 6. A conduc tive layer is formed on them and next is selectively removed by etching for the formation of a capacitor forming conductive layer 8 and contact forming conductive layer 9. In this way, uniformity is ensured for the dielectric layer 6 in terms of its thickness and dielectric constant. A capacity element of a desired value may be constituted with an excellent reproducibility without an increase in the chip area.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to an improvement in a method for manufacturing a semiconductor device formed with a built-in capacitor element. .

[Conventional technology]

Regarding a conventional method for manufacturing a capacitor element built into a semiconductor device of this kind, manufacturing steps according to an example thereof are sequentially shown in FIGS. 2(a) to 2(f).

That is, in each figure of these conventional examples, reference numeral 1 is a semiconductor substrate, 2 is an insulator layer, 3 is a capacitor forming part, 4 is a contact part, 5 is an impurity diffusion layer, 6a is a dielectric layer, and 7a is a
8 shows a photoresist layer, 8 a conductor layer for a capacitor, and 9 a conductor layer for a contact. Next, the manufacturing process thereof will be described.

First, an insulating layer 2 is formed on a semiconductor substrate 1, and this insulating layer 2 is selectively removed by kneeling in a photolithography process to form a capacitor forming portion 3. Then, the contact portions 4 are opened (FIG. 2(a)), and impurity diffusion layers 5, 5 are formed by ion implantation from each opening (FIG. 2(b)), and then these semiconductor substrates 1 A dielectric layer 6a is formed by CVD or the like on each of the impurity diffusion layers 5, 5 and the insulating layer 2 (FIG. 2(C)), and on the dielectric layer 6a of the capacitor forming part 3, A photoresist layer 7a is selectively formed by photolithography ((d) in the same figure).
)) Furthermore, using this photoresist layer 7a as a mask, the dielectric layer 6a is selectively etched, and after removing the photoresist layer 7a (FIG. 2(e)), a sputtering method is applied to the upper part of the dielectric layer 6a. A conductor layer is formed by etching, and then the conductor layer is selectively etched away in a photolithography process to form a conductor layer 8 for the capacitor. Then, a conductor layer 9 for contact is formed (FIG. 6(f)).

[Problem that the invention seeks to solve]

However, in a conventional semiconductor device with a built-in capacitor element manufactured by the above method,
The film thickness of the dielectric layer 8a formed using the CVD method etc.
Due to non-uniformity in dielectric constant, etc., the capacitance value of the capacitor element is not constant, making it impossible to obtain the desired capacitance, and there is also a limit to the range of dielectric constant, so in order to obtain the required capacitance value, The area of the capacitor forming portion must be increased, resulting in an increase in the chip area, which has a large impact on the cost of the device itself.

This invention was made to solve these conventional problems, and its purpose is to achieve uniformity in the capacitance value of the built-in capacitor elements, and to suppress the increase in chip area as much as possible. did. An object of the present invention is to provide a method for manufacturing this type of semiconductor device.

[Means for solving problems]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention is such that a dielectric layer of a capacitor element is formed by an ion implantation method.

[For production]

That is, in the method of the present invention, the dielectric layer of the capacitor element is formed by an ion implantation method that allows addition of elements with good uniformity.

The dielectric constant etc. are made uniform, and a capacitor element with a desired capacitance value can be obtained with good reproducibility.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1(a) to 1(e).

FIGS. 1(a) to e) are cross-sectional views showing this embodiment method in the order of steps, and these FIGS. 1(a) to e)
In the method of the embodiment, the same reference numerals as in the conventional method of FIGS. 2(a) to f) indicate the same or corresponding parts.

In this embodiment method, first, an insulating layer 2 such as S+02 is formed on a semiconductor substrate l such as Si, and this insulating layer 2 is selectively formed in a photolithography process. After removing the etching, the capacitor forming part 3
．． and opening the contact part 4 (FIG. 2(a)),
Then, by ion implantation from each opening, etc., these capacitor forming portions 3. Then, impurity diffusions M5 and 5 of the same conductivity type as the semiconductor substrate 1 are formed in the contact portion 4 (FIG. 4(b)).

Next, a photoresist layer 7 is selectively patterned on each impurity diffusion layer 5.5 of the semiconductor substrate 1 and on the insulating layer 2 by photolithography, and then the capacitor is formed by ion implantation. Part 3. In other words, by selectively injecting, for example, oxygen, nitrogen, etc. into the opening surface of the predetermined impurity diffusion layer 5 (FIG. 2(C)) and performing appropriate heat treatment, the impurity diffusion layer 5 is made of SiO2, SiN, etc. A dielectric layer 8 is formed (FIG. 4(d)).

Thereafter, a conductor layer 1, for example A2, is formed on top of these by sputtering or the like, and this conductor layer is selectively removed by kneeling in a photolithography process to form a conductor layer 8 for the capacitor. ．． and a conductor layer 9 for contact are formed on each of them (FIG. 6(e)), thereby constructing the intended capacitor element.

Therefore, in the capacitor element obtained by the method of this embodiment, the dielectric layer 6 is formed using an ion implantation method that allows element addition with good uniformity.

Since the film is formed by selectively implanting oxygen, nitrogen, etc. and performing appropriate heat treatment, the film thickness, dielectric constant, etc. can be easily controlled to be uniform.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, a dielectric layer is formed on a semiconductor substrate, and a conductor layer is formed on the dielectric layer to form a built-in capacitor element. Since the dielectric layer of the capacitor element is formed by an ion implantation method that allows element addition with good uniformity, the thickness, dielectric constant, etc. of this dielectric layer can be easily controlled to be uniform, and the desired capacitance can be achieved. It is possible to construct a capacitor element with high reproducibility without increasing the chip area, and the method itself is extremely simple compared to conventional methods, and there is no fear of an increase in the number of steps. Therefore, it has excellent features such as the ability to easily and inexpensively manufacture a semiconductor device incorporating this type of capacitor element.

[Brief explanation of the drawing]

FIGS. 1(a) to 1e) are cross-sectional views showing the manufacturing method of a semiconductor device according to the present invention in the order of steps, and FIGS. They are sectional views shown in order. l...Semiconductor substrate, 2...Insulator layer, 3...
・Capacitor formation part, 4... Contact part, 5.5
... Impurity diffusion layer, 6 ... Dielectric layer by ion implantation method, 7 ... Photoresist layer, 8 ... Conductor layer for capacitor, 9 ... Conductor for contact layer. Agent Masuo Oiwa Figure 1

Claims (1)

[Claims] (1) At least a step of forming an insulating layer on the main surface of the semiconductor substrate and selectively etching away the insulating layer to open a capacitor forming part and a contact part, respectively; forming an impurity diffusion layer by diffusing an impurity having the same conductivity type as the semiconductor substrate into the capacitor forming part and the contact part from each opening by ion implantation or the like; After selectively patterning a photoresist layer on the impurity diffusion layer and on the insulator layer, oxygen, nitrogen, etc. are selectively applied to the surface of the impurity diffusion layer in the capacitor formation area by ion implantation or the like. A step of forming a dielectric layer with a predetermined thickness by injecting the dielectric layer and heat-treating it in a predetermined manner, and forming a conductor layer on the entire upper surface of the dielectric layer, and then selectively etching away this conductor layer. , a step of forming a conductor layer for a capacitor, and a conductor layer for a contact, respectively, wherein each of the impurity diffusion layer, the dielectric layer, and the conductor layer formed on the semiconductor substrate forms a built-in capacitor element. 1. A method of manufacturing a semiconductor device, comprising: