JPS63310155A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS63310155A JPS63310155A JP14633687A JP14633687A JPS63310155A JP S63310155 A JPS63310155 A JP S63310155A JP 14633687 A JP14633687 A JP 14633687A JP 14633687 A JP14633687 A JP 14633687A JP S63310155 A JPS63310155 A JP S63310155A
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- integrated circuit
- semiconductor integrated
- circuit device
- active region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000005259 measurement Methods 0.000 abstract description 3
- 238000009966 trimming Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体集積回路の能動領域上に、電気絶縁
膜を介して、外部接続用電極を有する構造の半導体集積
回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit having a structure in which external connection electrodes are provided on an active region of the semiconductor integrated circuit via an electrical insulating film.
この発明は、半導体集積回路装置における外部接続用電
極において、電気特性測定等に使用し、外部と接続する
必要のないものを、内側に配置す −＼るこ
とにより、外部との接続の際の自由度を増し、また、半
導体集積回路装置の集積度を増すようにしたものである
。This invention provides an electrode for external connection in a semiconductor integrated circuit device that is used for measuring electrical characteristics and does not need to be connected to the outside by arranging it inside. This increases the degree of freedom and also increases the degree of integration of the semiconductor integrated circuit device.
従来、第２図に示すように、外部と接続する電極２と、
外部と接続しない電極３の両方共、半導体集積回路装置
１の外周部に配置し、電気特性測定、あるいは、外部と
の接続を容易にする構造のものが知られていた。なお、
４は能動領域である。Conventionally, as shown in FIG. 2, an electrode 2 connected to the outside,
A structure has been known in which both of the electrodes 3, which are not connected to the outside, are arranged on the outer periphery of the semiconductor integrated circuit device 1 to facilitate measurement of electrical characteristics or connection with the outside. In addition,
4 is an active area.
しかし、従来の外部接続用電極の配置では、電気特性測
定等のみに使用し、外部との接続を必要としない電極に
ついても、半導体集積回路装置の外周部に配置されてい
るため、外部との接続の際に制約を受けることがあった
。また、外部接続用電極は、半導体集積回路のうち大き
な面積を占めるため、外部接続用電極を半導体集積回路
装置の外周部に配置すると半導体集積回路装置の面積が
大きくなるという欠点があった。However, in the conventional arrangement of external connection electrodes, even electrodes that are used only for measuring electrical characteristics and do not require connection to the outside are placed on the outer periphery of the semiconductor integrated circuit device, making them difficult to connect to the outside. Sometimes there were restrictions when connecting. Further, since the external connection electrode occupies a large area of the semiconductor integrated circuit, there is a drawback that if the external connection electrode is arranged on the outer periphery of the semiconductor integrated circuit device, the area of the semiconductor integrated circuit device becomes large.
そこで、この発明は、従来のこのような欠点を解決する
ため、外部との接続の自由度を増し、装置の面積を縮小
することを目的としている。Therefore, in order to solve these conventional drawbacks, the present invention aims to increase the degree of freedom in connection with the outside and reduce the area of the device.
上記問題点を解決するために、この発明は、電気特性測
定等のみに使用する電極を半導体集積回路の能動領域上
でしかも内側に配置し、外部と接続する電極を外周部に
配置した。In order to solve the above-mentioned problems, the present invention arranges electrodes used only for measuring electrical characteristics, etc. on the active region of the semiconductor integrated circuit and inside, and electrodes connected to the outside are arranged on the outer periphery.
上記のように構成された半導体集積回路装置は外部との
接続の際、必要のない電極を装置な内側に配置している
ため、自由度が高（なる、また、装置の中で大きな面積
を占める電極を効率良く配置できるため、装置の集積度
の向上にも効果がある。The semiconductor integrated circuit device configured as described above has a high degree of freedom (and also requires a large area inside the device) because unnecessary electrodes are placed inside the device when connecting to the outside. Since the occupied electrodes can be efficiently arranged, it is also effective in improving the degree of integration of the device.
〔実施例〕
以下に、この発明の実施例を、図面にもとづいて詳細に
説明する。第１図において、半導体集積回路装置１は、
能動領域４上に、電気測定専用あるいはヒユーズ・トリ
ミング等に使用し、外部と接続しない電極３を、外部と
接続する電極２の内側に配置して構成する。[Example] Hereinafter, an example of the present invention will be described in detail based on the drawings. In FIG. 1, a semiconductor integrated circuit device 1 includes:
On the active region 4, an electrode 3 which is used exclusively for electrical measurement or for fuse trimming, etc. and is not connected to the outside is arranged inside the electrode 2 which is connected to the outside.
以上のような実施例において、電極の全てを、能動領域
上に配置し、半導体集積回路装置の面積を縮小すること
を重点に買くこともできる。また外部と接続しない電極
３のみを、能動領域上に配置し、外部と接続する電極２
を非能動領域に配置することによって、外部との接続の
際に、能動領域を、破壊する心配の無い半導体集積回路
装置を作製することもできる。In the embodiments described above, all of the electrodes may be placed on the active region, and the focus may be placed on reducing the area of the semiconductor integrated circuit device. In addition, only the electrode 3 that is not connected to the outside is placed on the active area, and the electrode 2 that is connected to the outside is placed on the active area.
By arranging the active region in the non-active region, it is possible to manufacture a semiconductor integrated circuit device that does not have to worry about destroying the active region when connected to the outside.
この発明は、以上説明したように、外部と接続しない電
極を、能動領域上でしかも内側に配置することによって
、半導体集積回路装置の集積度を向上させる効果がある
。また、外部と接続する電極のみを、装置の外周に配置
することによって、外部との接続の自由度を高くする効
果もある。As described above, the present invention has the effect of improving the degree of integration of a semiconductor integrated circuit device by arranging electrodes that are not connected to the outside on the active region and inside the active region. Further, by arranging only the electrodes connected to the outside on the outer periphery of the device, there is also the effect of increasing the degree of freedom in connection with the outside.
第１図は、この発明にかかる、半導体集積回路装置の平
面図、第２図は、従来の半導体集積回路装置の平面図で
ある。
■・・・半導体集積回路装置
２・・・外部と接続する電極
３・・・外部と接続しない電極
４・・・能動領域
以上FIG. 1 is a plan view of a semiconductor integrated circuit device according to the present invention, and FIG. 2 is a plan view of a conventional semiconductor integrated circuit device. ■... Semiconductor integrated circuit device 2... Electrode connected to the outside 3... Electrode 4 not connected to the outside... Active area or higher
Claims (2)
して、外部接続用電極を設けたことを特徴とする半導体
集積回路装置。(1) A semiconductor integrated circuit device characterized in that an electrode for external connection is provided on an active region of the semiconductor integrated circuit via an electrical insulating film.
用し、外部と接続する必要のないものを、半導体集積回
路装置の内側に配置した特許請求の範囲第１項記載の半
導体集積回路装置。(2) The semiconductor integrated circuit according to claim 1, wherein among the external connection electrodes, electrodes that are used for measuring electrical characteristics and do not need to be connected to the outside are arranged inside the semiconductor integrated circuit device. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14633687A JPS63310155A (en) | 1987-06-12 | 1987-06-12 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14633687A JPS63310155A (en) | 1987-06-12 | 1987-06-12 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63310155A true JPS63310155A (en) | 1988-12-19 |
Family
ID=15405386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14633687A Pending JPS63310155A (en) | 1987-06-12 | 1987-06-12 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63310155A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5956567A (en) * | 1994-12-19 | 1999-09-21 | Matsushita Electric Industrial Co., Ltd. | Semiconductor chip and semiconductor wafer having power supply pads for probe test |
| EP1150355A1 (en) * | 1998-11-20 | 2001-10-31 | Sony Computer Entertainment Inc. | Integrated circuit chip, integrated circuit, printed-circuit board and electronic device |
-
1987
- 1987-06-12 JP JP14633687A patent/JPS63310155A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5956567A (en) * | 1994-12-19 | 1999-09-21 | Matsushita Electric Industrial Co., Ltd. | Semiconductor chip and semiconductor wafer having power supply pads for probe test |
| EP1150355A1 (en) * | 1998-11-20 | 2001-10-31 | Sony Computer Entertainment Inc. | Integrated circuit chip, integrated circuit, printed-circuit board and electronic device |
| EP1150355A4 (en) * | 1998-11-20 | 2003-09-10 | Sony Computer Entertainment Inc | Integrated circuit chip, integrated circuit, printed-circuit board and electronic device |
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