JPH05315529A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH05315529A JPH05315529A JP4119449A JP11944992A JPH05315529A JP H05315529 A JPH05315529 A JP H05315529A JP 4119449 A JP4119449 A JP 4119449A JP 11944992 A JP11944992 A JP 11944992A JP H05315529 A JPH05315529 A JP H05315529A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- semiconductor element
- power supply
- semiconductor device
- metal piece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device.
【０００２】[0002]
【従来の技術】図３は従来の樹脂封止型半導体装置の一
例を示す平面図（ａ）及びそのＣ−Ｃ線断面図（ｂ）で
ある。図３において、従来の樹脂封止型半導体装置は、
仮想線で示す封止樹脂層１と、半導体素子２と、封止樹
脂層１の内部から外部へ延在する内部リード３と、封止
樹脂層１の外部から延在する外部リード４と、半導体素
子２の回路構成面の電極部（図示せず）の近傍の４辺の
内の２片を横断する接地端子もしくは電源端子５（以
下、内部リード３と外部リード４を含めて接地端子もし
くは電源端子５と称する）と、半導体素子２の電極部と
内部リード３のボンディング部とを電気的に接続する金
属細線６とから構成されている。2. Description of the Related Art FIG. 3 is a plan view (a) showing an example of a conventional resin-encapsulated semiconductor device and a sectional view (b) taken along the line CC. In FIG. 3, the conventional resin-encapsulated semiconductor device is
An encapsulating resin layer 1 indicated by a virtual line, a semiconductor element 2, an internal lead 3 extending from the inside of the encapsulating resin layer 1 to the outside, and an external lead 4 extending from the outside of the encapsulating resin layer 1. A grounding terminal or a power supply terminal 5 (hereinafter, including the inner lead 3 and the outer lead 4 including a grounding terminal or Power source terminal 5) and a thin metal wire 6 that electrically connects the electrode portion of the semiconductor element 2 and the bonding portion of the internal lead 3.
【０００３】ここにおいて、接地端子もしくは電源端子
５は半導体素子２の回路形成面上に固着されており、固
着法としては、両面絶縁性接着剤８を有するポリイミド
フィルム等の絶縁フィルム７を介して行われる。また、
接地端子もしくは電源端子５と半導体素子２とは金属細
線１０で電気的に接続されている。Here, the ground terminal or the power supply terminal 5 is fixed on the circuit forming surface of the semiconductor element 2. As a fixing method, an insulating film 7 such as a polyimide film having a double-sided insulating adhesive 8 is used. Done. Also,
The ground terminal or the power supply terminal 5 and the semiconductor element 2 are electrically connected by a thin metal wire 10.
【０００４】[0004]
【発明が解決しようとする課題】上述した従来の樹脂封
止型半導体装置は、半導体素子に多大な電流を流す際、
半導体素子面上に形成されかつ半導体素子の１辺もしく
は２辺を横断するように構成された接地端子もしくは電
源端子を用いることによって対応していたため、接地端
子もしくは電源端子の自由度及び電位変動の対応が制限
されていた。The above-mentioned conventional resin-encapsulated semiconductor device has the following problems when a large amount of current is applied to a semiconductor element.
Since this is dealt with by using the ground terminal or the power supply terminal formed on the semiconductor element surface and configured to cross one side or two sides of the semiconductor element, the degree of freedom of the ground terminal or the power supply terminal and the potential fluctuation Response was limited.
【０００５】特に近年、半導体素子の大型化、大規模化
に伴ない、発生する熱の増大及び１辺当りの信号数の増
加により、接地端子もしくは電源端子が上記構成では足
りなくなるという問題点を有していた。In particular, in recent years, with the increase in size and scale of semiconductor elements, the amount of heat generated and the number of signals per side increase, which causes a problem that the ground terminal or the power supply terminal is insufficient in the above configuration. I had.
【０００６】[0006]
【課題を解決するための手段】本発明の樹脂封止型半導
体装置は、半導体素子より小面積の金属片を有する接地
端子もしくは電源端子を備え、この金属片を半導体素子
の回路構成面上に絶縁性接着層を介して固着して半導体
素子を部分的に覆うように構成されている。A resin-encapsulated semiconductor device of the present invention is provided with a ground terminal or a power supply terminal having a metal piece having an area smaller than that of a semiconductor element, and the metal piece is placed on a circuit construction surface of the semiconductor element. It is configured to be fixed via an insulating adhesive layer so as to partially cover the semiconductor element.
【０００７】[0007]
【実施例】次に本発明について図面を用いて説明する。
図１は本発明の樹脂封止型半導体装置の第１の実施例の
平面図（ａ）及びそのＡ−Ａ線断面図（ｂ）である。The present invention will be described below with reference to the drawings.
FIG. 1 is a plan view (a) of the first embodiment of a resin-encapsulated semiconductor device of the present invention and a cross-sectional view (b) taken along line AA thereof.
【０００８】図１において、本実施例は仮想線で示す封
止樹脂層１と、半導体素子２と、封止樹脂層１の内部か
ら外部に延在する内部リード３と、樹脂封止層１の外部
から延在する外部リード４と、半導体素子２の回路構成
面上を覆うように内部リード４本により支持され金属片
で構成された接地端子もしくは電源端子５と、半導体素
子２の電極部（図示せず）と内部リード３のボンディン
グ部とを電気的に接続する金属細線６とから構成され
る。また、接地端子もしくは電源端子５と半導体素子２
とは金属細線１０で電気的に接続されている。In FIG. 1, in this embodiment, an encapsulating resin layer 1 shown by phantom lines, a semiconductor element 2, internal leads 3 extending from the inside of the encapsulating resin layer 1 to the outside, and a resin encapsulating layer 1 are shown. An external lead 4 extending from the outside of the semiconductor element 2, a ground terminal or a power supply terminal 5 formed of a metal piece and supported by four internal leads so as to cover the circuit configuration surface of the semiconductor element 2, and an electrode portion of the semiconductor element 2. (Not shown) and a thin metal wire 6 for electrically connecting the bonding portion of the internal lead 3 to each other. In addition, the ground terminal or the power supply terminal 5 and the semiconductor element 2
And are electrically connected by a thin metal wire 10.
【０００９】ここにおいて、接地端子もしくは電源端子
５は、半導体素子２の回路形成面上に固着されており、
固着方法としては、両面絶縁性接着剤８をするポリイミ
ドフィルム等の絶縁フィルム７を介して行われる。また
金属片はリードフレーム形成時に同時に形成される。Here, the ground terminal or the power supply terminal 5 is fixed on the circuit forming surface of the semiconductor element 2.
As a fixing method, it is performed through an insulating film 7 such as a polyimide film having a double-sided insulating adhesive 8. The metal pieces are formed at the same time when the lead frame is formed.
【００１０】図２は本発明の第２の実施例を示す図であ
り、同図（ａ）は樹脂封止型半導体装置の平面図、同図
（ｂ）はそのＢ−Ｂ線断面図である。2A and 2B are views showing a second embodiment of the present invention. FIG. 2A is a plan view of a resin-sealed semiconductor device, and FIG. 2B is a sectional view taken along line BB thereof. is there.
【００１１】図２において、本実施例は仮想線で示す封
止樹脂層１と、半導体素子２と、封止樹脂層１の内部か
ら外部に延在する内部リード３と、封止樹脂層１の外部
から延在する外部リード４と、半導体素子２の回路構成
面上を覆うように内部リード４本により支持された第１
の金属片で構成される接地端子もしくは電源端子５と、
この第１の金属片の上層に電気絶縁性接着層を介してこ
の金属片とほぼ同等の大きさの第２の金属片で構成され
た接地端子もしくは電源端子９と、半導体素子２の電極
部（図示せず）と内部リード３のボンディング部とを電
気的に接続する金属細線６とから構成されている。ま
た、接地端子もしくは電源端子５と半導体素子２とは金
属細線１０で接続され、さらに接地端子もしくは電源端
子９と半導体素子２とは金属細線１１でそれぞれ電気的
に接続されている。Referring to FIG. 2, in this embodiment, the encapsulating resin layer 1 shown by phantom lines, the semiconductor element 2, the internal leads 3 extending from the inside of the encapsulating resin layer 1 to the outside, and the encapsulating resin layer 1 An external lead 4 extending from the outside of the semiconductor chip and a first internal lead supported by four internal leads so as to cover the circuit configuration surface of the semiconductor element 2.
A grounding terminal or power supply terminal 5 composed of a metal piece of
A ground terminal or a power supply terminal 9 composed of a second metal piece having substantially the same size as the metal piece on the upper layer of the first metal piece via an electrically insulating adhesive layer, and an electrode portion of the semiconductor element 2. (Not shown) and a thin metal wire 6 for electrically connecting the bonding portion of the internal lead 3 to each other. Further, the ground terminal or power supply terminal 5 and the semiconductor element 2 are electrically connected by a thin metal wire 10, and the ground terminal or power supply terminal 9 and the semiconductor element 2 are electrically connected by a fine metal wire 11, respectively.
【００１２】ここにおいて、接地端子もしくは電源端子
５は、その金属片が半導体素子２の回路形成面上に固着
されており、固着方法としては、両面絶縁性接着剤８を
有するポリイミドフィルム等の絶縁フィルム７を介して
行われる。また、接地端子もしくは電源端子９となる第
２の金属片は、第１の金属片の上層に固着されており、
第１の金属片と同様の固着法にて行われている。本実施
例によれば、接地端子もしくは電源端子の面積がさらに
増大するため、大電流が得られかつ放熱効果の向上が得
られる。In this case, the ground terminal or the power supply terminal 5 has a metal piece thereof fixed to the circuit forming surface of the semiconductor element 2. As a fixing method, an insulating material such as a polyimide film having a double-sided insulating adhesive 8 is used. It is performed through the film 7. Also, the second metal piece serving as the ground terminal or the power supply terminal 9 is fixed to the upper layer of the first metal piece,
The same fixing method as that for the first metal piece is used. According to this embodiment, since the area of the ground terminal or the power supply terminal is further increased, a large current can be obtained and the heat radiation effect can be improved.
【００１３】[0013]
【発明の効果】以上説明したように本発明は、半導体素
子の回路形成面上に接地端子もしくは電源端子を半導体
素子を覆うように金属片で構成することにより、従来１
６０ピン程度の樹脂封止型半導体装置には８本必要であ
った接地端子もしくは電源端子を４本のリードで実現で
きるという効果を有し、半導体素子の回路形成面を金属
片で覆うことにより、放熱性の向上及び封止樹脂の応力
も緩和できるという効果を有する。As described above, according to the present invention, the ground terminal or the power supply terminal is formed of the metal piece on the circuit formation surface of the semiconductor element so as to cover the semiconductor element.
It has an effect that a ground terminal or a power supply terminal, which was necessary for eight resin-sealed semiconductor devices of about 60 pins, can be realized by four leads. By covering the circuit forming surface of the semiconductor element with a metal piece, Further, it has an effect of improving heat dissipation and relieving stress of the sealing resin.
【図１】本発明の第１の実施例を示す平面図（ａ）及び
そのＡ−Ａ線断面図（ｂ）である。FIG. 1 is a plan view (a) showing a first embodiment of the present invention and a sectional view (b) taken along the line AA.
【図２】本発明の第２の実施例の平面図（ａ）及びその
Ｂ−Ｂ線断面図（ｂ）である。FIG. 2 is a plan view (a) of the second embodiment of the present invention and a cross-sectional view (b) taken along line BB thereof.
【図３】従来の樹脂封止型半導体装置を示す平面図
（ａ）及びそのＣ−Ｃ線断面図（ｂ）である。FIG. 3 is a plan view (a) showing a conventional resin-encapsulated semiconductor device and a sectional view (b) taken along the line CC of FIG.
１ 封止樹脂層 ２ 半導体素子 ３ 内部リード ４ 外部リード ５ 接地端子もしくは電源端子 ６ 金属細線 ７ 絶縁性フィルム ８ 両面絶縁性接着剤 ９ 接地端子もしくは電源端子 １０，１１ 金属細線 1 Sealing Resin Layer 2 Semiconductor Element 3 Internal Lead 4 External Lead 5 Ground Terminal or Power Terminal 6 Metal Thin Wire 7 Insulating Film 8 Double-Sided Adhesive 9 Ground Terminal or Power Terminal 10, 11 Metal Thin Wire
Claims (2)
電極取り出し用の複数の内部リードのうちの少なくとも
４本以上で支持される半導体素子より小面積の金属片を
有する接地端子もしくは電源端子が半導体素子の回路形
成面上に電気絶縁性接着層により固着され、さらに前記
内部リードと半導体素子とが金属細線により接続されて
いることを特徴とする樹脂封止型半導体装置。1. A ground terminal or a power source having a metal piece having a smaller area than a semiconductor element supported by at least four or more of a plurality of internal leads for extracting external electrodes extending from the inside of a sealing resin layer to the outside. A resin-encapsulated semiconductor device characterized in that a terminal is fixed on a circuit forming surface of a semiconductor element by an electrically insulating adhesive layer, and further, the internal lead and the semiconductor element are connected by a fine metal wire.
外部電極取り出し用の複数の内部リードのうちの少なく
とも４本以上で支持された接地端子もしくは電源端子を
構成する半導体素子より小面積の第１の金属片を有し、
この第１の金属片の上層に電気絶縁性接着層を介して第
２の金属片を設けて成る請求項１記載の樹脂封止型半導
体装置。2. An area smaller than a semiconductor element constituting a ground terminal or a power supply terminal supported by at least four or more of a plurality of internal leads for extracting external electrodes extending from the inside of the sealing resin layer to the outside. Having a first metal piece of
2. The resin-encapsulated semiconductor device according to claim 1, wherein the second metal piece is provided on the upper layer of the first metal piece with an electrically insulating adhesive layer interposed therebetween.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4119449A JPH05315529A (en) | 1992-05-13 | 1992-05-13 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4119449A JPH05315529A (en) | 1992-05-13 | 1992-05-13 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05315529A true JPH05315529A (en) | 1993-11-26 |
Family
ID=14761674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4119449A Withdrawn JPH05315529A (en) | 1992-05-13 | 1992-05-13 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05315529A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0926734A2 (en) * | 1997-12-22 | 1999-06-30 | Texas Instruments Incorporated | Method and apparatus for delivering electrical power to a semiconducteur die |
-
1992
- 1992-05-13 JP JP4119449A patent/JPH05315529A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0926734A2 (en) * | 1997-12-22 | 1999-06-30 | Texas Instruments Incorporated | Method and apparatus for delivering electrical power to a semiconducteur die |
| EP0926734A3 (en) * | 1997-12-22 | 2002-04-03 | Texas Instruments Incorporated | Method and apparatus for delivering electrical power to a semiconducteur die |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Application deemed to be withdrawn because no request for examination was validly filed |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990803 |