JPS6330946A - Paging system for multitask - Google Patents

Abstract

PURPOSE:To enable a large space of memory to be used by a user without being conscious of a page in an application program, by managing a memory block by an OS in a page unit. CONSTITUTION:Assuming that a task A is being executed, pages 0-4 to which the task A accesses, are mapped to memory blocks, 0, 1, 3, 6 and 8 by a paging data A stored in the control register of corresponding task control block A. When a task is switched from the task A to a task B, a task dispatcher 3 reads out a paging data B out of the control register of a task control block B, and writes it on a paging register 4 through the use of an I/O instruction. As a result, the pages 0-4 judged from the standpoint of the application program of the task B, are mapped in memory blocks 2, 4, 5, 7, and 8, respectively. In this way, a large capacity of memory can be used without changing the application program.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a paging method in multitasking, and particularly to a paging method in multitasking mode in a microprocessor.

[Conventional technology]

Conventionally, when a microcomputer (hereinafter abbreviated as CPU) is used, the capacity of memory space that can be accessed from the CPU is limited. For example, in the real mode of a CPU such as Intel 8086.80186.80286, the memory space that can be accessed by an application program task is limited to a maximum of 1 MB.

However, many recent application programs use large amounts of memory (and are becoming more and more
Limitations in the accessible memory space of U have become a major bottleneck in creating application programs. On the other hand, in the case of application programs that are executed in multitasking, the shortage of memory space is becoming more and more obvious because multiple application programs are running at the same time.

For this reason, a paging method has traditionally been used in which the application program divides the memory into memory blocks of a predetermined capacity and handles the pages in blocks, effectively increasing the amount of memory space that can be accessed by the application program. There were times when I was

[Problem that the invention seeks to solve]

However, the conventional paging method described above has a problem in that troubles often occur because the application program must directly handle memory blocks.

In view of the above-mentioned points, an object of the present invention is to allow an operating system (hereinafter referred to as OS) to manage the handling of memory blocks so that a large amount of memory can be used without any awareness on the application program side. The purpose of the present invention is to provide a paging method for multitasking that allows for multitasking.

[Means for solving problems]

The paging method for multitasking of the present invention consists of a control register that is provided for each task in the task control profiler of the operating system and stores the paging data of the task, and an address conversion of the access address from the task to the memory according to the task. The paging register has a paging register that holds the paging data in order to do so, and a task dispatcher that sets the paging data from the control register to the paging register at the time of task switching.

[Effect]

In the multitasking paging method of the present invention, a control register is provided in the task control block of the operating system for each task and stores paging data for the task, and the paging register assigns the memory access address from the task to the task. Paging data is held in order to perform address conversion accordingly, and the task dispatcher sets paging data from the control register to the paging register when switching tasks.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

The paging method for multitasking in this embodiment is O
A control register 2a is provided in the No. 8 task control block corresponding to the tasks 1a to 1n and stores paging data of each task 1a to 1n, respectively.
~2n, a paging register 4 that holds paging data for converting the access address from the tasks 1a~1n to the memory 5 according to the tasks 1a~1n, and a control register 2a~2n when switching tasks.
The main part thereof consists of a task dispatcher 3 that sets paging data from 2n to a paging register 4.

Referring to FIG. 2, the processing procedure in the task dispatcher 3 consists of a task switching step 11, a paging data reading step 12, and a paging data setting step 13.

Referring to FIG. 3, in the hardware configuration to which the paging method in multitasking of this embodiment is applied, C
For example, the lower 17 bits of the address bus 7 from the PU 6 are input directly to the memory 5, and the upper bits of 18 or more bits are input to the memory 5 after address conversion by the paging register 4 as an address conversion mechanism. Note that numeral 8 indicates a data bus.

Referring to FIG. 4, the memory 5 is managed in page units divided into memory blocks of, for example, 128 KB, and the address space directly accessible from the CPU 6 is I
It is MB. In addition, the paging register 4 is
Since there are 8 memory blocks that can be accessed from the PU 6, it is composed of 8 parts.

Next, the operation of the paging method in multitasking of this embodiment configured as described above will be explained.

When the task dispatcher 3 switches tasks (step 11), paging data is read from the control register of the task (step 12), and this paging data is written and set in the page register 4 by the I10 instruction. .

For example, as shown in FIG. 4, the value 32 is stored in the fifth position of paging register 4, and the number of tasks is 80,000 to 80,000.
If address 9FFFF is accessed, the fifth paging register 4 is referenced. As a result, 8000
Access to addresses 0-9FFFF is 320000-33
The address is converted to access to address FFFF, and 320
The contents of addresses 000-33FFPF are accessed.

As described above, in the multitasking paging method of this embodiment, the IMB address space can be muffed into a memory space of up to 16 MB in units of 128 KB blocks.

Next, the relationship between tasks and assigned memory blocks will be explained in more detail with reference to FIG.

Assuming that task A is currently being executed, pages 0 to 4 accessed by task A are stored in memory blocks 0 to 4 based on paging data 8 stored in the control register of the corresponding task control block A. 1. 3
．． 6 and 8, respectively. When switching from task A to task B, task dispatcher 3 reads paging data B from the control register of task control block B.
Write to paging register 4 using the I10 instruction. As a result, pages O to 4 seen from the application program of task B are memory blocks 2, 4, 5, 7
and 8, respectively. Therefore, even though each task is accessing the same page from the perspective of the program being executed, each task is actually accessing a different memory block.

As described above, by using the paging method in multitasking of this embodiment, although the memory capacity that each task itself can access cannot exceed the limit of the CPU 6, the total amount of memory that can be accessed by multiple tasks is large. can be managed. In particular, since the pages are managed by O8, it is possible to use a large amount of memory overall without changing the application program. Note that the same memory block may be shared by a plurality of tasks (for example, in FIG. 5, task A and task B share memory block 8 as a CRT bitmap memory, etc.).

〔Effect of the invention〕

As explained above, according to the present invention, since memory blocks are managed by O5 in page units, the user can use a large memory space in an application program without being aware of pages. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a paging method in multitasking according to an embodiment of the present invention, FIG. 2 is a flowchart showing the processing procedure in the task dispatcher shown in FIG. 1, and FIG. A block diagram showing the main parts of the hardware configuration to which the paging method is applied in multitasking according to the embodiment. FIG. 4 is a diagram showing the relationship between the values of the paging register and memory blocks to be accessed. FIG. FIG. 3 is a diagram showing a relationship with assigned memory blocks. In the figure, 13~In・Task, 2a-2n・Control register, 3...
Task dispatcher, 4...Paging register, 5...Memory, 6...CPU. 7...Address bus, 8...Data bus, 11...Task switching step, 12...
Paging data reading step, 13 . . . paging register setting step. - to Figure 3 Figure 4

Claims (1)

[Scope of Claims] A control register provided in a task control block of an operating system corresponding to a task and storing task paging data; and a control register for converting an access address from a task to memory according to the task. A paging method for multitasking, comprising: a paging register that holds data; and a task dispatcher that sets the paging data from the control register to the paging register when switching tasks.