JPS63308390A - Manufacture of semiconductor pressure sensor - Google Patents
Manufacture of semiconductor pressure sensorInfo
- Publication number
- JPS63308390A JPS63308390A JP14478187A JP14478187A JPS63308390A JP S63308390 A JPS63308390 A JP S63308390A JP 14478187 A JP14478187 A JP 14478187A JP 14478187 A JP14478187 A JP 14478187A JP S63308390 A JPS63308390 A JP S63308390A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- diaphragm
- type
- pressure sensor
- semiconductor pressure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000005530 etching Methods 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000012535 impurity Substances 0.000 claims abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052710 silicon Inorganic materials 0.000 claims description 15
- 239000010703 silicon Substances 0.000 claims description 15
- 239000003513 alkali Substances 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract 2
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 238000005259 measurement Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は半導体圧力センサの9J造方法に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a 9J manufacturing method for a semiconductor pressure sensor.
更に詳述すれば、エツチング加工法を利用してダイアフ
ラムと支持基板とを一体に形成する半導体圧力センサの
製造方法に関するものである。More specifically, the present invention relates to a method of manufacturing a semiconductor pressure sensor in which a diaphragm and a support substrate are integrally formed using an etching process.
(従来の技術)
第4図は従来より一般に使用されている従来例の構成説
明図である。(Prior Art) FIG. 4 is a diagram illustrating the configuration of a conventional example that has been commonly used.
図において、1は半導体よりなる基板である。In the figure, 1 is a substrate made of a semiconductor.
2は基板1に取付けられ測定圧Pを受圧するダイアフラ
ムである。21はダイアフラム2にダイアフラム本体部
22を形成する凹部である。3はダイアフラム本体部2
2に設けられたピエゾ抵抗ゲージである。A diaphragm 2 is attached to the substrate 1 and receives the measurement pressure P. 21 is a recessed portion forming a diaphragm main body portion 22 in the diaphragm 2 . 3 is the diaphragm main body part 2
This is a piezoresistance gauge installed at 2.
以上の構成において、ダイアフラム本体部22に測定圧
力Pが加わると、歪を生じ、ピエゾ抵抗ゲージ3より測
定圧力Pに対応した出力が得られる。In the above configuration, when a measurement pressure P is applied to the diaphragm main body portion 22, distortion occurs, and an output corresponding to the measurement pressure P is obtained from the piezoresistance gauge 3.
(発明が解決しようとする問題点)
このような従来例装異では、基板1に対して、凹部21
が設けられたダイアフラム2を接合取付けて組み立てる
。(Problems to be Solved by the Invention) In such a conventional arrangement, the recess 21 is
The diaphragm 2 provided with the diaphragm 2 is assembled by joining.
この場合、基板1にダイアフラム2を取付けるための接
合技術を必要とし、接合強度、温度膨張係数差等が問題
となり、装置の特性に大きな影響を及ぼす。In this case, a bonding technique is required to attach the diaphragm 2 to the substrate 1, and issues such as bonding strength and temperature expansion coefficient differences arise, which greatly affects the characteristics of the device.
本発明は、これ等の問題点を解決するものである。The present invention solves these problems.
本発明の目的は、耐圧特性、温度特性が良好で、大量生
産に適し、安価な半導体圧力センサを提供するにある。An object of the present invention is to provide an inexpensive semiconductor pressure sensor that has good pressure resistance and temperature characteristics, is suitable for mass production, and is inexpensive.
(問題点を解決するための手段)
この目的を達成するために、本発明は、ダイアフラムを
有する半導体圧力センサにおいて、ダイアフラムを形成
する凹部部分に対応するn形の伝導形のシリコン基板の
部分に不純物をドーピングしてP形の伝導形部分を形成
する。次に、前記シリコン基板上に前記n形の伝導形か
らなるエピタキシャル層を積層する。その後、前記不純
物のドーピング部分と前記シリコン基板部分、該ドーピ
ング部分と前記エピタキシャル層との間に逆バイアス電
圧を印加して異方性エツチングにより前記凹部部分をエ
ツチングにより除去して半導体圧力センサを構成する半
導体圧力センサの製造方法を採用したものである。(Means for Solving the Problems) In order to achieve this object, the present invention provides a semiconductor pressure sensor having a diaphragm, in which a portion of an n-type conductive silicon substrate corresponding to a recessed portion forming the diaphragm is A P-type conduction type portion is formed by doping with impurities. Next, the epitaxial layer having the n-type conductivity type is laminated on the silicon substrate. Thereafter, a reverse bias voltage is applied between the impurity doped portion and the silicon substrate portion, and between the doped portion and the epitaxial layer, and the recessed portion is removed by anisotropic etching to form a semiconductor pressure sensor. This method employs a semiconductor pressure sensor manufacturing method.
(作用)
以上の構成において、ダイアフラムに測定圧力が加わる
と、歪が生じ、ピエゾ抵抗ゲージより測定圧力に対応し
た出力が得られる。(Function) In the above configuration, when measurement pressure is applied to the diaphragm, distortion occurs, and an output corresponding to the measurement pressure is obtained from the piezoresistive gauge.
この場合、凹部部分に対応した部分に、不純物をドーピ
ングしてP形の導電形部分を形成し、エツチングにより
n形の導電形部分を除去することによって、基板とダイ
アフラム一体形の半導体圧力センサを得ることができる
。In this case, a semiconductor pressure sensor integrated with a substrate and a diaphragm is formed by doping impurities to form a P-type conductivity type portion in a portion corresponding to the recessed portion and removing the N-type conductivity type portion by etching. Obtainable.
以下、実施例に基づき、詳細に説明する。Hereinafter, a detailed explanation will be given based on examples.
(実施例) 第1図は本発明の一実施例の製作工程図である。(Example) FIG. 1 is a manufacturing process diagram of an embodiment of the present invention.
図において、第4図と同一記号は同一機能を示す。In the figure, the same symbols as in FIG. 4 indicate the same functions.
以下、第4図と相違部分のみ説明する。Hereinafter, only the differences from FIG. 4 will be explained.
(1)n形翼板lの凹部21に対応する部分Aに、P形
不純物を、第1図(a)に示す如くドーピングする。こ
の場合は、ボロンがドーピングされている。(1) A portion A corresponding to the recess 21 of the n-type blade l is doped with a P-type impurity as shown in FIG. 1(a). In this case, boron is doped.
凹部21に対応する部分以外に、凹部21部分より帯状
部23が伸びているのは、第1図(b)に示す如く、ウ
ェハ一単位で、ボロンのドーピングを行った場合に各凹
部21の対応部分Aを電気的に帯状部23によって導通
できるようにするためである。In addition to the portions corresponding to the recesses 21, the band-like portions 23 extend beyond the recesses 21, as shown in FIG. 1(b). This is to enable the corresponding portion A to be electrically conductive through the strip portion 23.
(2)n形翼板の一面側に第1図(C)に示す如く、n
エピタキシャル層を形成する
(3) 第1図(d)に示す如く、n形翼板の他面側
に窒化シリコン(SiN)膜マスクを施す、窒化シリコ
ン膜(SiN)はアルカリ異方性エツチング溶液に対し
て2A’/mi+1以下のエッチレートであり、充分な
マスク能力がある。(2) On one side of the n-shaped blade plate, as shown in Figure 1 (C),
Forming an epitaxial layer (3) As shown in Figure 1(d), apply a silicon nitride (SiN) film mask to the other side of the n-type blade plate.The silicon nitride film (SiN) is etched with an alkaline anisotropic etching solution. The etch rate is 2A'/mi+1 or less compared to the etch rate, and there is sufficient masking ability.
(4) 第1図<e)に示す如く、n形翼板の他面側
よりアルカリエツチングを行い、凹部21に達する深さ
まで行う。(4) As shown in FIG. 1<e>, alkali etching is performed from the other side of the n-type blade plate to a depth that reaches the recess 21.
(5) 第1図(f)に示す如く、基板1とダイアフ
ラム2のP/N接合部分に逆バイアス電圧Eを印加し、
アルカリエツチングを行い、ダイアフラム2と基板1と
を形成する。逆バイアス状態ではP形層のみエツチング
される。(5) As shown in FIG. 1(f), apply a reverse bias voltage E to the P/N junction between the substrate 1 and the diaphragm 2,
Alkali etching is performed to form the diaphragm 2 and the substrate 1. Under reverse bias conditions, only the P-type layer is etched.
(6) 第1図(g)に示す如く、ピエゾ抵抗ゲージ
3リード線31形成の為の半導体プロセスを行う。(6) As shown in FIG. 1(g), a semiconductor process is performed to form the lead wire 31 of the piezoresistive gauge 3.
なお、アルカリエツチングによる異方性エツチングであ
っても、第2図に示す如く、最初は四角形にエツチング
されるが、最終的には円形にエツチングすることができ
る。Note that even in the case of anisotropic etching using alkali etching, as shown in FIG. 2, the etching is initially performed in a square shape, but it can eventually be etched in a circular shape.
この結果
(1) 基板1とダイアフラム2とが一体形で形成さ
れるので、基板1とダイアフラム2との接合を必要とせ
ず、接合に基づく不安定さの問題がなくなる。As a result (1) Since the substrate 1 and the diaphragm 2 are integrally formed, it is not necessary to bond the substrate 1 and the diaphragm 2, and the problem of instability due to bonding is eliminated.
(2) 基板1とダイアフラム2とが同じシリコンで
あるので、熱膨張係数差による零点の温度変動がない。(2) Since the substrate 1 and the diaphragm 2 are made of the same silicon, there is no temperature fluctuation at the zero point due to a difference in thermal expansion coefficients.
(3) シリコンダイアフラム2の位置、厚さ、形状
は逆バイアス電圧を印加する方式の異方性エツチングに
より正確に制御できる。(3) The position, thickness, and shape of the silicon diaphragm 2 can be accurately controlled by anisotropic etching that applies a reverse bias voltage.
(4) ウェハーごとの加工が出来るので、大量生産
に好適である。(4) Since each wafer can be processed, it is suitable for mass production.
(5)通常の半導体プロセス技術を利用して容易にダイ
アプラムを形成することができる。(5) The diaphragm can be easily formed using normal semiconductor process technology.
(6) シリコンダイアフラムの加工に機械加工を使
用しないので、破壊強度が大である。(6) Since no machining is used to process the silicon diaphragm, its breaking strength is high.
(7) ダイアフラム2の本体部分をn−エピタキシ
ャル層で構成されるので、極めて薄くすることができ、
差圧計等の低圧レンジ用の装置を容易に作ることができ
る。(7) Since the main body portion of the diaphragm 2 is composed of an n-epitaxial layer, it can be made extremely thin.
Devices for low pressure ranges such as differential pressure gauges can be easily made.
第1図は本発明の他の実施例の要部構成説明図である。FIG. 1 is an explanatory diagram of the main part configuration of another embodiment of the present invention.
本実施例においては、ピエゾ抵抗ゲージ3とリード線3
1形成の半導体プロセス完了後に、ダイアフラム2のア
ルカリエツチングを行うようにしたものである。In this embodiment, a piezo resistance gauge 3 and a lead wire 3 are used.
The diaphragm 2 is subjected to alkali etching after the semiconductor process for forming the diaphragm 1 is completed.
この場合、エツチングの際の逆バイアス用P+端子32
を設けておく必要がある。In this case, the P+ terminal 32 for reverse bias during etching
It is necessary to set up
(発明の効果)
以上説明したように、本発明は、ダイアフラムを有する
半導体圧力センサにおいて、ダイアフラムを形成する凹
部部分に対応するn形の伝導形のシリコン基板の部分に
不純物をドーピングしてP形の伝導形部分を形成する。(Effects of the Invention) As explained above, the present invention provides a semiconductor pressure sensor having a diaphragm, in which a portion of a silicon substrate of an n-type conductivity type corresponding to a concave portion forming a diaphragm is doped with an impurity to conduct a p-type semiconductor pressure sensor. form the conductive part of.
次に、l111記シリコン基板上に前記n形の伝導形か
らなるエピタキシャル層を積mする。その後、!1′i
前記不純物のドーピング部分と前記シリコン基板部分、
該ドーピング部分と前記エピタキシャル層との間に逆バ
イアス電圧を印加して異方性エツチングにより前記凹部
部分をエツチングにより除去して半導体圧力センサを構
成する半導体圧力センサの製造方法を採用したので、基
板とダイアフラム一体形の半導体圧力センサを得ること
ができる。Next, an epitaxial layer of the n-type conductivity is deposited on the silicon substrate. after that,! 1'i
the impurity doped portion and the silicon substrate portion;
A method for manufacturing a semiconductor pressure sensor is adopted in which a reverse bias voltage is applied between the doped portion and the epitaxial layer and the recessed portion is removed by anisotropic etching to form a semiconductor pressure sensor. A semiconductor pressure sensor with an integrated diaphragm can be obtained.
この結果、(1) 基板とダイアフラムが別体の場合
の如く、接合に基づく不安定さの問題がなくなる。(2
) 基板とダイアフラムとが同じシリコンであるので
、熱膨張係数差による零点の温度変動がない。(3)
シリコンダイアフラムの位置、厚さ、形状な逆バイア
ス電圧を印加する方式の異方性エツチングにより正確に
制御できる。(4) ウェハーごとの加工ができるの
で、大量生産に好適である。As a result, (1) there is no longer a problem of instability due to bonding, which occurs when the substrate and diaphragm are separate bodies; (2
) Since the substrate and diaphragm are made of the same silicon, there is no temperature fluctuation at the zero point due to differences in thermal expansion coefficients. (3)
The position, thickness, and shape of the silicon diaphragm can be precisely controlled by anisotropic etching that applies a reverse bias voltage. (4) Since each wafer can be processed, it is suitable for mass production.
(5) 通常の半導体プロセス技術を利用して容易に
ダイアフラムを形成することができる。(6) シリ
コンダイアフラムの加工に機械加工を使用しないので、
破壊強度が大である。(7) ダイアフラムの本体部
分を第1の伝導形からなるエピタキシャル層で構成した
ので、極めて薄くすることができ、差圧計等の低圧力レ
ンジ用の装置を容易に作ることができる。(8) 異
方性エツチングであっても、円形ダイアプラムが製作可
能である。(5) The diaphragm can be easily formed using normal semiconductor process technology. (6) No machining is used to process the silicon diaphragm, so
It has high breaking strength. (7) Since the main body portion of the diaphragm is composed of an epitaxial layer of the first conductivity type, it can be made extremely thin, and devices for low pressure ranges such as differential pressure gauges can be easily manufactured. (8) Circular diaphragms can be manufactured even with anisotropic etching.
したがって、本発明によれば、耐圧特性、温度特性が良
好で、大量生産に適し、安価な半導体圧力センサを実現
することができる。Therefore, according to the present invention, it is possible to realize an inexpensive semiconductor pressure sensor that has good pressure resistance characteristics and temperature characteristics, is suitable for mass production, and is inexpensive.
第1図は本発明の一実施例の説明図、第2図は第1図の
動作説明図、第3図は本発明の他の実施例の構成説明図
、第4図は従来より一般に使用されている従来1列の構
成説明図である。
l・・・基板、2・・・ダイアフラム、21・・・凹部
、22・・・ダイアフラム本体部、3・・・ピエゾ抵抗
ゲー第1図
第2図
第3図
7At、図Fig. 1 is an explanatory diagram of one embodiment of the present invention, Fig. 2 is an explanatory diagram of the operation of Fig. 1, Fig. 3 is an explanatory diagram of the configuration of another embodiment of the invention, and Fig. 4 is a conventionally commonly used FIG. 2 is an explanatory diagram of a conventional one-row configuration. l...Substrate, 2...Diaphragm, 21...Recess, 22...Diaphragm body, 3...Piezoresistance game Figure 1, Figure 2, Figure 3, Figure 7At, Figure
Claims (1)
形のシリコン基板の部分に不純物をドーピングしてP形
の伝導形部分を形成する。 次に、前記シリコン基板上に前記n形の伝導形からなる
エピタキシャル層を積層する。 その後、前記不純物のドーピング部分と前記シリコン基
板部分、該ドーピング部分と前記エピタキシャル層との
間に逆バイアス電圧を印加して異方性エッチングにより
前記凹部部分をエッチングにより除去して半導体圧力セ
ンサを構成する半導体圧力センサの製造方法。[Claims] In a semiconductor pressure sensor having a diaphragm, an impurity is doped into a portion of a silicon substrate of an n-type conductivity type corresponding to a recessed portion forming the diaphragm to form a p-type conductivity type portion. Next, the epitaxial layer having the n-type conductivity type is laminated on the silicon substrate. Thereafter, a reverse bias voltage is applied between the impurity doped portion and the silicon substrate portion, and between the doped portion and the epitaxial layer, and the recessed portion is removed by anisotropic etching to form a semiconductor pressure sensor. A method for manufacturing a semiconductor pressure sensor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14478187A JPH0626254B2 (en) | 1987-06-10 | 1987-06-10 | Method for manufacturing semiconductor pressure sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14478187A JPH0626254B2 (en) | 1987-06-10 | 1987-06-10 | Method for manufacturing semiconductor pressure sensor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63308390A true JPS63308390A (en) | 1988-12-15 |
JPH0626254B2 JPH0626254B2 (en) | 1994-04-06 |
Family
ID=15370289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14478187A Expired - Lifetime JPH0626254B2 (en) | 1987-06-10 | 1987-06-10 | Method for manufacturing semiconductor pressure sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0626254B2 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02244769A (en) * | 1989-03-17 | 1990-09-28 | Nissan Motor Co Ltd | Manufacture of semiconductor device |
US5395802A (en) * | 1992-03-31 | 1995-03-07 | Nissan Motor Co., Ltd. | Process for making semiconductor acceleration sensor having anti-etching layer |
EP0838338A2 (en) * | 1996-10-24 | 1998-04-29 | Seiko Epson Corporation | Ink jet recording head and process of manufacturing said ink jet recording head |
US6140143A (en) * | 1992-02-10 | 2000-10-31 | Lucas Novasensor Inc. | Method of producing a buried boss diaphragm structure in silicon |
US6250165B1 (en) | 1998-02-02 | 2001-06-26 | Denso Corporation | Semiconductor physical quantity sensor |
US6388300B1 (en) | 1999-01-25 | 2002-05-14 | Denso Corporation | Semiconductor physical quantity sensor and method of manufacturing the same |
JP2009130295A (en) * | 2007-11-27 | 2009-06-11 | Panasonic Electric Works Co Ltd | Transducer substrate manufacturing method, transducer substrate, and transducer |
JP2009130297A (en) * | 2007-11-27 | 2009-06-11 | Panasonic Electric Works Co Ltd | Method of manufacturing substrate for transducer, substrate for transducer, and transducer |
-
1987
- 1987-06-10 JP JP14478187A patent/JPH0626254B2/en not_active Expired - Lifetime
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02244769A (en) * | 1989-03-17 | 1990-09-28 | Nissan Motor Co Ltd | Manufacture of semiconductor device |
US6140143A (en) * | 1992-02-10 | 2000-10-31 | Lucas Novasensor Inc. | Method of producing a buried boss diaphragm structure in silicon |
US5395802A (en) * | 1992-03-31 | 1995-03-07 | Nissan Motor Co., Ltd. | Process for making semiconductor acceleration sensor having anti-etching layer |
EP0838338A2 (en) * | 1996-10-24 | 1998-04-29 | Seiko Epson Corporation | Ink jet recording head and process of manufacturing said ink jet recording head |
EP0838338A3 (en) * | 1996-10-24 | 1999-01-07 | Seiko Epson Corporation | Ink jet recording head and process of manufacturing said ink jet recording head |
US6183070B1 (en) | 1996-10-24 | 2001-02-06 | Seiko Epson Corporation | Ink jet recording head and process of manufacturing the ink jet recording head |
US6250165B1 (en) | 1998-02-02 | 2001-06-26 | Denso Corporation | Semiconductor physical quantity sensor |
US6388300B1 (en) | 1999-01-25 | 2002-05-14 | Denso Corporation | Semiconductor physical quantity sensor and method of manufacturing the same |
JP2009130295A (en) * | 2007-11-27 | 2009-06-11 | Panasonic Electric Works Co Ltd | Transducer substrate manufacturing method, transducer substrate, and transducer |
JP2009130297A (en) * | 2007-11-27 | 2009-06-11 | Panasonic Electric Works Co Ltd | Method of manufacturing substrate for transducer, substrate for transducer, and transducer |
Also Published As
Publication number | Publication date |
---|---|
JPH0626254B2 (en) | 1994-04-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA1115857A (en) | Semiconductor absolute pressure transducer assembly and method | |
JPH0116030B2 (en) | ||
JPS59136977A (en) | Pressure sensitive semiconductor device and manufacture thereof | |
JPS63308390A (en) | Manufacture of semiconductor pressure sensor | |
US3848329A (en) | Method for producing a semiconductor strain sensitive element of an electromechanical semiconductor transducer | |
KR20080098990A (en) | Method for fabricating pressure sensor and structure of the same | |
JPH0554709B2 (en) | ||
JPH0779167B2 (en) | Integrated semiconductor pressure sensor | |
JP2876617B2 (en) | Semiconductor pressure sensor and method of manufacturing the same | |
JPH08248061A (en) | Acceleration sensor and manufacture thereof | |
JP2541184B2 (en) | Pressure-electricity converter manufacturing method | |
JP2003098025A (en) | Semiconductor sensor and its manufacturing method | |
JPS62266875A (en) | Semiconductor pressure sensor | |
JPH06260660A (en) | Semiconductor distortion sensor | |
JPH07105504B2 (en) | Semiconductor strain detector | |
KR950009638B1 (en) | Manufacturin method of semiconductor pressure sensor | |
JP2748077B2 (en) | Pressure sensor | |
JPH05126661A (en) | Semiconductor pressure sensor | |
CN114199428A (en) | Local thinning process method for MEMS inner cavity and application thereof | |
JPH01170054A (en) | Manufacture of semiconductor pressure sensor | |
JPS6376485A (en) | Manufacture of semiconductor device | |
JP2680471B2 (en) | Semiconductor pressure sensor and method of manufacturing the same | |
JPH0821774A (en) | Semiconductor pressure sensor and its manufacture | |
JPH0371676A (en) | Piezoelectric resistive element | |
CN111170263A (en) | Semiconductor device and method for manufacturing the same |