JPS63306692A - Multilayered printed board - Google Patents

Abstract

PURPOSE:To perform a ready-made multilayered printed wiring by a method wherein printed boards whose inside layer is wired with certain pattern are used as a semi-completed multilayered printed board. CONSTITUTION:The thin solid line indicates a circuit on the first layer, the thin broken line indicates circuit using a second layer by-pass wiring channel, the thick hatched line slanting in the left side direction indicates the 5th layer by-pass wiring channel, and the hatched thick line slanting in the right side direction indicates the 6th layer by-pass wiring channel. Although the first layer conductor channel disappears at the conduction hole 24, the circuit entering from the left direction is connected to the conduction hole 5 in the direction of right side via the second layer by-pass, appears on the first layer through a conduction hole 26 and connected to the channels is the longitudinal direction. Thus, many kinds of electric circuits are formed of printed wirings using ready- made multilayered printed boards.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to improvement of a multilayer printed circuit board by forming a predetermined wiring pattern on an inner layer in order to provide printed wiring for various electric circuits. It is.

(Prior art) Conventionally, wiring for electric circuits has been done by forming a wiring pattern corresponding to the electric circuit on a printed circuit board. This is done by increasing the number of wiring patterns between component connection lines or by creating multiple layers of wiring.

(Problems to be Solved by the Invention) However, when making a multilayer printed circuit board, it is necessary to manufacture the printed circuit board with different wiring patterns formed in advance for each PI electric circuit at least on the inner layer. Wiring using a multilayer printed circuit board inevitably has to be made to order, which not only increases production costs but also requires a considerable number of days to produce.

In addition, increasing the number of wiring patterns by 1012 means reducing the width, land diameter, and conduction hole diameter, which naturally imposes a limit in terms of yield.
Due to the cost performance limitations of both fine-line design, it is not possible to provide enough wiring channels to accommodate the miniaturization of mounted components, and as a result, many unconnected wires are left in automatic wiring design using a computer. There were drawbacks.

<Means for Solving the Problems> The present invention is a multilayer printed circuit board having a wiring pattern on an inner layer and an outer layer. This is a multilayer printed circuit board.

(Function) When performing printed wiring of an arbitrary electric circuit using a multilayer printed circuit board configured in this way, the standardized inner layer wiring pattern makes it possible to print wiring for any electrical circuit, even if the multilayer printed circuit board is produced in small quantities. If stock production is possible and printed wiring of any electrical circuit is possible: 1. By using the inner layer bypass wiring channel, you can freely print wiring using the outer layer wiring pattern. For example, switching between horizontal and vertical channels of multiple parallel wiring patterns such as pass lines can be done at the intersection of the basic lattice. This can be easily and freely done within the basic lattice without using conductive holes for component mounting.

(Object of the Invention) The present invention relates to a multilayer printed circuit board having wiring patterns on inner and outer layers, and in particular, to stock a printed circuit board with a predetermined pattern of wiring on the inner layer of the multilayer printed circuit board as a semi-finished multilayer printed circuit board. Another object of the present invention is to provide a multilayer printed circuit board on which various electrical circuits can be easily printed using this ready-made semi-finished multilayer printed circuit board.

(Embodiment) Next, the configuration of an embodiment of the present invention will be described with reference to FIGS. 1 to 9.

This example is a 6-layer printed circuit board, and as shown in FIG. 1, the first PA of the outer layer has electrical components, in this case, an IC (semiconductor integrated) circuit, with a basic grid of 254 distances between connection bins. Component connection lands 1 are formed at the intersections of the formed lattices, and conductor wiring channels 3.4 are formed between each component connection land 10 to connect three cross-body wiring channels 2 and each component connection land 1. A conductor wiring channel 5 connecting two conductor channels is formed, and at the selected intersection point of each conductor wiring channel 3, 4, an insulating hole (base-C) connecting with the second layer bypass wiring channel is formed. A hole (6) is formed from the body.

On the other hand, in the second inner layer of the multilayer printed circuit board of this embodiment, as shown in FIG. A bypass channel 7 and a vertical conductor bypass channel 8 are formed and are connected to the four-body wiring channel 2.3.4.5 of the first layer by the same via balls as in FIG. 16.

Further, as shown in FIG. 3, in the third inner layer of this multilayer printed board, power supply conductor channels 9 connected in the lateral direction are formed. Here 10 indicates a hole where a through hole for mounting components is provided, and the power supply conductor is insulated from the through hole 10 by a clearance 11.

The power supply conductor bunnels 9 in each row are insulated by a clearance 12 and leave traces that can be interpreted as different power supply voltage levels, but generally they are connected by an outer layer wiring pattern and connected to the OV ground layer. cover The circular part without a conductor is caused by an error in machining accuracy when drilling the small hole for connecting the fourth layer power conductor desennel and the sixth layer outer layer conductor channel described in 1 and 2. This is provided to avoid electrical short-circuiting with the conductor channels 9 of the layer.

In addition, as shown in FIG. 4, the fourth layer of this multilayer printed circuit board has power supply conductor channels 14 connected in the vertical direction.
is formed. Note that the reason why one conductor channel 14 is left with a blank part 15 is shown in the sixth section described later.
This is because a space was provided to prevent electrical short-circuiting with the conductor channel 14 when the printed pipe hole for connection with the third Fyj was provided from the layer side.

Further, as shown in FIG. 5, the fifth inner layer of this multi-purpose printed circuit board has a lateral conductor bypass channel 17,
A vertical conductor bypass channel 18 is formed, and a via hole 19 connects the conductor channel 1 of the sixth layer to be described later. connected to the channel. The conductor wiring channel width of the first layer and the second layer is typically 0.11. The width of the wiring conductor channels in the fifth and sixth layers is approximately 0.4.
It is set by width. This is to apply it to a circuit that requires low impedance of wiring channels in the fifth and sixth layers.

In addition, as shown in FIG. 6, the inner sixth layer of this multilayer printed circuit board includes a component mounting land 20, a horizontal wiring channel 21, a vertical wiring channel 22, and a fifth layer.
A via hole 23 is provided for electrical connection with j.

Next, the operation of this embodiment will be explained.

In FIG. 7, the thin solid line indicates the first layer circuit, and the thin broken line indicates the 21i! For the circuit using bypass wiring channel i, the thick line hatched downward to the left is the 5th bypass wiring channel, and the thick line hatched downward to the right is the 6th bypass wiring channel.
Layer bypass wiring? shows the channel. Note that data buses DO, 01 to D7 are connected from the left to the illustrated area.
A circuit is formed in which this bus travels straight to the right, and at the same time branches vertically. The fact that the wiring of three circuits in the first base lattice can be branched without interfering with each other going straight shows that the wiring density of the multilayer printed board of the example is high. To explain the branching effect for [)1, in the circuit entering from the left, the conductor channel in the first layer disappears at the conductive hole (hole that is conductive when viewed from the insulator) 24, but the circuit enters from the left side. It is connected to the conduction hole 25 through the two-layer bypass to the right, and it exits to the first layer through the conduction hole 26 and is connected to the vertical channel. Not hindering.

Figure 8 is a part of the electrical circuit diagram, and it shows a 14-bin DIL type I.
It consists of 2 Cs, 1 resistor, and 1 capacitor.

The operation of forming a circuit by mounting these four parts in the area shown in Fig. 7 will be explained with reference to Fig. 7.
．． 28.29 are inverter IC, 12.1 respectively
30, 31, and 32 of 3.14 pins are the 1.2.3 bins of the NOR gate IC, 33.34 are the capacitors,
35 and 36 indicate lands for mounting the resistor, and each land forms the circuit shown in FIG. 8 with the wiring channel of the sixth form shown by hatching.

The formation of the individual circuits is accomplished by selectively removing unnecessary portions of the conductor wiring channels in FIG. 1 and layer 6 using conventional techniques. Furthermore, to explain the effect that the 14 bins of the inverter IC are connected to the power supply layer and the capacitor/mounting land 34 is connected to the ground layer, they are connected to the power supply connection lands 37 and 38, respectively, and the lands 37 and 38 are connected to the land 37 and 38 according to the prior art. Blind via holes are provided and connected to the power layer and ground layer, respectively.

FIG. 9 shows the damaged surface of this multilayer printed board 50, from the vicinity of the power connection land on the A-/M inspection line in FIG. 7 to the intersection of the A-A- line and the B-8= line, - line and C-C-
It shows the intersection of the lines and also the breaching surface near the power connection land on the C-C- line. In the same figure, 39 is a blind via hole that accesses from the 6th layer to the 3rd layer power layer.
40 is a conduction hole connecting the 5n and 6th layers, 41 is a through hole for mounting components and connecting the 1st layer and the 6th layer, 42 is a land for mounting components without a through hole, 43 is a blind via hole that accesses the power supply layer from the sixth layer to the fifth layer.

Blind via holes 39 and 43 are formed by drilling using conventional techniques and electroless plating the walls. The hatched areas in the figure are insulators.

(Effects of the Invention) The present invention is a multilayer printed circuit board having a wiring pattern on an inner layer and an outer layer. This is a multilayer printed circuit board in which vertical wiring patterns and horizontal wiring patterns are formed alternately.

As a result, the present invention makes it possible to stock printed circuit boards with wiring in a predetermined pattern on the inner layer of the multilayer printed circuit board as semi-finished multi-layer printed circuit boards, and to use these ready-made semi-finished multi-layer printed circuit boards to conduct various electrical circuits. By performing the printed wiring, it is possible to reduce the labor required for manufacturing the multilayer printed circuit board, significantly shorten the manufacturing time, and significantly reduce the manufacturing cost of the multilayer printed circuit board.

[Brief explanation of the drawing]

FIG. 1 shows the outer layer (
"9" shows the printed state of the conductor wiring channel of the first layer)
Explanatory drawings, FIGS. 2, 3, and 4. FIG. 5 is an explanatory diagram showing the printed state of the conductor wiring channels of the second, third, and fourth inner layers of the multilayer printed circuit board, and FIG.
Fig. 7 is an explanatory diagram showing the printed wiring state with a specific wiring pattern formed, and Fig. 8 is an explanatory diagram showing the printed wiring state of the conductor wiring channel of the 6th layer). A specific electric circuit diagram, FIG. 9, is an explanatory diagram showing a suitably broken state of the multilayer printed circuit board. 2 to 5...Wiring pattern 50...Multilayer printed circuit board Applicant: Kuwana Giken Co., Ltd. Agent Patent attorney: Hidehiko Okada (2 others) Figure 1 Figure 2

Claims (4)

[Claims] (1) A multilayer printed circuit board having a wiring pattern on an inner layer and an outer layer, at least on the inner layer, a certain basic wiring pattern is repeated in a certain basic grid in the vertical and horizontal directions,
Each of the wiring patterns on the inner layer is connected to the wiring pattern on the outer body through a conductive hole, and the wiring pattern on the inner layer functions as a bypass wiring channel when crossing circuits that are not electrically connected. multilayer printed circuit board. (2) The multilayer printed circuit board according to claim 1, wherein the frame size of the board grid is a multiple of the dimension between connecting pins of electrical components mounted on the multilayer printed circuit board. (3) The multilayer printed circuit board according to claim 2, wherein the electrical component is a semiconductor integrated circuit component having a plurality of connection terminals with standardized dimensions. (4) The conductor wiring channel in the outer layer is formed of a standardized pattern that repeats in a constant basic pattern in the vertical and horizontal directions in a constant basic grid, and is a part of the wiring pattern that is later selectively standardized. 2. The multilayer printed circuit board according to claim 1, wherein a final required wiring pattern is obtained by removing the printed circuit board.