JPS63305544A - Method of forming diffused resistor - Google Patents
Method of forming diffused resistorInfo
- Publication number
- JPS63305544A JPS63305544A JP62139876A JP13987687A JPS63305544A JP S63305544 A JPS63305544 A JP S63305544A JP 62139876 A JP62139876 A JP 62139876A JP 13987687 A JP13987687 A JP 13987687A JP S63305544 A JPS63305544 A JP S63305544A
- Authority
- JP
- Japan
- Prior art keywords
- diffused
- layer
- resistance
- oxide film
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 239000004065 semiconductor Substances 0.000 claims abstract description 10
- 239000012535 impurity Substances 0.000 claims abstract description 9
- 238000009792 diffusion process Methods 0.000 claims description 16
- 150000002500 ions Chemical class 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
- -1 phosphorus ions Chemical class 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0802—Resistors only
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体基板に高抵抗、高精度の拡散抵抗を
形成する拡散抵抗の形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for forming a diffused resistor with high resistance and high precision on a semiconductor substrate.
第３図は従来の方法による拡散抵抗の構造の一例を示す
。FIG. 3 shows an example of the structure of a diffused resistor according to the conventional method.
図において１はｎ−半導体基板、２はｐ拡散抵抗層、３
は酸化膜、４は電極である。In the figure, 1 is an n-semiconductor substrate, 2 is a p-diffused resistance layer, and 3
is an oxide film, and 4 is an electrode.
従来の拡散抵抗は、半導体基板１に不純物拡散によって
基板１と異極の拡散抵抗層２を形成したものである。A conventional diffused resistor is one in which a diffused resistor layer 2 having a different polarity from the substrate 1 is formed in a semiconductor substrate 1 by impurity diffusion.
従来の方法による拡散抵抗では、基板１の不純物濃度の
ばらつきが大きいために、高抵抗層をイオン注入技術で
形成する場合、抵抗層と基板１の濃度差を均一にできず
、高精度のものが得られないという問題があった。With conventional diffused resistors, the impurity concentration in the substrate 1 has large variations, so when forming a high resistance layer using ion implantation technology, it is not possible to make the concentration difference between the resistance layer and the substrate 1 uniform, making it difficult to create a high-precision one. The problem was that it was not possible to obtain
この発明は上記の問題を解消するためになされたもので
、高精度で高抵抗の拡散抵抗を得ることを目的とする。This invention was made to solve the above problems, and its purpose is to obtain a highly accurate and high resistance diffused resistor.
この発明の方法は、まず、半導体基板に該基板と同極ま
たは異極の不純物が均一に拡散した安定拡散層を形成し
、該安定拡散層の中に該拡散層と異極の不純物が均一に
拡散した高抵抗、高精度の拡散抵抗層を形成するもので
ある。In the method of the present invention, first, a stable diffusion layer is formed in a semiconductor substrate in which an impurity having the same polarity or a different polarity as that of the substrate is uniformly diffused, and in the stable diffusion layer, an impurity having a different polarity than that of the diffusion layer is uniformly diffused. This method forms a high-resistance, high-precision diffused resistance layer.
〔発明の実施例〕。[Embodiments of the invention].
第１図はこの発明の方法による拡散抵抗の構造の一例を
示す。FIG. 1 shows an example of the structure of a diffused resistor according to the method of the present invention.
図において１．２，３．４は第３図の同一符号と同一ま
たは相当する部分を示し、１ａはｎ−基板１に不純物拡
散によって形成したｎ拡散層である。In the figure, 1.2 and 3.4 indicate the same or corresponding parts as the same reference numerals in FIG. 3, and 1a is an n-diffusion layer formed in the n-substrate 1 by impurity diffusion.
以下、形成の手順を説明する。The formation procedure will be explained below.
まず、比抵抗２〜３Ｑｃｒｎ程度のＮ型シリコン基板を
水蒸気中１１００℃程度で加熱し１００ＯＸ以上の酸化
膜を成長させ、この酸化膜をマスクとして拡散抵抗層を
含む該抵抗層の領域より広い領域の酸化膜を除去して、
ｐイオンを注入して拡散し、ｎ拡散層１ａを形成する。First, an N-type silicon substrate with a specific resistance of about 2 to 3 Qcrn is heated in water vapor at about 1100°C to grow an oxide film of 100OX or more, and this oxide film is used as a mask to cover an area wider than the area of the resistance layer including the diffused resistance layer. By removing the oxide film of
P ions are implanted and diffused to form an n diffusion layer 1a.
次に、ｎ拡散層１ａの中に同様の手順を経てボロン（Ｂ
）イオンを注入してアニールし、ｐ拡散抵抗層２を形成
し、基板表面の酸化膜３にコンタクト穴を開けてメタル
電極４を形成し、ｐ拡散抵抗層２にオーミック接続させ
る。Next, boron (B) is added to the n-diffusion layer 1a through the same procedure.
) A p-diffusion resistance layer 2 is formed by implanting ions and annealing, and a contact hole is formed in the oxide film 3 on the surface of the substrate to form a metal electrode 4 to make an ohmic connection to the p-diffusion resistance layer 2.
この方法によると、ｐ拡散抵抗層２は、濃度の均一なｎ
拡散層１ａの中にイオン注入の技術で形成するので、濃
度を一定に設定することが可能で、精度の高い高抵抗の
ものが得られる。According to this method, the p-diffused resistance layer 2 has a uniform n-concentration.
Since it is formed in the diffusion layer 1a using ion implantation technology, it is possible to set the concentration constant, and a highly accurate and high resistance layer can be obtained.
第１図に示すものは、ｎ−半導体基板に同極のｎ拡散層
１ａを形成し、ｎ拡散層１ａの中にｐ拡散抵抗層２を形
成した例であるが、第２図に示すように、ｎ−半導体基
板に異極のｐ拡散層１ｂを形成し、このｐ拡散層１ｂの
中にｎ拡散抵抗層２ａを形成する方法によっても、同様
の効果が得られる。What is shown in FIG. 1 is an example in which an n-diffused layer 1a of the same polarity is formed on an n-semiconductor substrate, and a p-diffused resistance layer 2 is formed in the n-diffused layer 1a. Similar effects can also be obtained by forming a p-diffusion layer 1b of different polarity on an n-semiconductor substrate and forming an n-diffusion resistance layer 2a in this p-diffusion layer 1b.
この発明の方法によれば、高抵抗が得られるので、シー
ト抵抗値を高く設定でき、設計のディメンションを小さ
くできる。According to the method of the present invention, high resistance can be obtained, so the sheet resistance value can be set high and the design dimension can be reduced.
従来の方法では５にΩ／口位が限界であったが、この発
明の方法では５０にΩ／口位まで可能である。In the conventional method, the limit was 5 ohms/original, but with the method of the present invention, it is possible to achieve up to 50 ohms/original.
この発明のプロセスは、ＭＯＳプロセス等の中に簡単に
導入できるため、コスト面で余分な負担がかかることが
ない。The process of the present invention can be easily introduced into a MOS process, etc., so there is no extra cost burden.
この発明によれば、精度の高′い高抵抗が得られ、シー
ト抵抗値を高く設定でき、設計のディメンションを小さ
くできるという効果がある。According to the present invention, it is possible to obtain a high resistance with high accuracy, to set a high sheet resistance value, and to reduce the design dimension.
第１図、第２図はそれぞれこの発明の方法による拡散抵
抗の構造の例を示す断面図、第３図は従来の方法による
拡散抵抗の構造を示す断面図である。
１・・・ｎ−半導体基板、１ａ・・・ｎ拡散層、１ｂ・
・・ｐ拡散層、２・・・ｐ拡散抵抗層、２ａ・・・ｎ拡
散抵抗層、３・・・酸化膜、４・・・電極。
なお図中同一符号は同一または相当する部分を示す。
特許出願人 新日本無線株式会社
第１ｒ！Ａ
゛（１
第２図
第３図FIGS. 1 and 2 are cross-sectional views showing an example of the structure of a diffused resistor according to the method of the present invention, and FIG. 3 is a cross-sectional view showing the structure of a diffused resistor according to the conventional method. 1...n-semiconductor substrate, 1a...n diffusion layer, 1b...
...p diffused layer, 2...p diffused resistance layer, 2a...n diffused resistance layer, 3...oxide film, 4...electrode. Note that the same reference numerals in the figures indicate the same or corresponding parts. Patent applicant New Japan Radio Co., Ltd. 1r! A ゛(1 Figure 2 Figure 3
Claims (1)
抵抗の形成方法において、半導体基板に該基板と同極ま
たは異極の不純物が均一に拡散した拡散層を形成し、該
拡散層の中に該拡散層と異極の不純物が均一に拡散した
高抵抗、高精度の拡散抵抗層を形成することを特徴とす
る拡散抵抗の形成方法。In a method for forming a diffused resistor in which a high-resistance, high-precision diffused resistor is formed in a semiconductor substrate, a diffusion layer in which impurities of the same polarity or a different polarity as the substrate are uniformly diffused is formed in the semiconductor substrate, and A method for forming a diffused resistor, which comprises forming a high-resistance, high-precision diffused resistor layer in which impurities having a different polarity from the diffused layer are uniformly diffused.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62139876A JPS63305544A (en) | 1987-06-05 | 1987-06-05 | Method of forming diffused resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62139876A JPS63305544A (en) | 1987-06-05 | 1987-06-05 | Method of forming diffused resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63305544A true JPS63305544A (en) | 1988-12-13 |
Family
ID=15255625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62139876A Pending JPS63305544A (en) | 1987-06-05 | 1987-06-05 | Method of forming diffused resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63305544A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011176009A (en) * | 2010-02-23 | 2011-09-08 | Toshiba Corp | Semiconductor device |
| US8384137B2 (en) | 2010-02-23 | 2013-02-26 | Kabushiki Kaisha Toshiba | Semiconductor device |
-
1987
- 1987-06-05 JP JP62139876A patent/JPS63305544A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011176009A (en) * | 2010-02-23 | 2011-09-08 | Toshiba Corp | Semiconductor device |
| US8384137B2 (en) | 2010-02-23 | 2013-02-26 | Kabushiki Kaisha Toshiba | Semiconductor device |
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