JPS63304692A - Manufacture of printed-wiring board - Google Patents
Manufacture of printed-wiring boardInfo
- Publication number
- JPS63304692A JPS63304692A JP14024287A JP14024287A JPS63304692A JP S63304692 A JPS63304692 A JP S63304692A JP 14024287 A JP14024287 A JP 14024287A JP 14024287 A JP14024287 A JP 14024287A JP S63304692 A JPS63304692 A JP S63304692A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- substrate
- bonding agent
- powder
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 229910000679 solder Inorganic materials 0.000 claims abstract description 20
- 239000000843 powder Substances 0.000 claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000000853 adhesive Substances 0.000 claims description 8
- 230000001070 adhesive effect Effects 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000002844 melting Methods 0.000 claims description 2
- 230000008018 melting Effects 0.000 claims description 2
- 239000000758 substrate Substances 0.000 abstract description 11
- 239000002994 raw material Substances 0.000 abstract description 4
- 229920001187 thermosetting polymer Polymers 0.000 abstract description 3
- 238000007747 plating Methods 0.000 abstract description 2
- 238000007639 printing Methods 0.000 abstract description 2
- 239000007767 bonding agent Substances 0.000 abstract 5
- 230000002860 competitive effect Effects 0.000 abstract 1
- 238000007598 dipping method Methods 0.000 abstract 1
- 239000000654 additive Substances 0.000 description 3
- 230000000996 additive effect Effects 0.000 description 3
- 238000005476 soldering Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000007649 pad printing Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント配線板の製造方法に関する0〔従来
の技術〕
従来、この種の製造方法としては銅張積層板を使用し、
回路以外の部分全エツチングにより除去するサブトラッ
クティブ法、絶縁積層板の上に直接回路部のみに銅を形
成するフルアディティブ法、回路を上述のサブトラック
ティプ法で作勺孔壁とランド部を上述のフルアディティ
ブ法で作るパーシャルアディティブ法が知られている。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board. [Prior Art] Conventionally, this type of manufacturing method uses a copper-clad laminate,
The subtrack method involves etching all parts other than the circuit, the full additive method involves forming copper only on the circuit directly on the insulating laminate, and the subtrack tip method described above is used to form the circuit by removing the hole walls and lands. A partial additive method, which is created using the above-mentioned full additive method, is known.
上述した従来の製造方法はいずれの方法も工程が複雑で
工数がかかり、また原材料も高画格なものが多く、製造
コストが高くなるとい9問題点があった。All of the above-mentioned conventional manufacturing methods have nine problems: the steps are complicated and require a lot of man-hours, and many of the raw materials are of high quality, resulting in high manufacturing costs.
不発明のプリント配線板の製造方法は、絶縁基材の表面
に接着剤パターン部全形成する工程と、前記基材に半田
の微粉末をまぶして前記パターン部に付着させる工程と
、前記半田微分末を過熱し溶融させて前記接着剤パター
ン部に半田導電回路全形成する工程とを含むこと全特徴
とする。The uninvented printed wiring board manufacturing method includes a step of forming an entire adhesive pattern on the surface of an insulating base material, a step of sprinkling fine powder of solder on the base material and adhering it to the pattern part, and a step of dispersing the solder. The present invention is characterized in that it includes a step of heating and melting the solder powder to completely form a solder conductive circuit on the adhesive pattern portion.
次に、本発明について図面全参照して説明する。 Next, the present invention will be explained with reference to all the drawings.
まず、第1図(5)に示すような絶縁基板1(例えば、
フェノール樹脂紙基板)に孔あけ加工し、次に回路を印
刷する。この時、印刷インキの代りに熱硬化性の接着剤
3を使用する(第1図(B))。孔壁2の部分にも接着
剤を塗布しておく。次に半田微粉末4をまぶしく第1図
(C) ) 、余分な部分は圧縮エアーで吹きとばす(
第1図u)l)。印刷した回路部分にのみ半田微粉末が
付着する。次に非酸化性の雰囲気中で過熱し、接着剤を
硬化させると共に半田を溶融させる(第1図(匂)。First, an insulating substrate 1 (for example,
Holes are drilled into the phenolic resin paper substrate), and then the circuit is printed. At this time, a thermosetting adhesive 3 is used instead of printing ink (FIG. 1(B)). Adhesive is also applied to the hole wall 2. Next, apply fine solder powder 4 (Figure 1 (C)) and blow off the excess with compressed air (
Figure 1 u)l). Fine solder powder adheres only to the printed circuit area. Next, it is heated in a non-oxidizing atmosphere to harden the adhesive and melt the solder (see Figure 1 (smell)).
もし、牛用皮膜が薄かったり、回路の線径が細い場合V
Cは、ソルダーマシーンで半田ディラグして補強する(
第1図(ハ)。If the cow skin is thin or the wire diameter of the circuit is small, V
C is reinforced by soldering with a solder machine (
Figure 1 (c).
以上説明したように不発明は、
■ 絶縁基板は半田温度に耐えれば何でも使用できる(
例えばセラミック、一般の積層板、耐高温樹脂など)。As explained above, the inventiveness is that ■ Any insulating substrate can be used as long as it can withstand the soldering temperature (
(e.g. ceramics, general laminates, high temperature resistant resins, etc.).
■ 片面のみならず両面も可能である。■ Not only one side but also both sides are possible.
■ タンポ印刷などをすれば筐体などにも可能である。■ If you use pad printing, it can also be used on housings, etc.
■ 原材料費が安い。■ Low raw material costs.
■ めっきなどの湿式処理工程がないので低コスト化が
可能である。■ Cost reduction is possible because there is no wet processing process such as plating.
などの特徴がちう、コスト競争力が非常にある製造方法
である。It is a highly cost-competitive manufacturing method with the following characteristics.
特に家電製品、キーボードなどの低価格プリント配線板
の製造に向いている。It is particularly suitable for manufacturing low-cost printed wiring boards for home appliances, keyboards, etc.
第1図四〜(乃は本発明の一実施例を示す斜視図である
。
1・・・・・・絶縁基板、2・・・・・・孔、3・・・
・・・熱硬化性接りハへ
く m 。FIG. 1 is a perspective view showing an embodiment of the present invention. 1... Insulating substrate, 2... Hole, 3...
...Thermosetting adhesive.
Claims (1)
前記基材に半田の微粉末をまぶして前記パターン部に付
着させる工程と、前記半田微粉末を過熱し溶融させて前
記接着剤パターン部に半田導電回路を形成する工程とを
含むことを特徴とするプリント配線板の製造方法。forming an adhesive pattern on the surface of the insulating base material;
The method includes the steps of sprinkling fine solder powder on the base material and adhering it to the pattern portion, and heating and melting the fine solder powder to form a solder conductive circuit on the adhesive pattern portion. A method for manufacturing a printed wiring board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14024287A JPS63304692A (en) | 1987-06-03 | 1987-06-03 | Manufacture of printed-wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14024287A JPS63304692A (en) | 1987-06-03 | 1987-06-03 | Manufacture of printed-wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63304692A true JPS63304692A (en) | 1988-12-12 |
Family
ID=15264216
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14024287A Pending JPS63304692A (en) | 1987-06-03 | 1987-06-03 | Manufacture of printed-wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63304692A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0414363A2 (en) * | 1989-08-21 | 1991-02-27 | Hewlett-Packard Company | Method for applying a conductive trace pattern to a substance |
DE10145749A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a structured metal layer on a carrier body and carrier body with a structured metal layer |
-
1987
- 1987-06-03 JP JP14024287A patent/JPS63304692A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0414363A2 (en) * | 1989-08-21 | 1991-02-27 | Hewlett-Packard Company | Method for applying a conductive trace pattern to a substance |
DE10145749A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a structured metal layer on a carrier body and carrier body with a structured metal layer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS63304692A (en) | Manufacture of printed-wiring board | |
JP2717200B2 (en) | Method of forming overlay plating on electronic component mounting substrate | |
JP3715337B2 (en) | How to create an electrical circuit | |
JPH08228066A (en) | Electronic-part loading substrate and manufacture thereof | |
JPS5815957B2 (en) | Manufacturing method of printed wiring board with contacts | |
JP2682118B2 (en) | Manufacturing method of printed wiring board | |
JPH0410753B2 (en) | ||
JPH0224395B2 (en) | ||
JPS6031116B2 (en) | Electric wiring circuit board and its manufacturing method | |
JPS6235595A (en) | Manufacture of transfer sheet | |
JPH01130585A (en) | Manufacture of flexible wiring board formed in a unified body with reinforcing sheet | |
JP2591106B2 (en) | Manufacturing method of printed wiring board | |
JPS588600B2 (en) | Ryomen Print High Senban no Seizouhouhou | |
JPH06338670A (en) | Printed wiring board | |
JPH01228195A (en) | Manufacture of circuit board | |
JPH03255691A (en) | Printed wiring board | |
JPS58115886A (en) | Method of producing printed circuit board | |
JPH04360596A (en) | Manufacture of circuit board | |
JPS62102589A (en) | Manufacture of double-sided connection type flexible printedcircuit substrate | |
JPS5877292A (en) | Method of producing printed circuit board | |
JPH11251710A (en) | Mounting substrate and method for mounting circuit parts using the same | |
JPH06326460A (en) | Manufacture of printed wiring board | |
JPS59232491A (en) | Method of producing multilayer printed circuit board | |
JPH0453292A (en) | Printed wiring board | |
JPH0851262A (en) | Printed wiring board and its manufacturing method |