JPS63298040A - Defect data fetching circuit - Google Patents

Abstract

PURPOSE:To correct the adjustment deviation of the optical system of a defect detector by providing a shift circuit for a start pulse for resetting a counter to an X-coordinate counter for defect data when ORing defect data of plural scans. CONSTITUTION:The defect detector scans a transparent plate which runs lengthwise with a light spot in the breadthwise direction and detects and outputs the kind, size, position, etc., of a defect to a defect data fetching circuit 40. When the defect data are inputted, an X-axial counter 42 outputs it counted value as X-coordinate position data and a Y-axial counter 14 outputs its counted value as Y-coordinate position data. Further, an X-axial subcounter 41 outputs pulses shifted according to a set offset value to the counter 42 to correct its count start position. An OR unit 12 ORs data of plural scans accumulatively and outputs the result to an FIFO memory 15. Thus, even if the address of a center position shifts, the shift can be corrected by adjusting the optical system of the defect detector.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a defect data acquisition circuit of a defect detection device, particularly for detecting the type of defect, the size of the defect, and the position of the defect in a transparent plate such as a glass plate. The present invention relates to a defect data acquisition circuit for an identification type defect detection device capable of detecting defects.

[Conventional technology]

When manufacturing transparent plates such as glass plates, the flying spot type is used as a device to detect the type of defects (foreign objects, bubbles, edges, drips, etc.), size, and position of defects that exist on the transparent plate. There is an identification type defect detection device.

FIG. 3 schematically shows an example of an identification type defect detection device developed by the present applicant. This identification type defect detection device makes a laser beam from a laser beam source enter a polygonal rotating mirror 2, and scans a laser spot on a glass plate 3 flowing through a manufacturing process line. The scanning direction is a direction perpendicular to the direction in which the glass plate flows (Y-axis direction), that is, the width direction of the glass plate (
(X-axis direction). Further, the laser beam is incident on the surface of the glass plate 3 obliquely. This is to avoid interference between the light reflected from the front surface of the glass plate and the light reflected from the back surface of the glass plate.

Transmitted light and transmitted scattered light 2 of the laser beam incident on the glass plate 3
The reflected light is transmitted to light receivers DI, D2. D3. D4. Receive light at D5. In addition,
Each of these light receivers is constructed by arranging a large number of glass fibers. The light receiver D1 receives transmitted light, the light receiver D2 receives paraxial transmitted scattered light, the light receivers D3 and D4 receive far axis transmitted scattered light, and the light receiver D5 receives reflected light. The glass fibers constituting each photoreceiver are connected to one corresponding photomultiplier tube PMI, PM2. PM3. PM4. The light guided and received by the PM5 is converted into an electrical signal by each photomultiplier tube. The signal processing circuit 4 performs signal processing such as differential processing, width processing, comparison processing, and waveform shaping on these electrical signals to generate defect data DII+DI! ,...l I) Create sz. There are multiple types of defect data. For example, defect data D11 is obtained by comparing the differential waveform obtained by negatively differentiating the electric signal obtained by photoelectrically converting the transmitted light received by the light receiver D1 with a predetermined detection level. This data shows the comparison results.

For convenience of the following explanation, the configuration up to the signal processing circuit 4 is assumed to be the defect detector 5. The defect data from the defect detector 5 is captured by a defect data capture circuit 6, subjected to signal processing, and then sent to a central processing unit (CPU) 7. The CPU 7 creates a defect pattern from the defect data and compares it with a pre-held defect identification pattern table to determine the type, size, etc. of the defect.

The present invention relates to an improvement of the defect data acquisition circuit in such an identification-type defect detection device, but the present invention is not intended only for the above-mentioned identification-type defect detection device, but also applies to flying spot type defect detection devices. If so, any type of identification type defect detection device can be targeted. Further, reflected and scattered light may be further added to the light for detecting a change in light amount.

The applicant has already proposed a circuit having the configuration shown in FIG. 4 for such a defective data acquisition circuit.

This previously proposed defect data acquisition circuit 10 includes an X-axis counter 11, an OR unit 12, a frequency dividing circuit 13, a Y-axis counter 14, and a FIFO memory 15.

The X-axis counter 11 uses a clock CL for X-coordinate division.
This is a counter that counts K, and is reset by a start pulse ST that is a scan start signal. This start pulse ST is obtained by extracting the laser beam reflected by the polygonal rotating mirror 2 of the defect detector 5 with a glass fiber at a specific position, photoelectrically converting it, and shaping the waveform. X-axis counter 1
1 outputs the count value when the defect data is taken in as X coordinate position data.

The OR unit 12 is a unit that stores defect data for multiple scans from the defect detector 5 and outputs it at a predetermined timing. ” is disclosed. The purpose of this OR unit 12 is to increase the processing capacity of the identification type defect detection apparatus in relation to the processing speed of the CPU 7.

The frequency dividing circuit 13 divides the frequency of the line synchronization signal PC corresponding to the moving distance of the glass plate in the line direction and inputs the result to the OR unit 12 . The OR unit 12 outputs the accumulated defect data at the timing of the frequency-divided line synchronization signal PG.

The Y-axis counter 14 counts the frequency-divided line synchronization signal PC from the frequency dividing circuit 13, and when defect data is input,
FIFO memory 1 uses count value as Y coordinate position data
Output to 5. Note that the Y-axis counter 14 is reset by software.

The FIFO memory 15 temporarily stores X-coordinate position data from the X-axis counter 11, defect data from the OR unit 12, and Y-coordinate position data from the Y-axis counter 14.

Then, the defect data and defect position data (X, Y) are transferred from the FIFO memory 15 through direct memory access (
DMA) to the memory of the CPU 7.

FIG. 5 shows an example of the OR unit 12. This OR Uni 71-12 has multiple types of defect data DII+D
I! +..., D, 2 corresponding to each, OR circuit 0R11, OR+2. ..., 0Rsz, random access memory RAMz, RAM+z, ...
, RAM5g and gate circuit G++, G+□,...
It is composed of G and 2.

6 and 7 are diagrams to help understand the operation of the OR unit 12, and FIG. 6 shows the relationship between scanning by the laser spot, the clock CLK, and the line synchronization signal PG after frequency division. The schematic diagram, FIG. 7, shows RAM1. of the OR unit. FIG. 6 is a diagram showing a state in which defect data D11 is stored in the computer. The operation of storing defect data DI+ in the OR unit 12 as an example will be described with reference to these drawings. It is assumed that the glass plate is scanned n times in the X-axis direction by the laser spot during the frequency-divided line synchronization signal PC. Further, it is assumed that each RAM of the OR unit 12 has addresses up to 1000. The address of each RAM corresponds to the number of clocks CLK is.

Now, when the glass plate 3 has a defect 25 as shown in FIG. 6, the defect data DII input from the defect detector 5 in the first scan is written to RAM r + and stored at addresses 502 and 503. Bit “1” is set. The defect data D11 input in the second scan is combined with the defect data read out from the RAM in the OR circuit 0R11.
After R is taken, it is rewritten to RAM + +,
...The defect data D input at the nth scan is
Defect data read from RAM, , and OR circuit 0
After the OR is performed in R11, it is rewritten to RAM + r, and finally from address 501 to 50
Bit “1” is stored at address 4. In this way R
The defect data D stored in A M r + is outputted to the FIFO memory 15 via the gate circuits G and 1 at the timing of the line synchronization signal PC frequency-divided by the frequency divider circuit 13.

In a flying spot type defect detection device having a defect data acquisition circuit configured as described above, the spot is reflected by a polygonal rotating mirror and scans the glass plate, and the scanning speed of each spot is not constant. FIG. 8 is a diagram for explaining this situation, and shows the scanning state of the laser spot on the glass plate surface. The laser beam 50 reflected by the polygonal rotating mirror 2 scans at a constant speed on a virtual arc 51 centering on the rotational axis of the polygonal rotating mirror, and on the surface of the glass plate 3, it reaches the edge of the glass plate. The faster the scanning speed becomes.

The clock CLK for X-axis coordinate division is based on the virtual arc 51
, and the actual positions in the X-axis direction on the surface of the glass plate 3 corresponding to the X-axis addresses based on the clock CLK are not equally divided. Therefore, the CPU included in the defect detection device has a conversion table for associating the position information of the X-axis address outputted from the defect data acquisition circuit with the actual position on the surface of the glass plate. The conversion table recognizes that the center position of the scanning line corresponds to a fixed address. For example, if one scan in the X-axis direction has 1000 addresses as shown in FIG. 8, the center position of the scanning line is recognized to be address 500. Therefore, when adjusting the optical system of the defect detection device, for example, the center position is
For example, if a shift occurs to address 502, the conversion table, that is, the entire CPU software must be recreated, which is a problem inherent in the flying spot type defect detection apparatus.

SUMMARY OF THE INVENTION An object of the present invention is to provide a fault data acquisition circuit that can handle a shift in the address of the center position of a scanning line using hardware without modifying the CPU software.

[Structure of the invention]

The present invention scans a transparent plate running in the length direction with a light spot in the width direction, and based on the combination of light intensity changes of transmitted light, transmitted scattered light, 1 reflected light, 2 reflected scattered lights, In a defect data acquisition circuit of an identification type defect detection device that detects the type, size, position, etc. of a defect, the first pulse train related to the position in the width direction of the transparent plate is counted, and the defect data is acquired. a first counter that outputs a count value at a time, a shift circuit that can shift a start pulse that resets the first counter, and a second pulse train that is related to the position of the transparent plate in the longitudinal direction. a second counter that counts and outputs a counted value when defect data is taken in; and a second counter that stores and OR-processes defect data for multiple scans;
The present invention is characterized by comprising an OR unit that outputs processed defect data at the pulse generation timing of the second pulse train.

〔Example〕

The present invention will be explained in detail below.

FIG. 1 is a block diagram showing one embodiment of the present invention.

This defect data acquisition circuit is obtained by replacing the X-axis counter 11 with an X-axis sub counter 41 and an X-axis main counter 42 in the defect data acquisition circuit shown in FIG. The X-axis main counter 42 has the same function as the conventional X-axis counter 11. The X-axis subcounter 41 has a function of substantially shifting the start pulse ST, and the offset value can be set using software. This X-axis subcounter calculates a predetermined number of clocks CL based on the set offset value.
After counting K, the shifted pulse is output to the X-axis main counter 42. The X-axis main counter 42 starts counting the clock CLK using the shifted pulse from the X-axis sub-counter 41 as a start pulse.

The operations of these counters will be specifically explained with reference to FIG. Figure 2 shows start pulse ST and clock CLK.
The X-axis coordinate address is 1ooo
It is assumed that there is even a street address. Now, it is assumed that the address of the center position shifts to address 502 as shown in FIG. 2(b) at the actual generation timing of the start pulse ST shown in FIG. 2(a). In such a case, in order to return the center position address to address 500, "-2" is set as the offset value in the X-axis subcounter 41. As a result, the X-axis subcounter 41 receives the clock CL.
K is counted and a pulse delayed (shifted) by two clocks is output as shown in FIG. 2(C). When the X-axis main counter 42 receives this shifted pulse from the X-axis sub counter 41, it starts counting clock pulses CLK using this pulse as a start pulse. Since this count start address is shifted by two clocks compared to the case of FIG. 2(b), the address address of the center position is address 500.

〔Effect of the invention〕

As explained above, the defect data acquisition circuit of the present invention has the function of shifting the X-coordinate count start address from the actual start pulse position. Even if the address of the center position shifts due to adjustments, etc., there is no need to rebuild the CPU software.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the start pulse shift operation in the embodiment of FIG. 1, and FIG. 3 is an identification type defect detection device. 4 is a block diagram illustrating a previously proposed defect data acquisition circuit; 5 is a block diagram illustrating an example of the OR unit in FIG. 4; FIGS. 6 and 7 are , a diagram for explaining the operation of the OR unit, and FIG. 8 is a diagram for explaining the state of scanning by a laser spot. 1... Laser light source 2... Polygonal rotating mirror 3... Glass plate 4... Signal processing circuit 5... Defect detector 6 , 10.40...Fault data acquisition circuit 7...
, CPU 11... X-axis counter I2... OR unit 13... Frequency division circuit 14... Y-axis counter

Claims (1)

[Claims] (1) A transparent plate running in the length direction is scanned with a light spot in the width direction, and defects are detected based on the combination of light intensity changes of transmitted light, transmitted scattered light, reflected light, and reflected scattered light. In a defect data acquisition circuit of an identification type defect detection device that detects the type, size, position, etc. of a first counter that outputs a count value of , a shift circuit that can shift a start pulse that resets the first counter, and a second pulse train that counts a second pulse train related to the position in the length direction of the transparent plate. and a second counter that outputs a count value when defect data is taken in; and a second counter that stores and OR-processes defect data for multiple scans, and calculates the processed defect data at the pulse generation timing of the second pulse train. A defective data acquisition circuit characterized by comprising an OR unit that outputs data.