JPH087164B2 - Defect data acquisition circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention detects the type of defect, the size of the defect and the position of the defect of a defect data capturing circuit of a defect detection device, particularly a transparent plate such as a glass plate. The present invention relates to a defect data acquisition circuit of an identification type defect detection device capable of performing the above.

[Conventional technology]

When manufacturing a transparent plate such as a glass plate, the types of defects (defects) present in the transparent plate (foreign matter, bubbles, humps, drip etc.),
As a device for detecting the size of the defect and the position of the defect, there is a flying spot type identification type defect detection device.

An outline of an example of the identification type defect detection device developed by the present applicant is shown in FIG. In this identification type defect detection device, a laser beam from a laser light source 1 is incident on a polygonal rotary mirror 2 to scan a laser spot on a glass plate 3 flowing through a manufacturing process line. The scanning direction is a direction perpendicular to the flowing direction of the glass plate (Y-axis direction), that is, the width direction of the glass plate (X-axis direction). The laser light is obliquely incident on the surface of the glass plate 3. This is to avoid interference between the light reflected from the front surface of the glass plate and the light reflected from the back surface of the glass plate.

The transmitted light, the transmitted scattered light, and the reflected light of the laser light incident on the glass plate 3 are received by the light receivers D1, D2, D3, D4, D5 having a light receiving surface elongated in the width direction of the glass plate. Each of these light receivers is configured by arranging a large number of glass fibers. The light receiver D1 receives the transmitted light, the light receiver D2 receives the paraxial transmitted scattered light, the light receivers D3 and D4 receive the far axial transmitted scattered light, and the light receiver D5 receives the reflected light. The glass fibers that make up each photoreceiver are the corresponding photomultiplier tubes PM1, PM2, PM3, PM4, PM.
The light guided to 5 and received is converted into an electric signal by each photomultiplier tube. In the signal processing circuit 4, signal processing such as differentiation processing, width processing, comparison processing, and waveform shaping is applied to these electric signals to create defect data D ₁₁ , D ₁₂ , ..., D ₅₂ . There are a plurality of types of defect data, for example, the defect data D ₁₁ is a differential detection waveform obtained by negatively differentiating the electric signal obtained by photoelectrically converting the transmitted light received by the light receiver D 1 as a predetermined detection level. It is data showing a comparison result of comparison.

For convenience of description below, the configuration up to the signal processing circuit 4 will be described.
The defect detector 5 is used. The defect data from the defect detector 5 is fetched by the defect data fetching circuit 6 and subjected to signal processing, and then sent to the central processing unit (CPU) 7. In the CPU 7, a defect pattern is created from the defect data and collated with a defect identification pattern table stored in advance to determine the defect type, size, etc.

The present invention relates to an improvement of the defect data capturing circuit in such an identification type defect detection device, but the present invention is not intended only for the identification type defect detection device described above, but is of a flying spot type. If so, any type of identification type defect detection device can be targeted. Further, the reflected and scattered light may be further added to the light for detecting the change in the light amount.

The present applicant has already proposed a circuit having the configuration shown in FIG. 4 for such a defect data acquisition circuit.

The previously proposed defect data acquisition circuit 10 includes an X-axis counter 11, an OR unit 12, a frequency dividing circuit 13, and a Y-axis counter.
14 and a FIFO memory 15. X-axis counter 11
Is a counter that counts a clock CLK for X-coordinate division, and is reset by a start pulse ST that is a scanning start signal. The start pulse ST is obtained by extracting the laser light reflected by the polygonal rotary mirror 2 of the defect detector 5 at a specific position with a glass fiber, performing photoelectric conversion, and shaping the waveform. The X-axis counter 11 outputs the count value when the defect data is taken in as X coordinate position data.

The OR unit 12 is a unit for accumulating defect data for a plurality of scans from the defect detector 5 and outputting the defect data at a predetermined timing.
It is disclosed in Japanese Unexamined Patent Publication No. 56-39419, “Defect Detection Device”. The purpose of this OR unit 12 is in relation to the processing speed of the CPU 7,
It is to improve the processing capability of the identification type defect detection device.

The frequency dividing circuit 13 frequency-divides the line synchronization signal PG corresponding to the moving distance of the glass plate in the line direction and inputs the frequency-divided signal to the OR unit 12. The OR unit 12 outputs the divided line sync signal.
The accumulated defect data is output at the timing of PG.

The Y-axis counter 14 counts the frequency-divided line synchronization signal PG from the frequency dividing circuit 13, and outputs the count value to the FIFO memory 15 as Y-coordinate position data when the defect data is input. The Y-axis counter 14 is reset by software.

The FIFO memory 15 includes X coordinate position data from the X axis counter 11, defect data from the OR unit 12, and Y axis counter 14.
The Y coordinate position data from is temporarily stored. And FIFO
Defect data and defect position data (X, Y) from memory 15
Is transferred to the memory of CPU7 by direct memory access (DMA).

FIG. 5 shows an example of the OR unit 12. This OR unit
12, a plurality of types of flaw data D _11, D _12, · · ·, corresponding to D _52, respectively, an OR circuit _{OR 11, OR 12, ··· OR} 52
And random access memory RAM ₁₁ , RAM ₁₂ , ..., RA
M ₅₂ and gate circuits G ₁₁ , G ₁₂ , ..., G ₅₂ .

6 and 7 are diagrams for helping understanding of the operation of the OR unit 12, and FIG. 6 shows scanning by a laser spot, a clock CLK, and a line synchronization signal PG after frequency division.
FIG. 7 is a schematic diagram showing the relationship with the above, and FIG. 7 is a diagram showing a state of being filled with defect data D _{11 in} the RAM ₁₁ of the OR unit. With reference to these drawings, the defect data as an example in the OR unit 12
The operation of accumulating D ₁₁ will be described. It is assumed that the glass plate is scanned n times in the X-axis direction by the laser spot during the line synchronization signal PG after frequency division. It is also assumed that each RAM of the OR unit 12 has addresses up to 1000. The address of each RAM corresponds to what number clock the clock CLK is.

Now, as shown in FIG. 6, when the glass plate 3 has a defect 25, the defect data D ₁₁ inputted from the defect detector 5 in the first scanning is written in the RAM ₁₁ and the bit “1” is set at the addresses 502 and 503. "Is standing. Flaw data D ₁₁ that has been entered in the second scanning after the OR is taken in flaw data and the logical OR circuit OR ₁₁ read from the RAM _11, is re-written to RAM _11, the n-th ... Defect data D input by scanning
₁₁ is the defect data read from the RAM ₁₁ and the OR circuit O
After being ORed in R ₁₁ , it is rewritten in RAM ₁₁ ,
Finally, the bit “1” is stored in the addresses 501 to 504. The defect data D ₁₁ stored in the RAM ₁₁ in this way is the line synchronization signal PG divided by the divider circuit 13.
It is output to the FIFO memory 15 via the gate circuit G ₁₁ at the timing of.

In the flying spot type defect detection device having the defect data capturing circuit configured as described above, the scanning speed of the laser spot for scanning the glass plate reflected by the polygonal rotating mirror is not constant. FIG. 8 is a diagram for explaining this situation, and shows a scanning state of a laser spot on the glass plate surface. The laser beam 50 reflected by the polygonal rotary mirror 2 scans on a virtual arc 51 at a constant speed around the rotation axis of the polygonal rotary mirror, and goes to the edge of the glass plate on the surface of the glass plate 3. The higher the scanning speed is.
The clock CLK for X-axis coordinate division equally divides the virtual arc 51, and the actual position in the X-axis direction on the surface of the glass plate 3 corresponding to the X-axis address based on the clock CLK is in equal relation. There is no. Therefore, the CPU of the defect detecting device has a conversion table for associating the position information of the X-axis address output from the defect data capturing circuit with the actual position of the glass plate surface. The conversion table recognizes that the center position of the scanning line corresponds to a fixed address. For example, as shown in FIG. 8, when one scan in the X-axis direction has an address of 1000, the center position of the scanning line is recognized to be an address of 500. Therefore, for example, when the optical system of the defect detecting device is adjusted, if the position of the center position is displaced to, for example, 502, the conversion table, that is,
There is a problem peculiar to the flying spot type defect detection device in that all the CPU software must be recreated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a defect data acquisition circuit that can be processed in hardware without correcting the software of the CPU when the address of the center position of the scanning line is deviated.

[Structure of Invention]

According to the present invention, a transparent plate running in the length direction is scanned with a light spot in the width direction, and based on a combination of light amount changes of any one of transmitted light, transmitted scattered light, reflected light, and reflected scattered light. In the defect data acquisition circuit of the identification type defect detection device for detecting the type, size, position, etc. of the defect, the first pulse train related to the position of the transparent plate in the width direction is counted, and the defect data is acquired. A first counter that outputs a count value at the time, a shift circuit that can shift a start pulse that resets the first counter, and a second pulse train related to the position in the length direction of the transparent plate. A second counter that counts and outputs a count value when the defect data is taken in and a defect data for a plurality of scans are accumulated and OR-processed, and processed at the pulse generation timing of the second pulse train. Defects Is characterized in that an OR unit for outputting data.

〔Example〕

 Examples of the present invention will be described below.

FIG. 1 is a block diagram showing an embodiment of the present invention. This defect data acquisition circuit is the same as the defect data acquisition circuit shown in FIG. 4, except that the X-axis counter 11 is replaced with an X-axis sub-counter 41 and an X-axis main counter 42. The X-axis main counter 42 has the same function as the conventional X-axis counter 11. The X-axis sub-counter 41 has a function of substantially shifting the start pulse ST, and the offset value can be set by software. When the X-axis sub-counter counts a predetermined number of clocks CLK based on the set offset value, the X-axis main counter 42
Output to The X-axis main counter 42 starts counting the clock CLK using the shifted pulse from the X-axis sub-counter 41 as a start pulse.

The operation of these counters will be described in detail with reference to FIG. FIG. 2 shows the relationship between the start pulse ST and the clock CLK, and it is assumed that there are up to 1000 X-axis coordinate addresses. Now, it is assumed that the center position address is shifted to the address 502 as shown in FIG. 2B at the actual generation timing of the start pulse ST shown in FIG. 2A. In such a case, to return the address of the center position to the address 500, "-2" is set as the offset value in the X-axis sub-counter 41. This makes X
The axis sub-counter 41 counts the clock CLK and outputs a pulse delayed (shifted) by one clock as shown in FIG. 2 (c). In the X-axis main counter 42,
When this shifted pulse is input from the X-axis sub-counter 41, counting of the clock pulse CLK is started using this pulse as a start pulse. Since this count start address is shifted by 2 clocks compared to the case of FIG. 2 (b), the center position address is 50
It will be address 0.

〔The invention's effect〕

As described above, according to the defect data fetching circuit of the present invention, since the X-coordinate count start address can be shifted from the actual start pulse position, adjustment of the optical system of the defect detection device, etc. This eliminates the need to recreate the CPU software even if the center position address shifts.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of the start pulse shift in the embodiment of FIG. 1, and FIG. 3 is an identification type defect detection device. FIG. 4 is a block diagram showing an already proposed defect data fetching circuit, FIG. 5 is a block diagram showing an example of the OR unit of FIG. 4, and FIGS. 6 and 7 are , FIG. 8 is a diagram for explaining the operation of the OR unit, and FIG. 8 is a diagram for explaining a scanning state by a laser spot. 1 …… Laser light source 2 …… Polygonal rotating mirror 3 …… Glass plate 4 …… Signal processing circuit 5 …… Defect detector 6,10,40 …… Defect data acquisition circuit 7 …… CPU 11 …… X-axis counter 12 …… OR unit 13 …… divider circuit 14 …… Y axis counter 15 …… FIFO memory 41 …… X axis sub counter 42 …… X axis main counter

Claims (1)

[Claims] 1. A transparent plate running in the length direction is scanned with a light spot in the width direction, and based on a combination of changes in the light amount of any one of transmitted light, transmitted scattered light, reflected light, and reflected scattered light. In the defect data acquisition circuit of the identification type defect detection device that detects the type, size, position, etc. of the defect, the first pulse train related to the position of the transparent plate in the width direction is counted, and the defect data is acquired. A first counter that outputs a count value when the first plate is turned on, a shift circuit that can shift a start pulse that resets the first counter, and a second pulse train related to the position of the transparent plate in the length direction. And a second counter that outputs a count value when defect data is captured, and defect data for a plurality of scans are accumulated and OR-processed.
A defect data acquisition circuit, comprising: an OR unit that outputs processed defect data at the pulse generation timing of the pulse train.