JP2973789B2 - Label area perimeter calculation device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for calculating the perimeter of a label area, and more particularly to a method for real-time high-speed real-time reading of an image for each label area by determining the number of adjacent label area boundary points in the vertical, horizontal and oblique directions. The present invention relates to a label region perimeter calculating device that can be calculated by the following formula.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram showing the principle of a label area perimeter calculation circuit described in Japanese Patent Application Laid-Open No. 61-221982. In FIG. 10, the binarization circuit 1
01 and the delay circuit 103 receive raster scan input of the label data of each pixel by the input data of the image clock. 2
The binarizing circuit 101 binarizes the labeled image. More specifically, the binarization circuit 101 sets a pixel having a label value of 1 or more to “1” and a background pixel having a label value of 0 to “0”. The edge pixel detection circuit 102 receives the output of the binarization circuit 101 and detects pixels forming the edge of each connected region. As an example, FIG. 11 shows the pixels at the edge of each connected region detected by the edge pixel detection circuit 102. In FIG. 11, numbers indicate label values, pixels without numbers are behind the label value “0”, and pixels with shadows are pixels at the edge of each connected region.

A delay circuit 103 is provided for giving a fixed delay to input label data and synchronizing with the output of the edge pixel detection circuit 102. The output of the delay circuit 103 is provided to the counting circuit 104. The counting circuit 104 counts the number of pixels detected by the edge pixel detection circuit 102 for each label area.

FIG. 12 is a specific block diagram of the counting circuit 104, and FIG. 13 is a time chart for explaining the operation of FIG.

In FIG. 12, a counting circuit 104 includes a single-port memory 301, an adder 302, a latch 303, and a flip-flop 304. Flip-flop 3
The enable terminal of 04 is supplied with the output of the edge pixel detection circuit 102 shown in FIG. 13C, and the flip-flop 304 is detected by the edge pixel detection circuit 102 as shown in FIG. The label data of the edge pixel is held in synchronization with the clock signal CLK shown in FIG. The data held by the flip-flop 304 is given as a dress of the memory 301 as shown in FIG. The data stored in the memory 301 is
It becomes count data of the number of edge pixels of each label area. When the label data of the edge pixel is given as the address of the memory 301 and the output enable signal shown in FIG. 13 (f) is given, the count stored in that address as shown in FIG. The data is read and applied to adder 302. The adder 302 adds “+1” to the read data and sends it back to the memory 301. When the write enable signal shown in FIG. 13H is given, the memory 301 receives the write enable signal shown in FIG.
The added data shown in (g) is written to the original address.
By repeating such processing, the perimeter of each connected region can be obtained. That is, the perimeter of each connected region is determined by the pixels forming the edge of the region.

[0006]

In the apparatus configured as described above, the perimeter of the connected area is determined by the number of pixels constituting the edge of the area, and there is a problem that the accuracy is inferior. . Specifically, the distance in the oblique direction is not reflected, and in general, the aspect ratio of the real thing and the image is also different, and this point is not reflected.

Further, when it is necessary to process data input at each clock at high speed in real time,
It is difficult with the counting circuit shown in FIG. because,
One clock cycle time (= image data input rate)
1, the data to be processed is read from the memory 301, the arithmetic processing is performed by the adder 302, and the arithmetic result is written and stored in the memory 1 again.
As shown in FIG. 3, one processing time requires at least a memory read time + an addition processing time + a memory write time.

SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a label region perimeter calculating device capable of calculating the perimeter of a label region accurately and at high speed in real time.

[0009]

The invention according to claim 1 is
An apparatus for calculating a perimeter of a label area for calculating a perimeter of a labeled image, comprising:
In 2 of the local area, and detects the boundary of the label area to determine the value of each pixel in the vertical direction, and determines a label area boundary point detection means or adjacent to any of the transverse and oblique directions, is detected The number of neighbors between boundary points in the local area
Addition means for adding, one of which is a read-only port and the other
Is the write-only port and stores the added neighbor number.
2-port memory and data read from 2-port memory
Select either the output result of the
Path to port memory and input 2-port memory
The data value given as the address of the already entered
While comparing the data value one clock before
Data provided as the address of the input two-port memory.
Data value and the already input data value two clocks ago.
And a path selecting means for selecting a path by comparing the above .

[0010] The invention according to claim 2 is the invention according to claim 1.
In addition to the above, the output result of the addition means holds the output result
Element to be applied to write-only port of 2-port memory
including.

The invention according to claim 3 is the invention according to claim 1 or 2
In addition to the invention of the above, the write
If the dress value is the write address value one clock later or two
The write address value after the
Write control means for controlling writing to the port memory is included.

[0012] The invention according to claim 4 is the invention according to claim 1 or 2.
In addition to the invention of the above , the read address value at a certain time is 1
Read address value before lock or read two clocks before
Compare whether the address value is the same as the 2-port memory
Read control means for controlling reading.

[0013]

[0014]

[0015]

According to the present invention, there is provided a label region perimeter calculating device,
In the 2 × 2 local area of the raster scan input data, the value of each pixel is determined to detect the boundary of the label area, and it is determined whether the label area is adjacent in the vertical direction, the horizontal direction, or the diagonal direction. The number of adjacencies between boundary points in the region is added by the adding means for each of the vertical, horizontal, and oblique directions.
Has a read-only port and a write-only port
It is stored in the 2-port memory, and the input 2-port memory
Data value given as address and already entered
The value is compared with the data value one clock before
Data provided as the address of the allocated 2-port memory
The ratio of the value to the already input data value two clocks ago
Compare and read from 2-port memory according to the result
Select either the output data or the output of the adder
Select the path to be given to the port memory.

[0016]

FIG. 1 is a block diagram showing a label area perimeter detecting circuit according to an embodiment of the present invention. The label area boundary point detection circuit shown in FIG. 1 checks the value of each pixel in a 2 × 2 local area of the raster scan input data, detects the boundary of the label area, and sets the boundary points in the vertical and horizontal directions. And the adjacent points in the local region are determined, and the number of adjacent points between the boundary points in the local region is determined in the vertical direction, the horizontal direction, or the diagonal direction. Is calculated for each of the vertical, horizontal, and oblique directions. Further, a label area to which the local area belongs is obtained.

More specifically, the label area boundary point detection circuit includes flip-flops 708 to 711 which operate in synchronization with an image clock signal CLK which is a synchronization signal of each pixel. The flip-flop 708 has label data LBD
Is input in raster scan. The flip-flops 708 and 710 are reset and hold the value “0” in the next cycle after the last data of the label data LBD for one line in the effective horizontal direction is input to the flip-flop 708.

Further, a label area boundary point detection circuit RO
M, RAM or register file, etc.
A storage circuit 7 having an input / output relationship as shown in FIG.
When the flip-flops 708 and 710, including 01, are reset, the output of the multiplexer 702 becomes the last effective local area label value in the horizontal one line. This is to check the vertical adjacentness of the last effective pixel in one horizontal line. The output of flip-flop 708 is provided to line buffer 707. The line buffer 707 delays data by one line in the horizontal direction. It further includes binarization circuits 704, 705 and 706, which binarize pixels having one or more label values to "1".
The background pixel having the label value 0 is set to “0”, the storage circuit 701 detects a boundary point from each binarized pixel value of the local area 2 × 2, and the boundary points are set in the vertical and horizontal directions. It is determined whether the direction is adjacent in the direction or the diagonal direction, and the number of neighbors is output for each of the vertical direction, the horizontal direction, and the diagonal direction. The outputs of the flip-flops 708, 709, and 710 are
2 given. Multiplexer 702 includes control circuit 70
3 is controlled. Here, the following table shows the relationship between the input (P0, P2) of the control circuit 703 and the output of the multiplexer 702. * In the table is an optional term, and is a symbol indicating that either 0 or 1 may be used.

[0019]

[Table 1] Thereby, the output of the multiplexer 702 (LRLB)
Is the label value to which the local area 2 × 2 belongs, and the label area to which the local area belongs is obtained.

FIG. 2 is a block diagram of a label area perimeter calculating device according to one embodiment of the present invention. In addition to the label area boundary point detection circuit section 901 shown in FIG. 1, a counting circuit section which counts the number of adjacent label areas in the vertical, horizontal, and oblique directions for each label area is shown.
The counting circuit section includes a two-port memory 902 in which one port is dedicated to reading and the other port is dedicated to writing. 2
A label value corresponds to the address of the port memory 902,
The adjacent numbers of the boundary points of each label area in the vertical, horizontal and oblique directions are stored. For example, when the data bit width of the 2-port memory 902 is 24 bits (b23 to b0, MSB is b23, LSB is b0), the number of adjacent vertical bits is stored in the upper 8 bits (b23 to b16), and Stores the number of neighbors in the horizontal direction, and b
7 to b0 store the number of oblique neighbors. further,
The counting circuit section includes an adding circuit 903.
3 adds the adjacent numbers of the label area boundary points in the vertical, horizontal, and oblique directions. 2-port memory 90
Since the number of adjacent pixels in the vertical direction is assigned to b23 to b16 of 2, the number of adjacent pixels in the horizontal direction is assigned to b15 to b8, and the number of adjacent pixels in the oblique direction is assigned to b7 to b0. Also outputs data in the corresponding format.

The counting circuit further includes a multiplexer 90
6 to 911, flip-flops 915 to 928, and comparators 904 and 905. Flip-flop 915
928 operate in synchronization with an image clock signal CLK which is a synchronization signal of each pixel.
Is input with label data LRLB to which the local area examined by the label area boundary point detection circuit unit 901 belongs. Each of the comparators 904 and 905 has two inputs, and outputs an “H” level signal when the two input values are equal, and outputs an “L” level signal when the two input values are not equal. That is, the comparator 904 receives the outputs of the flip-flops 915 and 916 and compares the label data input together with the clock with the label data input one clock before. Comparator 905 has flip-flops 915 and 9
The output of 17 is input, and the label data input together with the clock is compared with the label data input two clocks before.

Further, the counting circuit section includes a read control circuit 91.
2 and a write control circuit 913. Read control circuit 91
2 is based on the outputs of the flip-flops 919 and 921 (the output signals are EQ12 and EQ13, respectively) during processing.
An output enable signal for the port memory 902 is generated.
The read control circuit 912 outputs the signal when the output signals EQ12 and EQ13 are both at the “L” level (that is, when the output value of the flip-flop 916 is
7 and 918), the output enable signal of the 2-port memory 902 is activated (“L” level). However, when the first label data of the effective data for one line in the horizontal direction is given as the read address of the two-port memory 902, the read control circuit 912 controls the two-port memory irrespective of the levels of the output signals EQ12 and EQ13. The output enable signal 902 is activated. Because, at this time, the output signal EQ12 is the result of comparison between the first valid label data and the immediately preceding (one clock before) non-valid label data, and the output signal EQ13 is the first valid label data and two clocks before the first valid label data. This is because the output signals EQ12 and EQ13 have no meaning because of the comparison result with the ineffective label data, and the flip-flops 923, 924, and 925 do not initially hold the perimeter data of the effective label data.

The second label data of the effective data for one line in the horizontal direction is stored in the two-port memory 902.
Output signal EQ when given as a read address of
If 12 is at the “L” level, the read control circuit 912 activates the output enable signal of the two-port memory 902 regardless of the level of the output signal EQ13. Because, at this time, the output signal EQ13 is a comparison result between the first valid label data from the beginning and the non-valid label data two clocks before that, and is meaningless.
12 is also at the “L” level, the flip-flop 9
23, 924, and 925 do not hold the perimeter data of the second effective label data from the beginning.
When output signal EQ12 is at "H" level, output signal EQ
13, the read control circuit 912 outputs 2
The output enable signal of the port memory 902 is made inactive.

The write control circuit 913 generates a write enable signal for the two-port memory 902 based on the outputs of the flip-flops 919 and 921 during processing (output signals are EQ13 and EQ23, respectively). That is, the write control circuit 9
13 is a write enable signal for the two-port memory 902 when both the output signals EQ23 and EQ13 are at "L" level (that is, when the output value of the flip-flop 918 is different from both the output values of the flip-flops 917 and 916). Is activated (“L” level). However,
Write control circuit 913 activates a write enable signal when the last valid data for one horizontal line is given as a write address of two-port memory 902 irrespective of the levels of output signals EQ23 and EQ13. . Because, at this time, the output signal EQ23 is the result of comparison between the last valid data and the ineffective label data immediately after (one clock later), and the output signal EQ13 is the last valid data and the non-effective label data two clocks later. This is because the output signals EQ23 and EQ13 are meaningless for the comparison result with the valid label data, and the perimeter data must be written. When the last valid data is given as the write address of the two-port memory 902, if the output signal EQ23 is at the "L" level, the write control circuit 913 does not depend on the level of the output signal EQ13. ,
Activate the write enable signal. In this case, the output signal EQ13 is meaningless at this time because it is the result of comparing the last valid data with the last valid data two clocks after the last, and the output signal EQ23 is also at the "L" level. This is because the last valid data of a different value becomes the write address of the two-port memory 902.

Note that the write control circuit 913 outputs the output signal E
When Q23 is at the "H" level, the write enable signal of the two-port memory 902 is made inactive regardless of the level of the output signal EQ13. This is because, in the next cycle, the last valid data having the same value as the second last valid data is given as the write address of the two-port memory 902, and the peripheral length data is written. Further, a path control circuit 914 is provided to control the multiplexer 906. The path control circuit 914 uses the outputs of the flip-flops 920 and 922 (the output signals are EQ23 and EQ24, respectively) for the multiplexer 90.
6 is controlled. That is, the path control circuit 914 connects the output of the flip-flop 925 to the input of the addition circuit 903 when the output signal EQ23 is at the “H” level, regardless of the level of the output signal EQ24 (path 1). When the output signal EQ23 is at the “L” level and the output signal EQ24 is at the “H” level, the path control circuit 914 connects the output of the flip-flop 923 to the input of the addition circuit 903 (path 2). When both the output signals EQ23 and EQ24 are at the “L” level, the path control circuit 914 connects the output of the flip-flop 924 to the input of the addition circuit 903 (path 3).

Of the effective data for one line in the horizontal direction,
When the first label data is held in the flip-flop 917, the output of the flip-flop 924 is connected to the input of the adder circuit 903 regardless of the levels of the output signals EQ23 and EQ24. Because, at this time, the output signal EQ
23 is a comparison result between the first effective label data and the immediately preceding (one clock before) non-effective label data, and an output signal EQ24 is a comparison result between the first effective label data and the non-effective label data two clocks before the same. Therefore, both the output signals EQ23 and EQ24 have no meaning, and the perimeter data of the first valid label data is held only in the flip-flop 924. When the second valid label data is held in the flip-flop 917,
If the output signal EQ23 is at “L” level, the output signal E
Regardless of the level of Q24, the output of flip-flop 924 is connected to the input of adder circuit 903. because,
At this time, the output signal EQ24 has no meaning because it is the result of comparison between the first valid label data and the non-valid label data two clocks before. In addition, since the output signal EQ23 is at the "L" level, the output signal EQ24 has the low level. This is because the circumference length data is held only in the flip-flop 924. When the output signal EQ23 is at “H” level, the output of the flip-flop 925 is connected to the input of the adder circuit 903 regardless of the level of the output signal EQ24.

The operation of the embodiment of the apparatus for calculating the perimeter of the label area constructed as described above will be described below.

First, the contents of the two-port memory 902 are cleared to zero. The multiplexers 909, 910, and 911 are controlled, and 0 is written to all addresses of the two-port memory 902 from the CPU or the like. Alternatively, if there is a clear terminal, it may be used. Next, the contents of all the flip-flops and the line buffer 707 are cleared to zero.

Next, a process of calculating the perimeter of each label area is performed. At this time, the multiplexers 907 and 908 are controlled to control the read enable terminal O of the two-port memory 902.
The output of the read control circuit 912 is input to E ^*, and the output of the flip-flop 916 is input to the read address terminal AR of the two-port memory 902 via the multiplexer 908. Multiplexers 910, 909, 91
1, the output of the write control circuit 913 is input to the write enable terminal WE ^* of the two-port memory 902, and the write address terminal AW of the two-port memory 902 is connected to the flip-flop 918 via the multiplexer 909. The output is input and the flip-flop 9 is connected to the write data terminal DW of the two-port memory 902 via the multiplexer 911.
Input 25 outputs.

FIG. 3 is a diagram showing a method for measuring the peripheral length of an 8-connected label ring area from raster scan input data, and FIG. 4 is a method for measuring the peripheral length of a 4-connected label ring area from raster scan input data. FIG.
FIG. 5 to FIG. 7 are time charts at the time of label area perimeter calculation processing in the case of performing raster scan input on the 8-connected label screen as shown in FIG. In particular, FIG.
FIG. 6 is a time chart for the second row (y = 1) of the input screen, and FIG. 7 is a time chart for the second row (y = 1) of the input screen.
Is a time chart at the time of the last line (y = 17) of the input screen.

Here, the 8-connected labeling area and the 4-label ring area will be described. As shown in FIG. 3, the eight connected label ring regions are arranged such that the central region Pa is in the vertical direction Pb, Pc, the horizontal direction Pd, Pe, the oblique direction Pf, Pg.
And the peripheral length is measured using the linked label rings of Ph and Pi. That is, depending on whether the 2 × 2 local areas P0 to P3 are 0 or * (a label value other than 0), the vertical, horizontal,
Measure the oblique perimeter.

The 4-connected label ring area is different from the central area Pa shown in FIG.
The perimeter is measured by the d and Pe connecting label rings.
That is, in the same manner as the 8-connected label ring area, 2 ×
The vertical and horizontal perimeters are measured according to whether the two local regions P0 to P3 are 0 or * (a label value other than 0). However, in the case of a 4-connected label ring, there is a possibility that different label values exist in a 2 × 2 local area, which is a case where only two diagonally exist, in which case the peripheral length is set to 0.

In FIG. 5 to FIG. 7, the image clock signal C
When LK, the label data LBD of each pixel, and the label data valid signal HEN ^* for one horizontal line are at the “L” level, the label data LBD is valid. The read address AR of the two-port memory 902 is a flip-flop 916
And the outputs of the flip-flops 915 and 917 are also shown. The output signals EQ12, EQ23,
EQ13 and EQ24 are as described above. In addition, 2
The read enable signal OE ^* of the port memory 902 is active and becomes "L" level, and the 2-port memory 902
Is of the write enable signal WE ^* becomes "L" level in active. The write address AW of the two-port memory 902 is the output of the flip-flop 918, and the write data DW of the two-port memory 902 is the output of the flip-flop 925. The numbers in the signal waveform indicate data values in hexadecimal.

Next, the operation in the label area perimeter calculation processing will be described. The label data LBD of each pixel is synchronized with the image clock signal CLK and the boundary point detection circuit 901
Is input in a raster scan. Boundary point detection circuit section 901
Examines the label value of each pixel in a 2 × 2 local area,
Detects the boundaries of label areas, determines whether the boundary points are adjacent in the vertical, horizontal, or diagonal directions, and calculates the number of adjacent boundary points in the local area for each of the vertical, horizontal, and diagonal directions Then, the data is output to the flip-flop 926. Further, the boundary point detection circuit section 901 obtains a label area to which the local area belongs (LRLB), and outputs the label area to the flip-flop 915.

On the other hand, the counting circuit section shown in FIG. 2 compares sequentially input data with data input one clock before and two clocks before. Based on the comparison result,
The read / write of the two-port memory 902 and the control of the multiplexer 906 are performed. That is, the two-port memory 90
If the data (output of the flip-flop 916) given as the second read address is different from the data one clock before (the output of the flip-flop 917) and the data two clocks before (the output of the flip-flop 918) (EQ12) = EQ13 = “L”), and the latest peripheral length data of the data (output of the flip-flop 916) is 2
Read from port memory 902. Then, in the next cycle, the data is held in the flip-flop 924, and the multiplexer 906 is controlled (EQ23 = EQ24 =
"L"), the output of the flip-flop 924 is added to the addition circuit 9
Enter 03 (pass 3).

Data (output of flip-flop 916) provided as a read address of two-port memory 902 is changed to data (clock of flip-flop 91) one clock before.
7 (the output of the flip-flop 916), the latest perimeter data of the data (the output of the flip-flop 916) is output from the 2-port memory 902 because the addition circuit 903 is outputting the data. Need not be read out, and in the next cycle, the output of the adder
25 and controls the multiplexer 906 (EQ2
3 = “H”), and inputs the output of the flip-flop 925 to the addition circuit 903 (pass 1). 2-port memory 902
If the data (output of flip-flop 916) given as the read address of the data coincides with the data (output of flip-flop 921) two clocks earlier and is different from the data (output of flip-flop 917) one clock earlier (EQ13) = “H”, EQ12 = “L”), and the latest perimeter data of the data (the output of the flip-flop 916) is held in the flip-flop 925.
There is no need to read data from the port memory 902, the flip-flop 923 holds the output of the flip-flop 925 in the next cycle, and the path control circuit 914 controls the multiplexer 906 (EQ24 = “H”, EQ23).
= “L”), the output of the flip-flop 923 is input to the addition circuit 903 (pass 2).

Regarding data writing in the two-port memory 902, when the output value of the flip-flop 918 is different from both of the output values of the flip-flops 917 and 916 (when EQ23 = EQ13 = “L” level) The output value of the flip-flop 925 is written to the two-port memory 902. When the output value of the flip-flop 918 is equal to the output value of the flip-flop 917 (EQ23 = “H”)
At the time of the level), it is not necessary to write in the next cycle. When the output value of the flip-flop 918 is equal to that of the flip-flop 916 (when the EQ13 is at the “H” level), writing is performed two cycles later (two clocks later). By continuing such an operation, the perimeter data is stored in the 2-port memory 90 for each label area.
2 is stored.

When the input of the pixel data of the last horizontal effective line (y = 17) is completed, the number of horizontal effective pixels is calculated in order to calculate the horizontal adjacent number of the last horizontal effective line (y = 17). The label data having the value “0” is input for the same amount as the above. When the label area perimeter calculation processing is completed for the target image data, the multiplexers 907 and 9
08 is read from the two-port memory 902.

As described above, in one embodiment of the present invention,
Since the number of adjacent border points in the label area is calculated for each of the vertical, horizontal, and oblique directions, the perimeter can be obtained more accurately than in the conventional example. Further, the clock cycle time of the embodiment of the present invention shown in FIG. 2 is about the longer of the memory read time, the memory write time and the settlement processing time, so that the processing can be performed at least twice as fast as the conventional example. Then, for example, in an eight-link labeling connection area as shown in FIG. 8, the respective label lengths in the vertical, horizontal, and oblique directions can be obtained.

[0040]

As described above, according to the present invention, in the 2 × 2 local area of raster scan input data, the value of each pixel is determined to detect the boundary of the label area, and the vertical and horizontal directions are detected. And the diagonal direction is determined, and the number of adjacent points between the boundary points in the local area is added in the vertical, horizontal, and diagonal directions and stored in the two-port memory.
And data given as a 2-port memory address
Value and the data value one clock before and the data two clocks before.
Data from the 2-port memory.
Select either the read data or the addition result and
Since the so that given to Tomemori, the perimeter can be calculated accurately and at high speed real-time for each label area
Can be, it is Rukoto enhance the function performance of label area calculation processing device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of a label area boundary point detection circuit according to one embodiment of the present invention.

FIG. 2 is a block diagram illustrating an example of a label region perimeter calculating device according to an embodiment of the present invention.

FIG. 3 is a diagram for explaining a method of measuring the perimeter of an 8-connected label ring area from raster scan input data.

FIG. 4 is a diagram for explaining a method of measuring the perimeter of a 4-connected label ring area from raster scan input data.

FIG. 5 is a diagram showing a processing time chart when y = 0.

FIG. 6 is a diagram showing a processing time chart when y = 1.

FIG. 7 is a diagram showing a processing time chart when y = 17.

FIG. 8 is a diagram showing an input label image.

FIG. 9 is a diagram illustrating an input / output relationship of the storage circuit illustrated in FIG. 1;

FIG. 10 is a schematic block diagram of a conventional label region perimeter calculating device.

FIG. 11 is a diagram for explaining a label area circumference measurement method by the label area circumference calculation apparatus shown in FIG. 10;

12 is a specific block diagram of the counting circuit shown in FIG.

13 is a diagram showing a processing time chart of the counting circuit shown in FIG. 12;

[Explanation of symbols]

 701 Storage circuit 702 Multiplexer 703 Control circuit 704-706 Binarization circuit 707 Line buffer 708-711 Flip-flop 901 Label area boundary point detection circuit section 902 2-port memory 903 Addition circuit 904, 905 Comparator 906-911 Multiplexer 912 Read control Circuit 913 Write control circuit 914 Path control circuit 915 to 928 Flip-flop

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-59-174977 (JP, A) JP-A-5-20456 (JP, A) JP-A-62-70971 (JP, A) 195810 (JP, U) (58) Field surveyed (Int. Cl. ⁶ , DB name) G06T 7/00

Claims (4)

(57) [Claims] An apparatus for calculating a perimeter of a label area for calculating a perimeter of a labeled image, comprising: a local area of raster scan input data 2 × 2;
Detecting a boundary of the label area to determine the value of each pixel, the vertical direction, horizontal direction and label area boundary point detection hand stage determines adjacent to either diagonal direction, it is detected by the label area boundary point detection means Adding means for adding the number of adjacencies between boundary points in the local area
Stage, one is read-only port, the other is write-only port
And stores the number of neighbors added by the adding means.
2-port memory, read data from the 2-port memory or the addition
Select one of the output results of the
Path given to the memory and the input 2-port memory
The data value given as the address of the already entered
While comparing the data value one clock before
Given as the address of the two-port memory
Data value and data already input two clocks ago
A path selection procedure for comparing with a value and selecting the path.
A label region perimeter calculation device having a step. 2. An output of said adding means,
The output result is held and the write-only port of the 2-port memory is
2. The apparatus according to claim 1, further comprising a storage element provided to the label area. 3. The method according to claim 2, further comprising the step of :
The write address value at
Or the same as the write address value two clocks later.
Write control for controlling writing of the two-port memory
Comprising means, according to claim 1 or 2 label area perimeter calculator. 4. A read address value at a certain time.
Is the read address value one clock before or
Compare whether the read address value is the same as the read address value.
Including a read control means for controlling the reading of Tomemori of claim 1 or 2 label area perimeter calculator.