JPS6329796A - Driving of plasma display - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for driving a plasma display, and particularly to a method for driving a plasma display (AC refresh type plasma display).
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Conventionally, as a driving method for this type of AC refresh type plasma display (FDP), the voltage waveform applied to either the P2 class body or the external electrode group opposing each other through the discharge space is A pulse voltage is applied to the other electrode group in the form of a time-divided pulse, and when the voltage waveform is applied to the one electrode group, a pulse voltage with an opposite phase is applied when the voltage waveform is applied to the one electrode group. It is shown in Japanese Patent Publication No. 55-48318 that stable operation is achieved by applying phase voltages.

In the conventional driving method described above, pulse voltages of opposite phase and the same phase are applied to each electrode of the electrode group formed on the same insulator in response to lighting and non-lighting. Electrically, the drive circuit is coupled through the stray capacitance between the respective electrodes, and the power consumption of the drive circuit is maximized when a lighting or non-lighting state occurs between adjacent electrodes. Furthermore, the brightness of an AC refresh PDP is determined by the number of pulses included in a unit time, but as the number of pulses increases, the power consumption of the drive circuit increases, so the drive frequency is limited and sufficient brightness cannot be achieved. The disadvantage was that it was difficult to obtain.

On the other hand, if a time lag occurs between the high-frequency pulses applied to the scanning electrode group and the data electrode group, while the high-frequency pulses are applied to the scanning electrode group and the data electrode group, patent publication No. 55-48318
This method exhibited a different operation from the case disclosed in 2003, and had the disadvantage that the driving voltage range was narrow.

Furthermore, if a transparent electrode is used as the data side electrode, a distributed constant circuit is formed by the stray capacitance between this transparent electrode and the electrode, and the waveform of the output of the drive circuit and the tip of the transparent electrode is formed. , and because the voltages are different, there is a drawback that uneven brightness occurs.

The present invention provides a driving method that eliminates the drawbacks of the above-described conventional phase select driving method for an ACIJ flexible type plasma display.

That is, depending on the presence or absence of display, the period during which a waveform voltage with the opposite phase and the same phase as the waveform of the voltage applied to the row electrodes is applied to the column electrodes and the period of the voltage applied to the row electrodes are determined by the presence or absence of display. The period includes a period in which a voltage completely unrelated to the waveform is applied to the column electrodes, and the power consumed during the period in which a voltage similar to that in the conventional phase selection method is applied is lower than that in the conventional phase selection method. It is the same as the phase selection method, but
A voltage that is completely unrelated to the waveform of the voltage applied to the row electrodes,
That is, the power consumed during the period when a DC voltage is applied to the column electrodes is significantly reduced because the power consumed between the column electrodes becomes negligible.

Furthermore, by lowering the drive frequency during the same driving period as in the phase selection method and increasing the frequency during the period when DC voltage is applied to the column electrodes, it is possible to stabilize the drive and further reduce power consumption. can.

In the driving method of the AC refresh type plasma display of the present invention, an electrode group is formed on a glass plate, and the electrode group connects two glass plates covered with a dielectric material, with the dielectric material facing each other and keeping an appropriate distance between them. When driving a plasma display panel by applying a pulsed voltage between the electrodes, the plasma display panel has a structure in which the periphery is hermetically sealed with a glass frit and neon gas is filled inside. Applying a pulse voltage to keep the other electrode at O potential,
When a discharge is caused between electrodes, the voltage at which one discharge cell in the plasma display panel discharges is called the minimum sneaky discharge starting voltage (VDmin), and the voltage at which all cells in the plasma display panel discharge is called the maximum discharge starting voltage. (
VDmax), one electrode of the plasma display has a high VDmin, and VDmax
When a very low pulsed voltage (Vo) is applied and a pulsed voltage (■1) with the opposite phase and the same phase is applied to the other electrode, the condition of VDmin) lvo 1 - IVI l is satisfied. Discharge stops and VDmax<lvo
! This is an improved driving method that utilizes the fact that discharge starts when the +lV11 condition is met.

When a pulsed voltage higher than the maximum single-blade discharge starting voltage is applied to one electrode and a DC voltage is applied to the other electrode, all cells in the panel start discharging, but the discharge does not occur after the voltage is applied. It takes time for the discharge to start, and although it varies depending on the applied voltage, the discharge delay time in the AC1j fresh method is generally 5 microseconds or more. On the other hand, the discharge response after discharge is started is very fast, taking less than 100 nanoseconds.

The AC reflex, sea-type plasma display driving method of the present invention utilizes this discharge delay phenomenon, and applies a pulsed voltage higher than a single discharge starting voltage to one electrode, which is different from the conventional phase selection method. Similarly, according to the presence or absence of the display, apply pulsed voltages of the same phase and opposite phase to the other electrode,
A state is created in advance in which the discharge cells that should be discharged are discharged and the discharge cells that are not to be discharged are not discharged, and then the pulsed voltage of the other electrode is removed and the pulsed voltage applied only to one electrode is applied to that state. This is a method of driving an FDP by sustaining a pulsed voltage of one electrode, and repeating the process of returning to a state similar to the conventional phase selection method before the non-lit cells are turned on with a pulsed voltage of one electrode.

In other words, if we define the address state as the state driven by the conventional phase selection method and the hold state as the state where the address state is maintained by applying a pulsed voltage to one electrode, then the drive method of the present invention can be defined as follows. It is characterized by repeating the address state and hold state alternately.

Next, a detailed description will be given with reference to the drawings.

FIG. 1 is a timing chart of voltage arrangement according to the first embodiment of the present invention. FIG. 2 is a timing chart for explaining the timing of pulsed voltages applied to the scanning electrodes.

The plasma display panel used in the driving method of the present invention has two glass plates each having electrode groups covered with a dielectric material. It is designed to be. To drive this plasma display panel, a horizontal synchronizing signal υH shown in 2-E in FIG. 2 is generally used.
The first electrode is selected for a period of time, and a pulsed voltage having a peak value ■O shown at 2-A in FIG. 2 is applied to the first electrode. In the case of a panel having m horizontal electrodes and n vertical electrodes, n vertical electrodes are selected and driven relative to the first horizontal electrode.

Next K, after a certain period (blanking period), the second
The electrode is selected, and like the first electrode, it is
A pulsed voltage having a peak value of is applied to the second electrode (see FIG. 2-B).

A pulsed voltage is applied to the third electrode after the pulsed voltage is applied to the second electrode, and this operation is repeated one after another until the vertical synchronization signal is input (V).
Continue. The state in which the first electrode can be selected is returned by the vertical synchronizing signal shown in FIG. 2 2-D.

That is, in the scanning method of this method, the horizontal synchronizing signal is used to scan sequentially, and after all the horizontal electrodes have been scanned, the original state is restored by the input vertical synchronizing signal. The vertical synchronization signal matches the refresh frequency of the display and is generally chosen to be 60 cycles or more. On the other hand, although the number of horizontal synchronization signals included in one period of the vertical synchronization signal matches the number of scan lines, generally the number of scan lines does not match the number of scan electrodes of the panel.
The number of scanning lines is greater than the number of scanning electrodes on the panel.

FIG. 1 1-A shows a pulsed voltage applied to the first row electrode, and l-B and l-C in FIG. 1 represent the mth column and n
It shows the pulsed voltage applied to the column electrodes.

1-C and 1-D in FIG. 1 are the first row electrode and the mth row electrode, respectively.
A discharge light emitting point (
The voltage waveforms applied to the cell (row 1, column n) and the cell (row 1, column n) are shown.

Since the voltage waveform applied to the m-th column electrode is in opposite phase to the voltage waveform applied to the first row electrode, (1st row 9m
Cells in column ) are in lighting mode.

On the other hand, since the pulsed voltage applied to the n-th column electrode is in phase with the pulsed voltage applied to the first row electrode (1st row, nth column), the cell is in a non-lighting mode, that is, a light-off mode. It is.

(1st row, 9m column) The pulsed voltage applied to the cell is the first
It is expressed by the potential difference between the pulsed voltages applied to the row electrode and the m-th column electrode, and has a waveform of l-D in FIG. (1 line, n
Similarly, the pulsed voltage applied to the cell (column) is expressed as a potential difference as shown in FIG. 1-E.

The driving method according to the present invention is characterized in that during the H period when the row electrodes are selected, the a period in which a pulsed voltage is applied to the column electrodes depending on whether or not there is a display, and the b period in which a DC voltage is applied irrespective of the display. This method differs from conventional phase selection methods in that it determines the following.

The operation of period a during period H is described in patent publication No. 55-48318.
This period is defined as the address state in the present invention. On the other hand, the voltages applied to the lit cells and unlit cells during the b period of the H period are exactly the same regardless of whether the lights are on or off, as shown in Fig. 1-D and 1-E. Defined as a hold state. First, the operation in address mode is VDmax < l Vl l+ lv
o l ・・”・−<1)VDmin)IVO
I IVII =-”'(2)(1),
If the condition (2) is satisfied, cells that should be lit are lit, and cells that should not be lit are turned off.

In the hold state, a pulse voltage with an amplitude of (VO) is applied regardless of whether the light is on or off, as shown in the voltage waveform of period <a> in Figure 1 1-D and 1-E. The state created by the address state applied prior to is maintained during this period to perform display.

In other words, the cell (1st row, 9m column) that is lit in the address state discharges during period (a) and is filled with charged particles generated by the discharge, so the voltage is lower than that in the address state. Discharge starts easily even in the hold state where the voltage is applied.

-1 Cells in the non-lit state (row 1, column n) have an applied voltage lower than the discharge start voltage during the address mode period, and there are no charged particles in the cells (row 1, column n), and no discharge occurs. A certain amount of time is required to start discharging at the voltage applied during period b without starting during period a, and if period b is selected appropriately, it is possible to determine the voltage at which discharge will not start in the hold state. Can be done.

An example will be described in which a plasma display having display points of 640×400 dots is driven using the above solid driving method.

Figure 1 1-A applied voltage ■0 is 180■, its frequency B
00KHz, Figure 1 1-B, 1-Co applied voltage ■1
30V, its frequency B□QKHz.

When period a was set to 20 microseconds and period b was set to tlO microseconds, stable operation was obtained and the following results were obtained.

Conventional phase selection method Invention power 40w 28W brightness
10fL 9.4fL [Example] FIG. 3 shows a pulse voltage arrangement diagram of the second example.

FIG. 3-3A shows the pulsed voltage applied to the N row electrodes of the plasma display.

FIG. 3-B shows m rows, a pulsed voltage applied to the electrodes,
FIG. 3-C shows the pulsed voltages applied to the n-row electrodes, respectively.

FIG. 3-3-D shows a pulsed voltage applied to a cell formed at the intersection of an N row electrode and an m column electrode (N rows and 2 m columns),
FIG. 3-3E shows a pulsed voltage applied to a cell (N row, n column) formed at the intersection of the N row electrode and the n column electrode.

In FIG. 3, the period indicated by C indicates the blanking time, and the period indicated by a is the time during which display is performed in the address state. The period indicated by b is the time during which display is performed in the hold state. Further, the period a+b+c is one scanning time.

A case will be described in which a plasma display having 640×40 (1-) display points is driven with a pulsed voltage shown in FIG.

The voltage shown in Figure 3-A is 170V.

The frequency in the address state is 500 KHz, and the frequency in the hold state is f 2 MHz.
-The voltage shown in C is 30■, and the frequency of the address state is 5.
Stable operation was obtained by driving the device at a DC frequency in the hold state of oo KHz.

Comparing the power consumption and brightness obtained with this driving method with that of the conventional phase selection method, the results are as follows.

Power consumption Brightness Face selection method 40W 10fL Invention 15W 12fL Power consumption and brightness also change depending on the ratio of the address state time a and the hold state time s in FIG.

The above data is when the ratio of address state time to hold time is 1:2.

Next, a third embodiment will be described.

FIG. 4 shows the voltage waveforms applied to each electrode in the third embodiment.

FIG. 4-A shows a voltage waveform applied to N rows of scan electrodes during one scan period. As shown in 4-A, period C is an address state, period b is a hold state, and period C is a blanking state.

During the period when the N row electrode is being scanned, the pulsed voltage applied to the m column electrode is in the opposite phase to the voltage applied to the N row electrode, as shown by 4-H. and m
(N rows) of intersections with column electrodes.

As shown in 4-D, to the display cell (column n), a pulsed voltage with an amplitude of Vo+V is applied in the address state, and this amplitude is selected to be higher than the maximum sneaky discharge starting voltage of the plasma display. Therefore, the display cell (N row, n column) lights up.

On the other hand, in the (N row, n column) display cell, the pulse voltage applied to the n column and the pulse voltage applied to the N row are in phase, so the voltage amplitude in the address state is 4.
-■ As shown in E.

-Vl, and no discharge occurs.

The display cell (8 rows and 2 m columns) that started discharging during period C also
Discharge did not start during period C (row N.

The display cell in column n) also has an amplitude of ■ in the following period b.

A high frequency pulse is applied. The voltage applied during the b period is selected to be higher than the panel's sneaky discharge starting voltage, so if the b period is long enough, non-selected cells (N rows, n columns) will also start discharging in this hold state. However, if it is set to the address state before starting discharge in period b, the amplitude of the voltage applied to this unselected cell becomes Vo-Vl, so it is in the address state.

It is possible to prevent discharge in both the hold state and the hold state.

In this way, address state, hold state.

A stable display can be obtained by creating a hold state within one scanning period.

A case will be described in which a panel with 640×400 display points is used and driven with the pulse waveform shown in FIG.

One scan time is 43 microseconds, and the blanking period C is 3 microseconds.
Set the address state a to 10 microseconds, the hold state to 10 microseconds, set vl to 30■, the frequency in the address state to 500 KHz, the frequency in the hold state to f 2 MHz, and drive the above panel. The panel operated stably at a voltage between 163 and 175 ■.

In this example, the brightness is 1.1 times higher and the power consumption is 50%.

The operating voltage range has been improved by a factor of two compared to the respective conventional drive systems.

As explained above, the driving method of the present invention significantly improves brightness, power consumption, and operating voltage range.

[Brief explanation of the drawing]

FIG. 1 shows the applied voltage waveform in an embodiment of the present invention. FIG. 1 1-A shows the pulse voltage applied to the scanning electrode of the first row, and FIG. 1 1-B shows the m-th column data side electrode,
FIG. 1-C shows pulsed voltage waveforms applied to the n-th column data electrodes. Figure 1 1-D,
1-E indicate the voltage states applied to the cells (1st row, 9m column) and (1st row, n column), respectively. FIG. 2 shows the pulsed voltage applied to the scanning electrodes. FIG. 3 shows the pulsed voltage applied to the electrodes in the first row and column of the second embodiment. FIG. 4 shows the pulsed voltage applied to the row and 9 column electrodes of the third embodiment. Hand 11ri$ 2 times 3 side 4 Figure (NAte, 7'ttsu 11λ

Claims (1)

[Claims] A voltage is sequentially applied in a time-division manner to a group of scan electrodes of a plasma display panel whose electrodes are exposed to a dielectric material, and the scan is performed in synchronization with the voltage applied to each scan electrode. In a plasma display refresh drive method in which a voltage is applied to the data-side electrode group according to the presence or absence of data to drive the display, there are two periods during one scanning period: a period in which display is performed in an address state and a period in which display is performed in a hold state. The frequency of the pulsed voltage applied to the scan electrode in the hold state is higher than the frequency in the address state, and the display state is switched in the order of address state, hold state, and address state during at least one scan period, A method for driving a plasma display characterized by repeating the display. Note that the address state and hold state referred to here are defined as follows. That is, it is synchronized with the pulsed voltage applied to the scanning electrode during one scanning period in which one scanning electrode is grouped, and the data side electrode corresponding to the cell to be displayed has an opposite phase, and the cell that should not be displayed is synchronized with the pulsed voltage applied to the scanning electrode. The state during which a pulsed voltage of the same phase is applied to the data-side electrode corresponding to the display is called the address state, and the pulsed voltage that had been applied to the data-side electrode is stopped, and the charge created in the address state is called the address state. A state during a period in which the particles are driven only by pulsed voltages applied to the scanning electrodes is defined as a hold state.