JP2576158B2 - Driving method of plasma display - Google Patents

Description

The present invention relates to a driving method of a plasma display,
Especially, AC refresh type plasma display (PDP)
In the driving method of

[Conventional technology]

Conventionally, as a driving method of this type of AC refresh type plasma display (PDP), a voltage waveform applied to one of an insulator and an external electrode group opposed to each other via a discharge space is time-divided. The other electrode group is applied with a pulse voltage of the opposite phase when lighting the voltage waveform applied to the one electrode group, and the same phase voltage when not lighting the same. Shows that stable operation can be achieved by applying
No. 48318.

Also, a pulse-like voltage higher than the one-way discharge starting voltage is applied to one of the scanning electrodes, and the same or opposite phase is applied to the other electrode in accordance with the presence or absence of the display as in the conventional phase select method (Japanese Patent Publication No. 55-41818). A pulse-like voltage is applied, discharge cells to be discharged are discharged, and discharge cells that are not discharged are pre-formed in a non-discharge state, and then the pulse-like voltage of the other electrode is removed and applied to only one electrode. By connecting the state with a pulsed voltage and returning to the same state as the conventional phase select method before the non-lighted cell is turned on with the pulsed voltage of one electrode, power consumption can be reduced. A measuring method has also been proposed.

[Problems to be solved by the invention]

The above-described conventional driving method is a method of driving by applying a pulse voltage of the opposite phase and the same phase to each electrode of the electrode group formed on the same insulator corresponding to lighting and non-lighting. Electrically, the driving circuit is coupled via the stray capacitance between the electrodes, and when the lighting and non-lighting state occurs between the adjacent electrodes, the power consumption of the driving circuit is maximized. Further, the brightness of the AC refresh PDP is determined by the number of pulses included in a unit time. However, if the driving frequency is increased to increase the number of pulses, the power consumption of the driving circuit increases. Further, when a transparent electrode is used as the data-side electrode, a distributed constant circuit is formed by the stray capacitance between the transparent electrode and the electrode, and the output of the drive circuit and the tip of the transparent electrode are used. Are different from each other, a time lag and a change in voltage occur between the scanning pulse voltage and the data pulse voltage.
8 shows a different operation from the case disclosed in FIG. 8 and has a drawback that the drive voltage range is narrowed. That is, there is a drawback that the upper limit of the driving frequency is determined and it is difficult to obtain a sufficient luminance.

[Differences of the Invention from the Prior Art]

In contrast to the above-described conventional driving method, the present invention includes a period in which display is performed in an address state during one scanning period and a period in which display is performed in a hold state, and the address state further includes an initial partial period. Is a period during which a pulse-like voltage having the same phase as the scanning-side pulse voltage is applied regardless of the presence / absence of data, and the frequency of the pulse-like voltage applied to the scan electrode in the hold state is made higher than at least the frequency in the address state. It has an original content.

[Means for solving the problem]

The present invention provides a driving method which eliminates the above-mentioned drawbacks of the conventional AC refresh type plasma display driving method. In other words, during one scanning period, a period in which display is performed in the address state and a period in which display is performed in the hold state are included. In the first part of the address state, there is no data regardless of the presence or absence of data. This is a period in which the same pulse voltage is applied as in the case, and the frequency of the pulse voltage applied to the scan electrodes in the hold state is set to be higher than at least the frequency in the address state.

〔Example〕

 Next, a detailed description will be given with reference to the drawings.

FIG. 1 is a timing chart of the voltage arrangement according to the first embodiment of the present invention. FIG. 2 is a timing chart for explaining the timing of the pulse voltage applied to the scanning electrode.

The plasma display panel used in the driving method of the present invention is composed of two glass plates each having an electrode group covered with a dielectric, the electrode groups opposing each other, each electrode group being orthogonal, and the intersection point being a light emitting point of display. It is designed to be.
In order to drive the plasma display panel, generally, the first electrode is selected for only the H period by the horizontal synchronization signal shown in 2-E of FIG. 2, and the wave shown in 2-A of FIG. A pulsed voltage having a high value V ₀ is applied to the first electrode. In the case of a panel having m horizontal and n vertical electrodes, n vertical electrodes are selected and driven for the first horizontal electrode.

Next, after a certain period B (blanking period),
The second electrode is selected and, like the first electrode, only during the H period
A pulsed voltage having a peak value of V ₀ is applied to the second electrode. (Refer to FIG. 2 -B.) A pulse-like voltage is applied to the third electrode after a pulse-like voltage is applied to the second electrode, and thereafter, this operation is repeated sequentially, and a vertical synchronization signal is applied. It lasts for a period (V) until it enters. The state is returned to a state where the first electrode can be selected by the vertical synchronization signal shown in FIG. 2-D.

That is, the scanning in this method is sequentially performed by the horizontal synchronization signal, and is returned to the original state by the vertical synchronization signal input after all the horizontal electrodes are scanned. The vertical synchronizing signal matches the refresh frequency of the display, and is generally selected for 60 cycles or more. On the other hand, the number of horizontal synchronization signals included in one period of the vertical synchronization signal matches the number of scanning lines. However, in general, the number of scanning lines does not match the number of scanning electrodes of the panel.
The number of scanning lines is larger than the number of scanning electrodes of the panel.

FIG. 1-A shows the pulse voltage applied to the first row electrode, and 1-B and 1-C in FIG. 1 show the pulse voltage applied to the m-th and n-th column electrodes, respectively. It is shown.

1-D and 1-E in FIG.
FIG. 3 shows voltage waveforms applied to discharge light emitting point (1 row, m column) cells and (1 row, n column) cells formed at intersections with column electrodes and n-th column electrodes.

Since the electrode waveform applied to the m-th column electrode has a phase opposite to that of the voltage waveform applied to the first row electrode except for the first two shots, the (1 row, m column) cell is lit. Mode.

On the other hand, the pulse voltage applied to the n-th column electrode is
The cell is in the non-lighting mode, that is, the light-off mode, because it has the same phase as the pulsed voltage imprinted on the first row electrode (1st row, n columns). (1 row, m column) The pulse voltage applied to the cell is represented by the potential difference between the pulse voltage applied to the first row electrode and the m-th column electrode, and has a waveform 1-D in FIG. . (1
Similarly, the pulse voltage applied to the (row, n column) cell is represented by a potential difference as shown in FIG. 1-E.

The operation in the period a in the H period is exactly the same as that in Japanese Patent Publication No. 55-48318, and this period is defined as an address state in the present invention. On the other hand, as shown in FIGS. 1-D and 1-E, the voltages applied to the light-on cell and the light-off cell during the period b in the H period are as follows.
The period is exactly the same irrespective of turning on and off, and this period is defined as a hold state.

First, in the operation in the address state, when driving by applying a pulse-like voltage between the electrodes of the plasma display panel, a pulse voltage is applied to only one of the electrodes and the other electrode is kept at 0 potential, and the electrodes are driven between the electrodes. When a discharge is caused by a single discharge cell in a plasma display panel, the discharge voltage is reduced to the minimum unidirectional discharge start voltage (VDmi
n), when the voltage at which all the cells of the plasma display panel discharge are defined as the maximum discharge starting voltage (VDmax), a pulse-like voltage (V) higher than VDmin and lower than VDmax is applied to one electrode of the plasma display. ₀ ) is applied, and when a pulse-like voltage (V ₁ ) of opposite phase and same phase is applied to the other electrode, the discharge stops when the condition of VDmin> | V ₀ | − | V ₁ | is satisfied When the condition of VDmax <| V ₀ | + | V ₁ | is satisfied, discharge is started.

In the hold mode, a pulse-like voltage having an amplitude (V ₀ ) is applied irrespective of lighting and extinguishing, as shown by the voltage waveform in the period (b) of FIGS. 1-D and 1-E, The state created by the address state applied prior to the hold state is maintained during this period to perform display.

That is, the cell in the lit state in the address state (1 row, m column) discharges during the period (a) and is filled with charged particles generated by the discharge. The discharge is easily started even in the hold state where is applied.

On the other hand, in the (non-lit) cell in the address state, the applied voltage is lower than the discharge starting voltage in the period in the address state, and the (1 row, n column) cell has no charged particles. a
A certain period of time is required before the discharge is started at the voltage applied during the subsequent period b without starting during the period,
By appropriately selecting the period b, a voltage at which the discharge is not started in the hold state can be determined.

Next, a period c in FIG. 1 newly provided according to the present invention will be described. This period is shown in FIG.
As in 1-C, a pulse in a light-off mode is applied regardless of the presence or absence of data. At this time, since the same pulse is applied to all data-side electrodes, the effect of the stray capacitance between the data-side electrodes can be ignored, and the output of the drive circuit and the waveform at the tip of the electrode And the difference in voltage is reduced. Further, during this period, all the discharge cells stop discharging, so that the discharge from adjacent cells does not spread. In the end, in the address state during the periods c and a, the cells to be discharged are slightly harder to discharge because of the pulse of the light-extinguishing mode during the period c compared to the conventional driving method.
In the cells which should not be discharged, the discharge completely stops in the period c, so that the spread from adjacent cells is eliminated. In other words, on display, the erroneous lighting voltage increases,
The drive voltage can be made wider and higher. In general, when the frequency of the pulse is increased, it is difficult to eliminate the time lag between the scan-side pulse voltage and the data-side pulse voltage due to the speed of the switching operation for generating the output state of the drive voltage, and an erroneous light is emitted. The voltage will be low. However, according to the present invention, even if the frequency of the address state is increased and the erroneous lamp voltage is lowered, the erroneous lamp voltage can be further increased by inserting an erase pulse in the period c, Brightness can be increased. On the other hand, according to the present invention, the luminance can be increased by increasing the frequency of the hold state in the period b. At this time, by further lowering the frequency in the periods c and a to lower the time constant formed by the stray between the data-side electrode and the electrode, the same waveform as the circuit output waveform is given to the entire panel. And the operation becomes stable. In FIG. 1-B,
A narrow pulse is drawn next to the erase pulse, which is irrelevant to the present invention and resulted in the same range of drive voltage with or without.

〔The invention's effect〕

As described above, the present invention includes a period in which the display is performed in the address state and a period in which the display is performed in the hold state during one scanning period. Regardless of the period during which a pulse-like voltage having the same phase as the scanning-side pulse voltage is applied, the frequency of the pulse-like voltage applied to the scan electrode in the hold state is set to be higher than at least the frequency in the address state.
The range of the driving voltage can be widened and increased. In addition, the luminance can be increased and the production yield can be improved.

[Brief description of the drawings]

FIG. 1 shows an applied voltage waveform according to the first embodiment of the present invention. FIG. 2 shows a state of a pulse-like voltage applied to the scanning electrode. 1-A, 2-A: pulse voltage applied to the first row of scan electrodes; 1-B: pulse voltage applied to the m-th column data electrode; 1-C: n-th column , 1-D... (1 row, m column) state of voltage applied to cell, 1-E... (1 row, n column) cell applied voltage , 2-B ... pulse voltage applied to the second row of scan electrodes, 2-C ... pulse voltage applied to the third row of scan electrodes, 2-D ... vertical synchronization signal, 2-E
... Horizontal synchronization signal.

Claims (1)

(57) [Claims] 1. A voltage is sequentially applied to one scanning electrode group of a plasma display panel in which electrodes are coated with a dielectric in a time-division manner, and scanning is performed, and the voltage is synchronized with the voltage applied to each scanning electrode. Then, in a plasma display refresh driving method in which a voltage is applied to another data side electrode group according to the presence or absence of data, driving is performed during a scanning period in which display is performed in an address state and display is performed in a hold state. In the first part of the address state, a pulsed voltage having the same phase as the pulsed voltage applied to the scan electrode is applied to the data electrode regardless of the presence or absence of data. A plasma display characterized in that the frequency of the pulsed voltage applied to the scan electrodes in the hold state is higher than at least the frequency in the address state. The driving method of Rei. Note that the address state and the hold state mentioned here are defined as follows. That is, a cell synchronized with the pulse voltage applied to the scan electrode during one scan period in which one scan electrode is selected, and a data side electrode corresponding to a cell to be displayed has a reverse phase, and a cell not to be displayed. The state of the display period by applying the same-phase pulse-like voltage to the data-side electrode corresponding to the address state, and the pulse-like voltage applied to the data-side electrode is stopped, and the charge created in the address state The state during the period of being driven only by the particles and the pulse voltage applied to the scanning electrode is defined as a hold state.