JPH03238496A - Driving method for plasma display panel - Google Patents

Abstract

PURPOSE:To expand the driving voltage range by setting the voltage value of address voltage pulses lower than the voltage value of hold voltage pulses. CONSTITUTION:Binary voltage control for controlling the voltage values of the address voltage pulses and hold voltage pulses applied to a scanning electrode group individually is employed and the voltage value of the address voltage pulses is set lower than the voltage value of the hold voltage pulses. Then the pulse voltage applied to a data-side electrode is put into opposite phase with the address pulses applied to scanning electrodes when a cell is selected and the pulses are stopped when the cell is not selected. Consequently, the driving voltage range can be expanded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for driving a plasma display panel, and particularly to an improvement in a method for driving an AC'I fresh type plasma display pulse (FDP).

[Conventional technology]

Conventionally, as a driving method for this type of AC refresh type PDP, a voltage waveform applied to one of the electrode groups facing each other through a dielectric film and a discharge space is
It is a time-divided pulsed voltage, and the other electrode group has
According to Japanese Patent Publication No. 55-48318, it is possible to drive the voltage waveform applied to one electrode group by applying a pulse voltage of the opposite phase when lighting is to be applied, and by applying a pulse voltage of the same phase when not lighting. It is shown in However, the brightness of AC refresh type FDP is
Since it is proportional to the number of pulses included in a unit time, as the number of scanning electrodes increases, the driving frequency required to obtain sufficient brightness increases, resulting in an increase in power consumption. In order to solve this drawback, Japanese Patent Application Laid-Open No. 63-278
According to a new driving method proposed in 1993, the frequency of the first period of scanning (address period) is lowered, and when the voltage pulse is applied to the scanning electrode, the voltage pulse applied to the data side electrode is Special Publication No. 55-4831 that applies pulse voltages of opposite phase and of the same phase when the cell is not lit.
The cell is addressed by an operation similar to that disclosed in No. 8. During the subsequent hold period, when the frequency of the voltage pulse applied to the scan electrode is increased and the pulse applied to the data side electrode is eliminated, the addressed discharge cells are kept in the discharge state, and the unaddressed discharge cells are kept in the non-addressed state. The discharge state is maintained. This new driving method has the advantage of reducing power consumption by reducing the number of pulses applied to the data-side electrode, and also enables higher brightness by increasing the frequency of the hold period. ing.

[Problem to be solved by the invention]

However, even with such an improved driving method, if a time lag occurs between the high-frequency pulses applied to the scanning electrode and the data-side electrode during the address period,
-48318, and had the disadvantage that the driving voltage range was narrow.

This content will be explained with reference to FIG. 2, which shows a drive waveform proposed in Japanese Patent Application Laid-Open No. 63-27893. Figure 2 shows
1 is a timing chart for explaining a drive waveform proposed in Japanese Patent Application Laid-Open No. 63-27893. Figure 2 2-A is
2-B and 2-C indicate the pulsed voltages applied to the Nth row electrode (scanning electrode), and 2-B and 2-C are applied to the mth column electrode (data side electrode) and the nth column electrode (data side electrode), respectively. This shows a pulsed voltage. Further, a period a during which a low-frequency pulsed voltage is applied to the N-th row electrode is defined as an address period, and a period during which a high-frequency pulsed voltage is applied is defined as a hold period. Now, the voltage at which one discharge cell in the plasma display discharges is called the minimum discharge starting voltage (Vn-1-), and the voltage at which all discharge cells in the plasma display discharge is called the maximum discharge starting voltage (V, 0f).
fi, , ), a pulsed voltage (vo) is applied to the row electrode (scanning electrode), and a pulsed voltage (vo) is applied to the column electrode (data side electrode) in the same phase or opposite to the pulsed voltage applied to the row electrode. A phase pulse voltage (Vl) is applied. Vn=+,>V
. - ■ When the conditions are met, the discharge stops and % VDma
! When the condition of ≦Vo+V is satisfied, discharge starts. The pulsed voltage applied to the cell is expressed by the potential difference between the pulsed voltages applied to the row electrode and the column electrode, and (N42m
The pulsed voltage applied to the cell (column) is as shown in FIG. 2 2-D, and the pulsed voltage applied to the (N row, n column) cell is shown as 2-E in FIG. 2.

Therefore, the voltage applied to the cell (column N42m) is ■. +V
, is■. +■1≧V When the condition of Dmax is satisfied (N
42m column) the cell is lit, and the voltage applied to the cell (N row, n column) (Vo V+ is ■. -V 1 < V 'n,
+, if the conditions (N rows, n columns) are satisfied, the cells are in a non-lighted state. Furthermore, as mentioned above, once the cell (N rows and 1 m column) is discharged during the address period a in FIG. The discharge can be maintained with a voltage, and if the highest sustaining voltage among the cells in the panel is Vsmax, the hold period is (
N rows, 1 m columns) The voltage v0 applied to the cell is ■. ≧■sii! If this is satisfied, the cell (column N42m) can connect the discharge. On the other hand, since the cell (N row, n column) is in a non-discharge state during the address period a, when a pulse voltage (2-, E) such as (Vo V+) + V+ = Vo is applied during the hold period. , Example ■. 2V
Il+,.

However, since the frequency of the pulsed voltage applied during the hold period is very high (e.g. 2.5MHz
), the cells (N rows, n columns) can be maintained in a non-discharge state due to the discharge delay phenomenon. Now, what should be noted here are pulse waveforms 2-B and 2-C applied to the m-th column electrode and the n-th column electrode. The pulse waveform shown here is not the output waveform of the drive circuit, but the pulse voltage waveform actually applied to the column electrode of the cell. In other words, the data side electrode (column electrode) usually has a sheet resistance of 8Ω/
A transparent electrode about the size of a mouth is used, and the pulse voltage waveform on the transparent electrode is distorted due to the resistance of this transparent electrode and the capacitance between the electrodes. For example, in an FDP with 640×400 cells and a cell depth of 0.36 mm, the resistance of the transparent electrode is 8Ω, and the interelectrode capacitance is 30 pF, and when the driving frequency exceeds 700 KHz, this waveform distortion becomes a problem. The waveforms shown at 2-B and 2-C in FIG. 2 take this waveform distortion into consideration. In the address period a of FIG. 2, the cell (column N42m) has a voltage of V
. A pulse voltage of +■l is applied to enter the selected state. On the other hand, ideally a pulse voltage of Vo-V is applied to the cell (N row, n column) and the cell is in a non-lighting state, but in reality, the pulse voltage applied to the n column electrode is Due to the distortion, a voltage having a peak-like pulse as shown in 2-E is applied. Due to the presence of this peak-like pulse, (
(N row, n column) cell will cause false lighting, so the actual V. The value had to be set to a value considerably lower than the theoretical value, which had the disadvantage of narrowing the driving voltage range.

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the conventional driving method described above and to provide a plasma display with a wide driving voltage range.

[Means to solve the problem]

The driving method according to the present invention scans by sequentially applying scanning voltage pulses in a time-sharing manner to a group of scanning electrodes of a plasma display panel whose electrodes are covered with a dielectric film,
It is driven by applying a selection voltage pulse to each data-side electrode in synchronization with a scanning voltage pulse applied to the scanning electrode group in accordance with the presence or absence of scanning, and displays in an address state during a scanning period. In the method for driving a plasma display panel, the scanning electrode group includes a period in which display is performed in a hold state and a period in which display is performed in a hold state, and in which the frequency of a pulsed voltage applied to the scan electrodes in the hold state is higher than the frequency in the address state. Binary voltage control is used to separately control the voltage values of the address voltage pulse and hold voltage pulse applied to the address voltage pulse, and the voltage value of the address voltage pulse is
It is characterized in that the voltage value is lower than the voltage value of the hold voltage pulse.

Note that the address state and hold state referred to here are defined as follows. That is, in the first period of one scanning period when one scanning electrode is selected, the pulsed voltage applied to the scanning electrode and the pulsed voltage applied to the data side electrode cooperate to address the cell. The state during the period is set to the address state, and the pulsed voltage applied to the data side electrode following the address period is stopped, and the pulsed voltage applied to the scan electrode and the charged particles created in the atmose state are used to drive the state. The state during the period in which the data is stored is defined as the hold state.

Embodiment] FIG. 1 is a drive waveform showing an embodiment of the present invention. 1st
Figure 1-A is the pulse voltage waveform applied to the N row electrode (scanning electrode), and 1-B and l-C are the pulse voltage waveforms applied to the m column electrode (data side electrode) and the n column electrode (data side electrode), respectively. This is the pulse voltage waveform. In addition, the pulse voltage waveform applied to the cell (row N42m) is as shown in 1-D, and (
N line.

(n column) The pulse voltage waveform applied to the cell is as shown in 1-E.

Now, the voltage at which one discharge cell in the plasma display panel discharges is the minimum discharge starting voltage (VD, , ), and the voltage at which all discharge cells in the plasma display panel discharge is the maximum discharge starting voltage (V, , , ). (
The voltage applied to the cell (column N61m) is as shown in l-D, and if the condition (1) is satisfied (column N61m), the cell will not discharge. ,
and V01≧V Smax ・
...If (2) is satisfied, the address period a
The cells that once started discharging (column N42m) maintain discharging even during the hold period. Here, V
Sma. indicates the highest sustaining voltage among all cells in the panel. On the other hand, the voltage applied to the cell (N row, n column) is 1-
As shown in E, if VO2<VD-, . Also, during the hold period, the pulse voltage value ■. Even if 1 is set to a value higher than the VDll and I values, the cell (N row, n column) can maintain a non-discharge state because the frequency of the hold voltage pulse during the hold period is high. As explained above,
According to the driving method of the present invention, the pulse voltage applied to the cell when not selected does not have the peak-like pulse that occurs in the conventional driving method, so the range of the driving voltage is expanded compared to the conventional method. It became possible to do so.

An example will be described in which a plasma display panel having 640×400 dot discharge cells is driven by the driving method according to the present invention described above. Now, to list the characteristics of this panel, VD---= 200 V, '
VD-, n = 180 V, VS-, 170■.Frequency 700K in address period a in Fig. 1
IHz, the frequency during the hold period is 2.5MHz
When setting V=60V, stable operation could be obtained in the ranges of 170V≦Vo1<190V and 140≦VO2<180V.

For comparison, the operating voltage range in the conventional driving method is shown below.

170V≦Vo<180V (however, V = 30V) [Effects of the Invention] As explained above, the present invention sets the address voltage value applied to the scan electrode lower than the hold voltage value and applies it to the data side electrode. When selecting a cell, the pulse voltage is set in opposite phase to the address pulse applied to the scanning electrode, and when deselecting a cell, the pulse is stopped, which has the effect of expanding the drive voltage range. In addition, in the present invention, even if the voltage applied to the data-side electrode is set to twice the voltage in the conventional driving method, power consumption does not increase, but rather by reducing the number of switching operations of the data-side electrode drive circuit, there is a slight increase in power consumption. reduction was achieved. Furthermore, since there is no need to control the output waveform of the data side drive circuit to be in-phase or out-of-phase depending on the presence or absence of data, the drive element can be simplified. Furthermore, since it became possible to apply a sufficient overvoltage of 240 V (conventionally 210 V) to the selected cell during the address period, extremely stable characteristics could be obtained.

2-A to 2-E are waveforms corresponding to those in FIG. 1, respectively.

Claims (1)

[Claims] An operation in which scanning is performed by sequentially applying scanning voltage pulses in a time-sharing manner to a scanning electrode group of a plasma display panel whose electrodes are covered with a dielectric film, and the voltage pulses are applied to the scanning electrode group depending on whether or not there is a display. It is driven by applying a selected voltage pulse to each data side electrode in synchronization with the voltage pulse, and includes a period in which a display is performed in an address state and a period in which a display is performed in a hold state within one scanning period, and a period in which a display is performed in a hold state. In a plasma display panel driving method in which the frequency of the pulsed voltage applied to the scan electrodes is higher than the frequency of the address state, the voltage values of the address voltage pulse and the hold voltage pulse applied to the scan electrode group are A method for driving a plasma display panel, characterized in that binary voltage control is performed in which each voltage is controlled individually, and the voltage value of an address voltage pulse is lower than the voltage value of a hold voltage pulse.