JPS63289943A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device wherein microstructuralization is attained by a method wherein a lead section is caused to adhere secure to the rear side of a substrate die-mounted with a semiconductor chip at its front side and a conducting member wire-bonded to the semiconductor chip is installed on the side wall of the substrate. CONSTITUTION:A semiconductor device of this design includes a semiconductor chip 1; a substrate 6 die-bonded with the semiconductor chip 1 on its front side; a lead frame 8 having an end provided with a flange 9 fixed partly to the rear side of the substrate 6 and protruding outward from the side wall of the substrate 6; and a conducting member 12 wire-bonded to the semiconductor chip 1 installed on the protruding front side of the flange 9. For example, to the rear side of a solid-state image sensing chip 1, a substrate 6, similar in planar geometry to the chip 1, is bonded. To the rear side of the substrate 6, a flange 9 of a lead frame 8 is fixed tight through the intermediary of a reinforcing member 11. Metal pieces 12 are bonded to the protruding flange 9, and their upper surfaces 13 are connected to a chip-side bonding pad 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a semiconductor device that enables ultra-small size.

[Problems to be solved by conventional techniques and inventions] In recent years,
Various electronic endoscopes have been proposed that use a solid-state imaging chip such as a charge-coupled device (COD) as an imaging means.

These solid-state imaging chips are housed in a package and incorporated into the tip of the insertion tube, but in order to alleviate patient pain, it is necessary to reduce the outer diameter of the solid-state imaging chip. The key is how to downsize the device.

On the other hand, as disclosed in Japanese Unexamined Patent Publication No. 57-34375, so-called lead parts are provided in two rows, which are die-bonded to a semiconductor chip sealed with a sealing material. There is a dual inline type.

Semiconductor devices with these configurations are versatile, and there is a demand for further miniaturization of semiconductor devices by taking into consideration the application and placement location of the semiconductor devices.

[Object of the Invention] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device that can be miniaturized.

Means and operation for solving the L problem The present invention has a semiconductor chip, a base member to which the semiconductor chip is die-bonded on the front, a flange portion at one end, and a part of the flange portion. a lead part fixed to the back surface of the base member so as to protrude from the side surface of the base member;
By constructing the semiconductor chip provided on the protruding front surface of the flange portion and the conductive member wire-bonded, the device can be made as compact as possible.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings.

1 and 2 relate to a first embodiment of the present invention, in which FIG. 1 is a cross-sectional view of a solid-state image transfer device, and FIG. 2 is a cross-sectional view taken along the line AA in FIG. 1.

An image area 3 having a horizontal shift register 2 on the negative side is provided on the front side of a solid-state imaging chip 1 having a rectangular planar shape as a semiconductor chip.

For example, three chip-side die bonding pads 4 are provided on two slightly wider sides of the image area 3 that are perpendicular to each other.

On the back surface of the solid-state imaging chip 1, a substrate 6 serving as a base member having a planar shape similar to that of the solid-state imaging chip 1 is provided.
A die attach portion 7 provided on the substrate 6 is bonded to the solid-state carrier chip 1 using, for example, a conductive paste. As a result, the die attach section 7
GND (not shown) provided on the back side of the solid-state carrier chip 1
It is designed to be connected to the terminal.

The back surface of the two sides of the substrate 6 where the chip-side die bonding pads 4 are provided is reinforced to prevent the flange portion 9 provided at one end of the lead frame 8 from bending due to heat during die bonding. A lead frame reinforcing material 11 is provided and fixed to the substrate 6 by brazing so as to protrude from the side surface thereof.

On the flange portion 9 on which the protruding lead frame reinforcing material 11 is provided, a square prism metal piece 12 formed from a conductive member is joined with the upper surface 13 at approximately the same position as the upper surface of the solid carrier chip 1. has been done.

The upper surface 13 of the metal piece 12 is connected to the die bonding pad 4 on the chip side by a bonding wire 14, whereby each terminal of the solid-state carrier chip 1 and the lead frame 8 are electrically connected. It has become so.

The die attach section 7 is electrically connected to a lead frame (not shown) provided on the back surface of the substrate 6 through a through hole (not shown) provided in the substrate 6 .

The semiconductor chip 1, the substrate 6, the metal piece 12, and the flange portion 9 of the lead frame 8 are formed into a solid-state imaging device using a transparent sealing material 16 such as low melting point glass or transparent epoxy resin so that the external shape becomes a rectangular parallelepiped. 18 so that the tip of the lead frame 8 is exposed.

Corners of the rectangular parallelepiped-shaped sealing material 16 that do not include any constituent members are cut off to form chamfered portions 17, thereby reducing the diagonal dimension of the front surface of the solid-state imaging device 18. .

The thicknesses of the solid-state imaging chip 1 and the substrate 6 are approximately 0.4 to 0.65 mm and approximately 0.3 to 0.5 mm, respectively, but are not necessarily limited to these dimensions.

Although the lead frame 8 and the metal piece 12 are separate bodies in this embodiment, they may be molded as one body. Alternatively, a color filter may be provided in an overlapping manner on the solid-state imaging chip 1, and the top thereof may be sealed with a transparent sealing material 16.

Further, although the present embodiment describes the case of a solid-state imaging device, the present invention may be applied to other semiconductor devices.

According to this embodiment, compared to the dual in-line type, the lead frame protruding from the chip periphery can be made as small as possible, and the two bonding butt rows are arranged at right angles.
By also providing a lead frame row to be wire-bonded to the bonding pad row at right angles, the semiconductor device can be miniaturized.

In addition, since the die bonding pad on the chip side and the top surface of the metal piece to be wire bonded are approximately the same height,
Bonding work becomes easier.

Furthermore, since the corners with no component parts are chamfered, the diagonal dimension becomes smaller, and the arrangement space can be used effectively when mounted on the distal end of an endoscope or the like.

FIG. 3 is an enlarged view of the wire bonding part according to the second embodiment.

In FIG. 3, the upper surface 13 of the solid-state imaging chip 1 and the upper surface 13 of a square prism metal piece 12 formed from a conductive member are shown.
The height of the metal piece 12 is approximately Q, which is 2 mm, and the metal piece 12 is lower.

With this configuration, wire bonding work can be made easier.

Other configurations and effects are similar to those of the first embodiment.

[Effects of the Invention] As explained above, according to the present invention, there is an effect that the semiconductor device can be further downsized.

[Brief explanation of drawings]

1 and 2 relate to the first embodiment of the present invention, and FIG. 1 is a front view of the solid-state imager, FIG. FIG. 2 is an enlarged view of a wire bonding part according to a second embodiment. 1...Solid-state imaging chip 6...Substrate 8...Lead frame 12...Metal piece 18...Solid-state imaging device procedures (self-imposed) January 19, 1988 Commissioner of the Japan Patent Office Kunio Ogawa 2, Title of the invention Semiconductor device 3, Relationship with the case of the person making the amendment Patent applicant representative Satoshi Shimoyama Department 4, Agent 6, Subject of amendment ``Detailed description of the invention'' in the specification First, in column 1, from the first line to the second line of page 4 of the specification, the phrase ``chip side die bonding pad'' has been corrected to ``chip side bonding pad.'' 2. On the 12th line of page 4 of the statement, the text "Tip side die bonding pad" should be corrected to "Tip side bonding pad." 3. On page 5 of the statement, from the 4th line to the 5th line, the phrase ``Tip side die bonding pad'' should be corrected to ``Tip side bonding pad.'' 4. In the first line of page 7 of the specification, the phrase "Chip-side die-bonding pad" should be corrected to "Chip-side bonding pad."

Claims (1)

[Claims] A base member having a semiconductor chip, a base member having the semiconductor chip die-bonded to the front side, and a flange portion at one end, such that a part of the flange portion protrudes outward from a side surface of the base member. What is claimed is: 1. A semiconductor device comprising: a lead frame fixedly provided on the back side of the flange portion; and a conductive member wire-bonded to the semiconductor chip provided on the front side of the protruding portion of the flange portion.