JPS63284618A - Initialization system for microcomputer - Google Patents

Abstract

PURPOSE:To switch the initialization by using a reset signal to carry out the initialization inside a microcomputer before a reset state is released. CONSTITUTION:A mask switching type microcomputer contains a clock generating part 1-1, a program counter 1-2, a program storing P-ROM 1-3, an initial value setting P-ROM 1-4, a P-ROM writing/reading parts 1-5 and 1-6, a data latch 1-7, a logical gate 1-8, etc. The output of the counter 1-2 is given to both ROM 1-3 and 1-4 and the ROM 1-4 positioned at a specific address by a signal A is selected at an instant when a reset mode is applied. The output of the ROM 1-4 is supplied to a data latch 1-7 via a reading part 1-6 and the data on said output is latched by a signal B. The output of the latch 1-7 is connected to an input terminal 1-9 set at one side of a logical gate 1-8 of the microcomputer. In such a constitution, the initialization can be carried out inside the microcomputer before the reset state is released.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an initial setting method for a microcomputer.

[Conventional technology]

In conventional microcomputers, mask options are used in the manufacturing process to perform internal initial settings, such as the presence or absence of pull-up resistors for input/output pins, and internal logic gate and state settings that cannot be determined by instructions. The masks are switched and initial settings intended by the user are made in advance using the masks.

[Problem that the invention seeks to solve]

A conventional dual microcomputer is equipped with a program storage memory type REIT memory (hereinafter referred to as RO).
(denoted as M), the mask used in the LSI manufacturing process to store the program is ROM.
Since it had to be created for each changed product, it was relatively easy to perform the wiring for initial settings as an afterthought.

However, if the program storage ROM is composed of P-ROM, there is no need to change the ROM part, so it is necessary to change the mask just to perform the initial settings, which is very unreasonable. It has the disadvantage of being.

In contrast to the conventional mask switching type microcomputer described above, the present invention provides one type of completed product with P
- It has the original content of providing the same function as a mask switching type microcomputer regarding initial settings by writing data to ROM. Moreover, it is possible to minimize the required hardware and obtain functions that are virtually the same as those of a mask-switchable microcomputer.

[Means for solving problems]

The system of the present invention consists of a P-40M in which initial setting data is written in advance, and a clock generator that detects a reset signal applied from the outside and generates a first clock and a second clock during a reset state. a program counter that generates an address of the P-ROM by a first clock; and a program counter that generates an address of the P-ROM specified by the address.
It has a readout section that reads out the OM, and a data latch that latches the output of the readout section using the second clock, and the output of the data latch is used for initialization.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a first embodiment of the present invention,
Clock generation section 1-1. Program counter 1-2.
P-ROMI-3 for program storage, P- for initial value setting
ROMI-4, P-ROM writing section 1-5. P-40Mg
Sale section]-6, data latch 1-7. logic gate 1
-8 and data buses 1-12. Data latches 1-7 and logic gates 1-8 are provided as many as the number of pins read out at one time by the P-ROM reading section 1-6, but only one set is shown to simplify the drawing.

It is assumed that the clock generating section 1-1 generates the clocks of the signal A and the signal B at the timing shown in FIG. 2 in response to a reset signal applied from the outside. The signal A becomes high level in synchronization with the reset signal, and becomes low level after 500+1 seconds. Also, signal B becomes high level 200+1 seconds after the reset signal rises,
], becomes low level after OO+1 seconds. Such signals A and B can be easily generated by a circuit as shown in FIG. Furthermore, it is assumed that the reset signal is set to a low level, that is, released, after a sufficient period of time has passed since the signal B became low level.

While the signal A is at high level, the program counter 1-2 indicates a specific address different from the address of the program storage P-ROM 1-3. The specific address is, for example, P-ROM address 1 for program storage.
If the address is 0 to 3FF in hexadecimal notation, it is address 400, etc.

The output of the program counter 1-2 is transferred to P-ROM 1-3 for program storage and P-ROM for initial value setting.
I-4. If the reset is not firm,
Program counter 1-2 and program storage P-R
Programs are read out by OMI-3. Although I am currently thinking about the moment when the reset occurred,
Initial value setting P-ROM 1-4 located at a specific address is selected by signal A. The contents of the initial value setting P-ROMI-4 are written in advance by the P-ROM writing section 1-5 using a P-ROM writer or the like.

The output of the P-ROMI-4 for initial value setting passes through the P-ROM reading section 1-6 and the data bus 1-12, and then goes to the data bus 1-12.
Input to latch 7. This data is completely latched by signal B which is the output of the clock generator. The output of the clutch latch 1-7 is connected to one input terminal 1-9 of the logic gate 1-8 inside the microcomputer, and outputs an inverted signal of the other input terminal 1-10 to the output terminal 1-11. jK whether to output high level or always output high level.
Choose.

Here, since the program storage memory is not limited to P-R and OM, the P-ROM readout section 1-6 uses mask R.
It is desirable that the circuit be of a type that can read both OM and P-ROM. In addition, in this method, P-MOR is read only once, so the number of initial value settings is 1.
It is unavoidable that the number of pits that can be read out per cycle is the maximum.

It should be noted that the above-described embodiments are intended to initialize the logic of locations that cannot be set by commands after the reset signal applied to the microcomputer is released.

FIG. 4 is a block diagram of Embodiment 2 of the present invention, in which clock generators 4-1. Program counter 4-2. ROM for program storage, P-ROMI-4 for initial value setting,,
P-ROM writing section 4-5° ROM reading section 4-6. Data latch 4-7° input/output terminal 4-8. Pull-up resistor 4-9. Pull-down resistor 4-10. P-channel transistor 4-11. It consists of an N-channel transistor 4-12 and a data bus 4-13.

The process up to the point where data is latched into the data latch 4-7 is the same as the first embodiment.

The output of the data latch 4-7 is a P-channel transistor 4-11 and an N-channel transistor connected in series with a pull-up resistor 4-9 and a pull-down resistor 4-10, respectively, connected to an input/output terminal 4-8. 4-12
connected to the gate. As a result, immediately after the reset is applied, the input/output terminal 4 is turned on and off by the P-channel transistor 4-11 or the N-channel transistor.
-8 is pulled up through a pull-up resistor 4-9 and a P-channel transistor 4-11, or alternatively, it is pulled up through a pull-up resistor 4-10 and an N-channel transistor 4.
-Pull down through 12 to select.

In this embodiment, a ROM is used as the program storage memory, but even in such a case, by applying the present invention, initial settings can be made to execute a program that reflects the user's intention. Become.

〔Effect of the invention〕

As explained above, the present invention uses a reset signal given from outside the microcomputer to initialize the internal settings of the microcomputer before the reset is released. By making it possible to initialize the internal settings of the microcomputer before it is released, the mask that previously had to be changed every time the initial settings changed can be changed to the only completed product that allows initial settings to be changed. There is an effect that makes it possible.

Also, when considering it as a product, all processing is performed during reset, so the operational differences from the mask switching product are as follows.
The only difference is that the initial settings are not made from the moment the power is turned on to the microcomputer until some time after it is reset, and this is not considered to be a serious problem in practice.

[Brief explanation of the drawing]

FIG. 1 shows a first embodiment of the present invention, FIG. 2 is a time chart of this embodiment, FIG. 3 is an example of a circuit that generates the clock shown in FIG. 2, and FIG. 4 is a diagram of a circuit according to the present invention. A second example will be shown. 1-1..., 4-1... Clock generation section, 1-2゜4-2... Program count, 1-3... P-ROM for program storage, 1-4.4- 4...P-ROM for initial value setting, 1-5.4-5...P-ROM writing section, 1-6...P-ROM reading section, 1-7゜4-
7...Data latch, 1-8...Logic gate, 1
-9.1-10...Input terminal, 1-11...Output terminal, 4-3...ROM for program storage, 4-6...
・ROM reading section, 4-8...input/output terminal, 4-9・
...Pull-up resistor, 4-12...N-channel transistor. Agent: Susumu Uchihara, patent attorney. -１〇-

Claims (1)

[Claims] A P-ROM in which initial setting data is written in advance, and a clock generator that detects a reset signal applied from the outside and generates a first clock and a second clock during a reset state. a program counter that generates an address of the P-ROM using the first clock; a reading unit that reads the P-ROM specified by the address; and a latching output of the reading unit using the second clock. 1. An initial setting method for a microcomputer, characterized in that the microcomputer has a data latch, and an output of the data latch is used for initial setting.