JPS6328075A - Schottky junction type viriable capacitance diode - Google Patents
Schottky junction type viriable capacitance diodeInfo
- Publication number
- JPS6328075A JPS6328075A JP17204586A JP17204586A JPS6328075A JP S6328075 A JPS6328075 A JP S6328075A JP 17204586 A JP17204586 A JP 17204586A JP 17204586 A JP17204586 A JP 17204586A JP S6328075 A JPS6328075 A JP S6328075A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- schottky electrode
- schottky
- epitaxial layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012535 impurity Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims description 17
- 150000001875 compounds Chemical class 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000007547 defect Effects 0.000 abstract description 2
- 238000009792 diffusion process Methods 0.000 abstract description 2
- 230000005684 electric field Effects 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 19
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 8
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 5
- 239000010931 gold Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910017401 Au—Ge Inorganic materials 0.000 description 1
- 229910000927 Ge alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、化合物半導体層と電極との界面に超階段形シ
ョットキ接合を形成したバリキャップダイオードに関す
るものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a varicap diode in which a hyperstep Schottky junction is formed at the interface between a compound semiconductor layer and an electrode.
従来の技術
高周波用低雑音バリキャップダイオードとして、多数キ
ャリヤによる伝導であることにより逆方向回復時間が短
かく、順方向立上り電圧が低いショットキ接合形のもの
が用いられている。さらに、基板材料としては、電子移
動度が大きいGaAs等の化合物半導体が用いられてい
る。このような化合物半導体の基材を用いたショットキ
接合形バリキャップダイオードの構造は、第3図に示す
メサ形のものが主であった。BACKGROUND ART As a low-noise varicap diode for high frequency use, a Schottky junction type diode is used, which has a short reverse recovery time and a low forward rising voltage due to conduction by majority carriers. Furthermore, a compound semiconductor such as GaAs, which has high electron mobility, is used as the substrate material. The structure of Schottky junction type varicap diodes using such compound semiconductor base materials has mainly been mesa-shaped as shown in FIG.
この構造は、高不純物濃度(n十)のn形のGa As
基板1の上に、低不純物濃度(n−)のn形のGaAs
をエピタキシャル成長させてエピタキシャル層2が形成
され、エピタキシャル層2の中に、これよりも高濃度に
n形の不純物を拡散させてn領域3が形成され、n領域
3の上に白金(Pt)等のショットキ電極4が形成され
、表面から1〜2μmの深さまでメサエッチングを施し
て形成したメザ部分5に酸化シリコン膜や窒化シリコン
膜の絶縁膜6が形成され、GaAs基板の裏面にオーミ
ック電極7が形成された構造である。This structure is made of n-type GaAs with a high impurity concentration (n0).
On the substrate 1, n-type GaAs with a low impurity concentration (n-) is formed.
An epitaxial layer 2 is formed by epitaxial growth, and an n-type impurity is diffused into the epitaxial layer 2 at a higher concentration to form an n-type impurity. A Schottky electrode 4 is formed, an insulating film 6 such as a silicon oxide film or a silicon nitride film is formed on a mesa portion 5 formed by mesa etching to a depth of 1 to 2 μm from the surface, and an ohmic electrode 7 is formed on the back surface of the GaAs substrate. This is the structure formed.
この構造によれば、n領域3とショットキ電極4との界
面において超階段形ショットキ接合が形成され、容量の
電圧依存性を大きくすることができるとともに、逆方向
バイアス印加時に表面での空乏層の延びをメサ部分5で
制限することができ、このため、1/f雑音の原因とな
る表面リーク電流が流れる距離が短かくなり、1/f雑
音を小さくすることができる。According to this structure, a hyperstep Schottky junction is formed at the interface between the n-region 3 and the Schottky electrode 4, and the voltage dependence of the capacitance can be increased. The extension can be limited by the mesa portion 5, and therefore the distance through which the surface leakage current that causes 1/f noise flows is shortened, and the 1/f noise can be reduced.
発明が解決しようとする問題点
従来のメサ形構造では、メサエッチングの深さがエピタ
キシャル層の厚さと同程度になる。この厚さは通常1〜
2μmであるので、表面側の周縁部に大きな段差ができ
、この段差部分、特にエッチ部分を酸化シリコン膜や窒
化シリコン膜の絶縁膜で完全にカバーする事が困難であ
った。このため信頼性の上で問題があった。Problems to be Solved by the Invention In conventional mesa-shaped structures, the depth of the mesa etch is comparable to the thickness of the epitaxial layer. This thickness is usually 1~
Since the thickness is 2 μm, a large step is formed at the peripheral edge of the surface side, and it is difficult to completely cover this step, especially the etched portion, with an insulating film such as a silicon oxide film or a silicon nitride film. This posed a problem in terms of reliability.
このため、メサ構造にかえてブレーナ形の構造にすると
表面での断差がなくなり上記の問題は無くなるが1表面
に沿った空乏層の広がりが大きくなり表面リーク電流の
流れる距離が長くなって1/f雑音が大きくなる不都合
があった。For this reason, if a Brenna-type structure is used instead of a mesa structure, the difference at the surface disappears and the above problem disappears, but 1 the depletion layer spreads along the surface and the distance through which the surface leakage current flows becomes longer. /f There was an inconvenience that the noise became large.
本発明は、ブレーナ形構造にして信頼性を高めるととも
に、表面に沿った空乏層の広がりを抑えて1/f雑音を
小さくすることを目的とするものである。An object of the present invention is to improve reliability by forming a Brenna-type structure, and to suppress the spread of the depletion layer along the surface to reduce 1/f noise.
問題点を解決するための手段
本発明のショット牛接合形バリキャップダイオードは、
n形不純物を高濃度に含んだ化合物半導体基板と、同基
板の上に形成された低不純物濃度のn形のエピタキシャ
ル層と、同エピタキシャル層内にこれよりも高濃度にn
形不純物を選択拡散して形成された第1の領域および同
第1の領域を取り囲むリング状の第2の領域と、端縁が
前記第1の領域を越えて前記エピタキシャル層内の一部
にまで延在して表面に形成されたショットキ電極と、前
記化合物半導体基板の表面に形成された絶縁膜を備える
とともに前記第1の領域と前記ショットキ電極の界面で
超階段形ショットキ接合を形成したものである。Means for Solving the Problems The Schott-cow junction type varicap diode of the present invention has the following features:
A compound semiconductor substrate containing a high concentration of n-type impurities, an n-type epitaxial layer with a low impurity concentration formed on the same substrate, and a compound semiconductor substrate with a higher concentration of n-type impurities in the same epitaxial layer.
a first region formed by selectively diffusing type impurities; a ring-shaped second region surrounding the first region; A Schottky electrode formed on the surface of the compound semiconductor substrate, and an insulating film formed on the surface of the compound semiconductor substrate, and a hyperstep Schottky junction formed at the interface between the first region and the Schottky electrode. It is.
作用
本発明の構造によれば、表面に段差がなく基板表面に絶
縁膜を完全に付けることができるとともに、表面に沿っ
た空乏層の広がりをリング状の第2のn領域でくい止め
ることができる。Effect: According to the structure of the present invention, an insulating film can be completely attached to the substrate surface without any step on the surface, and the spread of the depletion layer along the surface can be stopped by the ring-shaped second n-region. .
実施例
第1図は、本発明のショットキ接合形バリキャップダイ
オードの実施例の構造断面図であり、不純物濃度がI
X 10”/cntの高不純物濃度(n+)のn形のG
aAs基板1の上にGaAsをエピタキシャル成長させ
て不純物濃度が5 X 1015/cJの低不純物濃度
(n−)のn形のエピタキシャル層2が形成され、この
エピタキシャル層2の中にn形の不純物を選択拡散し、
不純物濃度が1016〜1017/c+jに選定された
第1のn領域3とこれを取り囲むリング状の第2のn領
域8が同時に形成され、端縁が第1のn領域3を越えて
エピタキシャル層2の一部にまで延在させる関係を成立
させで表面に白金(Pt)の単層膜あるいはチタン(T
i)、白金、金(Au)の棲層膜によるショットキ電極
4が形成され、GaAs基板1の表面にCVD法による
酸化シリコン膜とプラズマCVD法による窒化シリコン
膜の二層の被膜からなる絶縁膜6が形成され、GaAs
基板1の裏面に金・ゲルマニウム合金膜(Au−Ge)
膜と、さらにこの五に金膜を接層したオーミック電極7
が形成された構造のものである。Embodiment FIG. 1 is a structural cross-sectional view of an embodiment of the Schottky junction type varicap diode of the present invention, in which the impurity concentration is I.
n-type G with high impurity concentration (n+) of X 10”/cnt
GaAs is epitaxially grown on an aAs substrate 1 to form an n-type epitaxial layer 2 with a low impurity concentration (n-) of 5 x 1015/cJ. Diffusion of selection,
A first n-region 3 with an impurity concentration of 1016 to 1017/c+j and a ring-shaped second n-region 8 surrounding it are formed simultaneously, and the edge extends beyond the first n-region 3 to form an epitaxial layer. 2, a single layer of platinum (Pt) or titanium (T) is applied to the surface.
i) A Schottky electrode 4 is formed using a biolayer film of platinum and gold (Au), and an insulating film consisting of two layers of a silicon oxide film formed by CVD and a silicon nitride film formed by plasma CVD is formed on the surface of the GaAs substrate 1. 6 is formed, GaAs
Gold/germanium alloy film (Au-Ge) on the back surface of the substrate 1
Ohmic electrode 7 with a gold film in contact with the film and this 5
It has a structure in which
この構造によれば、第1のn領域3とショットキ電極4
との界面に超階段形ショットキ接合が形成され、逆方向
バイアス印加時に表面に沿った空乏層の広がりをリング
状の第2のn領域7で(い止めることができる。この結
果、表面リーク電流が流れる距離が短く制限されるため
表面の結品欠陥に起因する1/f雑音を小さく抑えるこ
とができる。According to this structure, the first n region 3 and the Schottky electrode 4
A super-stepped Schottky junction is formed at the interface with the ring-shaped second n-region 7, and the expansion of the depletion layer along the surface when a reverse bias is applied can be prevented.As a result, the surface leakage current Since the distance through which the particles flow is limited to a short distance, 1/f noise caused by surface bonding defects can be suppressed to a small level.
なお、ショットキ電極4の端縁が、第1のn領域3を越
えてエピタキシャル層2の一部にまで延在しているのは
、ショットキ電極4のすべてが工ビタキシャル層2より
も不純物濃度の高い第1のn領域3内にある場合には、
ショットキ電極4の端縁での空乏層の広がりが狭くなる
ためそこに電界が集中し、耐圧が低くなるので、ショッ
トキ電極4の端縁を不純物濃度の薄いエピタキシャル層
3まで広げて端縁での空乏層を少し広げ、いわゆる空乏
層の曲率をゆるめて耐圧を上げるためである。The reason why the edge of the Schottky electrode 4 extends beyond the first n-region 3 to a part of the epitaxial layer 2 is because the entire Schottky electrode 4 has an impurity concentration lower than that of the epitaxial layer 2. If it is within the high first n region 3,
Since the spread of the depletion layer at the edge of the Schottky electrode 4 becomes narrower, the electric field is concentrated there and the withstand voltage becomes lower. This is to widen the depletion layer a little, loosen the so-called curvature of the depletion layer, and increase the breakdown voltage.
次に、第2図にプレーナ構造であって、リング状の第2
のn領域があるものとないもののキャリア対雑音比(C
/N)による雑音の比較を示す。Next, Fig. 2 shows a planar structure with a ring-shaped second
The carrier-to-noise ratio (C
/N) shows a comparison of noise.
図に示すように、n領域のリングを付けることによりC
/N、ひいては1/f雑音が改善されていることがよく
わかる。As shown in the figure, by adding a ring in the n region, C
It is clearly seen that the /N and, therefore, the 1/f noise are improved.
発明の効果
本発明のショットキ接合形バリキャップダイオードによ
れば、プレーナ構造にして表面に段差を無くし、表面を
完全に絶縁膜で覆って信頼性を高めるとともに、ショッ
トキ電極の周囲にn領域のリングを付けることにより1
/f雑音を小さく抑えることができる効果が奏される。Effects of the Invention According to the Schottky junction type varicap diode of the present invention, it has a planar structure, eliminates steps on the surface, completely covers the surface with an insulating film to improve reliability, and has an n-region ring around the Schottky electrode. By adding 1
The effect of suppressing /f noise to a low level is achieved.
第1図は本発明のショットキ接合形バリキャップダイオ
ードの実施例を示す構造断面図、第2図はプレーナ構造
の従来のものと本発明のものとのC/Hの比較図、第3
図は従来のショットキ接合形のバリキャップダイオード
のメサ構造の構造断面図である。
1・・・・・・GaAs基板、2・・・・・・エピタキ
シャル層、3・・・・・・第1のn領域、4・・・・・
・ショットキ電極、6・・・・・・絶縁膜、7・・・・
・・オーミック電極、8・・・・・・リング状の第2の
n領域。Fig. 1 is a structural cross-sectional view showing an embodiment of the Schottky junction type varicap diode of the present invention, Fig. 2 is a comparison diagram of C/H between the conventional one with a planar structure and the one of the present invention, and Fig. 3
The figure is a structural cross-sectional view of a mesa structure of a conventional Schottky junction type varicap diode. DESCRIPTION OF SYMBOLS 1...GaAs substrate, 2...Epitaxial layer, 3...First n region, 4...
・Schottky electrode, 6... Insulating film, 7...
...Ohmic electrode, 8... Ring-shaped second n region.
Claims (1)
板の上に形成された低不純物濃度のn形のエピタキシャ
ル層と、同エピタキシャル層内にこれよりも高濃度にn
形不純物を選択拡散して形成された第1の領域および同
第1の領域を取り囲むリング状の第2の領域と、端縁が
前記第1の領域を越えて前記エピタキシャル層の一部に
まで延在して表面に形成されたショットキ電極と、前記
化合物半導体基板の表面に形成された絶縁膜を備えると
ともに前記第1の領域と前記ショットキ電極の界面に超
階段形ショットキ接合を形成したことを特徴とするショ
ットキ接合形バリキャップダイオード。A compound semiconductor substrate containing a high concentration of n-type impurities, an n-type epitaxial layer with a low impurity concentration formed on the same substrate, and a compound semiconductor substrate with a higher concentration of n-type impurities in the same epitaxial layer.
a first region formed by selectively diffusing shaped impurities; a ring-shaped second region surrounding the first region; and an edge extending beyond the first region to a part of the epitaxial layer. A Schottky electrode extended and formed on the surface, an insulating film formed on the surface of the compound semiconductor substrate, and a hyperstep Schottky junction formed at the interface between the first region and the Schottky electrode. Characteristic Schottky junction type varicap diode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17204586A JPS6328075A (en) | 1986-07-22 | 1986-07-22 | Schottky junction type viriable capacitance diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17204586A JPS6328075A (en) | 1986-07-22 | 1986-07-22 | Schottky junction type viriable capacitance diode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6328075A true JPS6328075A (en) | 1988-02-05 |
Family
ID=15934513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17204586A Pending JPS6328075A (en) | 1986-07-22 | 1986-07-22 | Schottky junction type viriable capacitance diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6328075A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0298175A (en) * | 1988-10-04 | 1990-04-10 | Nec Corp | Ultrahigh frequency diode |
-
1986
- 1986-07-22 JP JP17204586A patent/JPS6328075A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0298175A (en) * | 1988-10-04 | 1990-04-10 | Nec Corp | Ultrahigh frequency diode |
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