JPS6327955U - - Google Patents
Info
- Publication number
- JPS6327955U JPS6327955U JP12123386U JP12123386U JPS6327955U JP S6327955 U JPS6327955 U JP S6327955U JP 12123386 U JP12123386 U JP 12123386U JP 12123386 U JP12123386 U JP 12123386U JP S6327955 U JPS6327955 U JP S6327955U
- Authority
- JP
- Japan
- Prior art keywords
- edge connector
- data recorder
- external memory
- sides
- contact piece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000872 buffer Substances 0.000 claims description 4
- 230000002457 bidirectional effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Information Transfer Systems (AREA)
Description
第１図は本考案に係わるデータレコーダの一実
施例の接続図、第２図乃至第４図は第１図のデー
タレコーダの動作を説明するためのタイミングチ
ヤート、第５図は本考案のデータレコーダに用い
られるエツジコネクタの要部の構成図である。
１００……データレコーダ本体、２００……外
部メモリー、３００……エツジコネクタ、４００
……電源回路、１０……アナログ入力、２０……
Ａ／Ｄ変換器、３０……マイクロプロセツサ、４
０，５０……メモリ、６０，７０，２２０……双
方向性バツフア、９１……チツプセレクト信号。
Fig. 1 is a connection diagram of an embodiment of the data recorder according to the present invention, Figs. 2 to 4 are timing charts for explaining the operation of the data recorder of Fig. 1, and Fig. 5 is a data recorder according to the present invention. FIG. 2 is a configuration diagram of main parts of an edge connector used in a recorder. 100... Data recorder body, 200... External memory, 300... Edge connector, 400
...Power supply circuit, 10...Analog input, 20...
A/D converter, 30...Microprocessor, 4
0, 50...memory, 60, 70, 220...bidirectional buffer, 91...chip select signal.
Claims (1)
コネクタで接続するようにした外部メモリー付き
のデータレコーダにおいて、エツジコネクタの両
側においてデータバス上に双方向性バツフアを設
け、データのアクセス時以外はその両双方向性バ
ツフアをハイ・インピーダンスとすると共に、チ
ツプをセレクトするチツプセレクトラインが接続
される前記エツジコネクタの接触片を他の信号ラ
インが接続される接触片より短く構成したことを
特徴とするデータレコーダ。 In a data recorder with an external memory that connects the data recorder main body and external memory using an edge connector, bidirectional buffers are provided on the data bus on both sides of the edge connector, and both bidirectional buffers are provided on both sides of the edge connector. 1. A data recorder characterized in that a signal buffer has a high impedance, and a contact piece of the edge connector to which a chip select line for selecting a chip is connected is configured to be shorter than a contact piece to which other signal lines are connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12123386U JPS6327955U (en) | 1986-08-07 | 1986-08-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12123386U JPS6327955U (en) | 1986-08-07 | 1986-08-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6327955U true JPS6327955U (en) | 1988-02-24 |
Family
ID=31010311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12123386U Pending JPS6327955U (en) | 1986-08-07 | 1986-08-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6327955U (en) |
-
1986
- 1986-08-07 JP JP12123386U patent/JPS6327955U/ja active Pending
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