JPS63278404A - Waveform generator - Google Patents

Abstract

PURPOSE:To reduce the waveform error at the time of read from a waveform memory by allowing an adder/subtractor to act like addition operation when a gradient of an output detected by a differentiation device is positive and to act like subtraction operation in the base of negative gradient thereby using an output of the adder/subtractor as a waveform output. CONSTITUTION:A flip-flop 8, a flip-flop 9 and a comparator 10 constitute a differentiation device 11 detecting the gradient of the waveform data output. If the content of the flip-flop 8 is larger than the content of the flip-flop 9, the gradient of the waveform data output is positive. When the gradient of the waveform data output is positive, a value alpha of an input A appears at the output of a selector 12, and when negative, a value, inverse of alpha of an input B appears at the output of the selector 12. The value alpha or, inverse of alpha is multiplied with an output FRACT(i.n) of a phase register 5 by a multiplier 13. Then Y(INT(i.n)) and alpha FRACT(i.n) or, inverse of alphaFRACT(i.n) are added by an adder 7, the result is a waveform data output OUT with a read clock (n).

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a waveform generator that generates readout waveforms from a waveform memory in order to generate signal waveforms used in electronic musical instruments and the like.

(Prior Art) Conventionally, a method of reading out waveform data stored in a waveform memory has been widely used as a means for generating arbitrary waveforms. The most basic example will be described below.

Function y=F for time t of current period T (frequency f)
'('t) is summed every period ΔT (frequency 's) (here, ΔT is a value that divides T into N equal parts). In other words, using an integer 2 such that 04≦・≦N-1, t=ΔT@
Find the function value Y(ri) when z.

2π Y(-)=F(lower・ΔT-,) −F(L-・)・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・(1) Then, from O@ address to N-1 address of the memory, Y(0) to Y(N-1)
By storing up to 6 values, a desired waveform memory can be created. Consider the case where a signal of an arbitrary frequency f' is output from this waveform memory. This is f'=f,・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・Introduce a real variable i that satisfies the relationship (2), and read it as data corresponding to χ such as Z:i@n to obtain the nth output value Y. . That is,
Y,=Y(i-n)・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・
- (3). However, since i represents the increment of the address each time data is read, and the address can only take integer values, equation (3) can be realized and (
2) The expression has meaning only when i is an integer value. Therefore, data read from the waveform memory Y, 0 . is obtained approximately as follows.

Y,,, =Y (INT (i・n))...
・・・・・・・・・・・・・・・(4) Here, INT (
X) represents the largest integer value not exceeding X. Equation (4) is actually implemented in a circuit that uses a signal with a frequency of 11r:fll, accumulates it once per cycle, and reads data from the waveform memory using the integer part of the result as an address. can be converted into An example of such a circuit is shown in FIG.

This circuit is very common and can be easily understood, so a description of its operation will be omitted.

(Problems to be Solved by the Invention) Now, let us consider the error in the waveform output from the waveform generator configured as described above.

Using the form of the function y=F("t) representing the original waveform,
The output value Y10. and Y, . . . for i''n are expressed as follows.

Therefore, the error ΔY of Yl, , with respect to Ylo is as follows.

In principle, this type of waveform generator causes an error expressed by equation (7). From equation (7), ΔY, and 1−
It can be qualitatively seen that n-INT(i-n) has a monotonous magnitude relationship (i-n-INT(i-
Since n) represents the decimal part of i-n, it can be expressed as F R
It will be expressed as A OT (i-n). )0 Also, since FRACT(i-n) is a periodic function with respect to n, ΔY is a periodic function uniquely determined by i. In other words, ΔY becomes nominal noise with a characteristic spectral structure.

Now, it is because i-+oo 111n. That is, in order to reduce the waveform error, i should be set to a large value. From the relationship in equation (2), f' and f.

It can be seen that in order to increase i without changing , it is sufficient to increase N. This means an increase in memory capacity. One possible way to increase N isometrically without increasing the memory capacity is to calculate and compensate for the gap between two pieces of data stored at arbitrary adjacent addresses in the waveform memory. . The functional form of this interpolation generally requires a circuit that performs a plurality of product-sum calculations in real time, and although the memory capacity does not increase, the circuit size increases.

An object of the present invention is to effectively reduce waveform errors without significantly increasing memory capacity or circuit scale.

(Means for Solving the Problems) As described above, the present invention is based on the absolute value ΔY of the waveform error and the fractional part FRAOT of the phase value ion in the phase register.
Using the fact that (1-n) has a monotonous magnitude relationship, the purpose is achieved by adding or subtracting the value obtained by multiplying the FRAOT(i-n) by a certain value and the value read from the waveform memory. It is something to be achieved.

a phase register that accumulates a certain constant value, a waveform memory that stores waveform data, a multiplier that multiplies the fractional part of the phase value in the phase register by a certain constant, and an integer part of the phase value in the phase register. an adder/subtracter that adds or subtracts the output value of the multiplier and the waveform data read from the waveform memory using the address as an address; and a differentiator that detects the slope of the output value from the adder/subtracter; Means is provided for the adder/subtractor to perform an addition operation when the slope of the detected output value is positive, and for the adder/subtractor to perform a subtraction operation when the slope of the output value is negative, so as to control the output of the adder/subtractor. This is a waveform output.

(Example) The present invention will be described in detail below. FIG. 1 is a block diagram showing one embodiment of the present invention. Now, i-n≧INT(
i−n), so the following can be said.

Also, as mentioned above, since ΔY and FRAOT(i・n) have a monotonous magnitude relationship, a positive real value α is introduced to reduce the waveform error as when the slope of the waveform data output is positive. can do. If the corrected waveform data output is newly designated as Yl, . . . , the slope of the waveform data output is positive.

In FIG. 1, adder 1. Adder 2. The flip-flop 3 and the flip-flop 4 constitute a phase register 5. In other words, the frequency f' of the output waveform
The value i corresponding to is accumulated every read clock (period ΔT), and the accumulated value of
Output RAOT(i-n). This INT(i@n)
Data Y(INT(
illn). Now, flip-flop 8,7
The lip-flop 9 and the comparator 10 constitute a differentiator 11 that detects the slope of the waveform data output. That is, the waveform data output when the read clock is n-1 is input to the flip-flop 8, the waveform data output when the read clock is n-2 is input to the flip-flop 9, and the magnitude of both is input to the comparator 10. Compare with. If the value in 7-rip 70-tube 8 is greater than the value in 7-rip 70-tube 9, the slope of the waveform data output is positive. If the magnitude relationship between the values in both flip-flops is opposite to the above, the slope of the waveform data output is negative. When the slope of the waveform data output is positive, α of the input person appears in the output of the selector 12, and when the slope of the waveform data output is negative, -α of the input B appears in the output of the selector 12. . This α or -α is output by the multiplier 13 to the output FRAOT(
0 multiplied by i-n) and Y(INT(iIIn
)) and α-F'R.

ACT (iIIn) or -α・FRACT (i urn
) are added by the adder 7 and become the waveform data output OUT when the read clock is n.

Next, a concrete example of operation based on numerical calculations will be shown. f8=46
, 875KH21N=1024, and a sine wave is output. First, create a waveform memory.

Next, a frequency of f'=220·212 −3≦p≦8 is set at f′ i=□·102 =1, and waveform data corresponding to the value of each layer is output.

The theoretical waveform data output is as follows.

The waveform data output read from the waveform memory is as follows.

Y,,,=Y(INT(i −n)) しα・FRAO
T(i-n) When the slope of the waveform data output is positive, 0, when it is negative - from this, the waveform error ΔY when the read clock is n,
seek.

ΔL　”Y　a　@m　Ya　.

Further, e is determined by assuming that the number of data for one cycle of the output waveform is n. α is set so that the above e corresponding to each i value is the minimum value. Also, n is the i value = 46,
875kHz N=1024f'(Hz)
ick e(%) 196.0 0.
00, 0,2380.53
0.170 246.9 0,00 0,238
0.52 0,172 329.6 0.00 0,224
0.47 0,174 According to Table 1, it is approximately 0 for each frequency when no correction is performed.
．． It can be seen that the error rate of 23% has been reduced to about 0.17% by adding the correction.

As in the above example, it is most desirable to provide a combination of the values of i and α depending on the frequency of the waveform desired to be output. However, the structure will be briefly illustrated. Table 2 f,,=46.875kHz N=1024185,
O00480,174 196, O06480,170 207,70,480,167 220,00,480,172 233,10,480,182 246,90,480,172 261,60,480,172 277,20,480,179 293,70,480,186 311,10,480,165 329, +5 0,48 0.17
4349.2 0.48 0.1
78 Looking at this, it can be seen that there is almost no difference in the error rate up to about 3 significant figures.

Alternatively, the data output from the waveform memory and the fractional part of the phase register may be DA-converted and converted into analog signals, and then similar processing may be performed. In this case, the multiplier can be configured with an amplifier, so the circuit can be easily realized.

(Effects of the Invention) As described above, according to the present invention, waveform errors during reading from a waveform memory can be effectively reduced with simple processing without performing sophisticated interpolation calculations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a waveform memory readout circuit according to the present invention, and FIG. 2 shows an example of a conventional waveform memory readout circuit. 1.2, 7, 101, 102...adder 3.4, 8,
9,103,104...Flip-flop 5...Phase register 6.105...Waveform memory 10...Comparator 11...Differentiator 12...Selector 13...Patent which is a multiplier Applicant Nippon Columbia Co., Ltd. Hakuj 3

Claims (1)

[Claims] a phase register that accumulates a certain constant value, a waveform memory that stores waveform data, a multiplier that multiplies the fractional part of the phase value in the phase register by a certain constant, and an integer part of the phase value in the phase register. an adder/subtracter that adds or subtracts the output value of the multiplier and the waveform data read from the waveform memory using the address as an address; and a differentiator that detects the slope of the output value from the adder/subtracter; Therefore, when the slope of the detected output value is positive, the adder/subtractor performs an addition operation, and when the slope of the output value is negative, the adder/subtractor performs a subtraction operation, and the output value of the adder/subtractor is A waveform generator characterized in that it outputs a waveform.