JPS63272049A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS63272049A JPS63272049A JP10452087A JP10452087A JPS63272049A JP S63272049 A JPS63272049 A JP S63272049A JP 10452087 A JP10452087 A JP 10452087A JP 10452087 A JP10452087 A JP 10452087A JP S63272049 A JPS63272049 A JP S63272049A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- film
- semiconductor device
- nitride layer
- metal nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 104
- 239000002184 metal Substances 0.000 claims abstract description 104
- 150000004767 nitrides Chemical class 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims abstract description 43
- 239000007789 gas Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 24
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 11
- 229910001507 metal halide Inorganic materials 0.000 claims abstract description 7
- 150000005309 metal halides Chemical class 0.000 claims abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 29
- 229910052757 nitrogen Inorganic materials 0.000 claims description 16
- 239000001257 hydrogen Substances 0.000 claims description 12
- 229910052739 hydrogen Inorganic materials 0.000 claims description 12
- 230000009467 reduction Effects 0.000 claims description 10
- 229910052735 hafnium Inorganic materials 0.000 claims description 5
- 229910052750 molybdenum Inorganic materials 0.000 claims description 5
- 229910052715 tantalum Inorganic materials 0.000 claims description 5
- 229910052726 zirconium Inorganic materials 0.000 claims description 5
- 238000009792 diffusion process Methods 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 229910052758 niobium Inorganic materials 0.000 claims 2
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 23
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 16
- 238000004544 sputter deposition Methods 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 238000001020 plasma etching Methods 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000000126 substance Substances 0.000 abstract description 2
- 229910052990 silicon hydride Inorganic materials 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000001459 lithography Methods 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 45
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 description 12
- 230000008569 process Effects 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- DFJQEGUNXWZVAH-UHFFFAOYSA-N bis($l^{2}-silanylidene)titanium Chemical group [Si]=[Ti]=[Si] DFJQEGUNXWZVAH-UHFFFAOYSA-N 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910015255 MoF6 Inorganic materials 0.000 description 1
- 229910003828 SiH3 Inorganic materials 0.000 description 1
- 229910010421 TiNx Inorganic materials 0.000 description 1
- 229910008479 TiSi2 Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- -1 metal halide compound Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- RLCOZMCCEKDUPY-UHFFFAOYSA-H molybdenum hexafluoride Chemical compound F[Mo](F)(F)(F)(F)F RLCOZMCCEKDUPY-UHFFFAOYSA-H 0.000 description 1
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- OLRJXMHANKMLTD-UHFFFAOYSA-N silyl Chemical compound [SiH3] OLRJXMHANKMLTD-UHFFFAOYSA-N 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 229910001930 tungsten oxide Inorganic materials 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は、半導体装置の製造方法に係わり、特に配線層
接続の改良をはかった半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device that improves wiring layer connections.
(従来の技術)
近年、Si基板上に形成した絶縁膜に設けた開口部に対
する電極配線の形成方法として、Aノを主成分とする材
料のスパッタ法等に代り、水素(H2)と6弗化タング
ステン(WF6)ガスを用いた化学気相成長法(CVD
法)によりW膜を形成する方法が提案されている。この
方法では、基板表面での反応速度が堆積速度を律速する
支配的要因となるため、従来のスパッタ法等に比べて大
幅な段差被覆率の向上が実現される。(Prior art) In recent years, as a method for forming electrode wiring for openings provided in an insulating film formed on a Si substrate, hydrogen (H2) and 6F have been used instead of sputtering using a material mainly composed of A. Chemical vapor deposition (CVD) using tungsten oxide (WF6) gas
A method of forming a W film using a method (method) has been proposed. In this method, since the reaction rate on the substrate surface is the dominant factor that determines the deposition rate, a significant improvement in step coverage is achieved compared to conventional sputtering methods.
しかしながら、W膜と下地酸化膜(S i 02膜)と
は密着性が弱く、W膜とSl基板との間の応力に耐えら
れずW膜の剥離が頻繁に起こる。そのため、W膜の表面
形状は平坦性を失い、その後のパターン加工を困難にす
る。また、剥がれが起こらないようにW膜を薄膜化する
と、開口部の中心部は凹部となるので、上層に絶縁膜を
被着してその開口部の真上に第2の開口部を形成する場
合、局所的に絶縁膜厚が異なってしまう。このため、均
一なエツチングが困難であり、接続部が接触不良となる
虞れがあった。However, the adhesion between the W film and the base oxide film (S i 02 film) is weak, and the stress between the W film and the Sl substrate cannot be withstood, resulting in frequent peeling of the W film. Therefore, the surface shape of the W film loses its flatness, making subsequent pattern processing difficult. Also, if the W film is made thinner to prevent peeling, the center of the opening will become a recess, so an insulating film is deposited on the upper layer and a second opening is formed directly above the opening. In this case, the thickness of the insulating film differs locally. For this reason, uniform etching is difficult, and there is a risk of poor contact at the connection portion.
この問題を解決する方法として最近、W膜とSl基板と
の間に密着性の良好な金属層を設ける方法が提案されて
いる。特に、下層との密着性が良好でそれ自身電気的抵
抗率が100μΩ1以下となり、また上層に堆積したW
膜と下層に位置するSl基板との反応を高温(700℃
以上)でも阻止し得る物質として、Ti、Zr、Hf、
Nb。As a method to solve this problem, a method has recently been proposed in which a metal layer with good adhesion is provided between the W film and the Sl substrate. In particular, it has good adhesion with the lower layer and has an electrical resistivity of 100μΩ1 or less, and the W deposited on the upper layer
The reaction between the film and the underlying Sl substrate is carried out at high temperature (700°C).
Examples of substances that can inhibit the above) include Ti, Zr, Hf,
Nb.
Ta、Mo、W等の窒化物が有効である。Nitrides such as Ta, Mo, and W are effective.
ところが、これらの金属窒化物層上にW膜をCVD法で
堆積させる際に、従来通りのWF6の水素還元法を用い
ると、W膜の成長速度が極めて遅いか、堆積しないこと
が判明した。即ち、WF6の水素還元法を用いたCVD
法では、Aノ。However, it has been found that when a conventional WF6 hydrogen reduction method is used to deposit a W film on these metal nitride layers by CVD, the growth rate of the W film is extremely slow or the W film is not deposited. That is, CVD using hydrogen reduction method of WF6
In law, A-no.
W、Si上には制御性良く所望の膜厚のW膜を形成し得
るが、同じ導電性物質である金属窒化物上では極めて不
安定なW膜成長が観察された。スパッタ法では金属窒化
物層上にも問題なく金属膜の形成できるが、この場合は
先に述べたように段差被覆性の点で問題がある。このた
め、金属窒化物層上にCVD法で金属膜を再現性良く形
成する技術が要望される。Although a W film with a desired thickness can be formed on W and Si with good controllability, extremely unstable W film growth was observed on metal nitride, which is the same conductive material. Although a metal film can be formed on a metal nitride layer without any problem using the sputtering method, in this case, as mentioned above, there is a problem in terms of step coverage. Therefore, there is a need for a technique for forming a metal film on a metal nitride layer using a CVD method with good reproducibility.
一方、高融点金属窒化物は、金属間化合物より化合物形
成で生じる自由エネルギー低下が大きく且つ導電性を有
することから、反応障壁として有効であり、これまでに
TiN、ZrN、HfN等が応用されている。通常、こ
れらの金属窒化物とSiとの接触抵抗が高いため、その
間にシリサイドを予め介在させるか、または金属層を介
在させ熱処理によって金属硅化物を形成している。とこ
ろが、高融点金属の1つであるWを用いてW/T i
N/T L S i2/S i構造を実現すると、90
0℃を越える熱処理によってSl原子の外方拡散が顕著
となり、Wの硅化物化速度が極めて大きくなってしまう
。また、A、4F/TiN/TiSi2/Si構造にお
いてもTiNの表面層を若干酸化する等の熱処理を行わ
ないと、450 ’C程度でAノがTiNを突き抜けて
Sl基板に侵入していくため、S1層で接合破壊等が起
り易くなってしまう。On the other hand, high-melting point metal nitrides have a larger free energy drop caused by compound formation than intermetallic compounds and have conductivity, so they are effective as reaction barriers, and TiN, ZrN, HfN, etc. have been applied so far. There is. Usually, since the contact resistance between these metal nitrides and Si is high, a metal silicide is formed by interposing a silicide or a metal layer between them in advance and performing heat treatment. However, using W, which is one of the high melting point metals, W/T i
When realizing the N/T L S i2/S i structure, 90
Heat treatment at temperatures exceeding 0° C. causes significant outward diffusion of Sl atoms, resulting in an extremely high rate of silicidation of W. In addition, even in the A, 4F/TiN/TiSi2/Si structure, if heat treatment such as slightly oxidizing the TiN surface layer is not performed, A will break through the TiN and invade the Sl substrate at about 450'C. , bond breakdown etc. are likely to occur in the S1 layer.
(発明が解決しようとする問題点)
このように従来、半導体若しくはその上に形成した絶縁
膜或いは金属膜上に形成した金属窒化物層上に所望厚み
の金属膜をCVD法で形成する方法においては、再現性
良く所望の厚みの金属膜を短時間で形成することは困難
であった。また、反応障壁としての金属窒化物層を用い
ても、金属とSiとの反応を確実に防止することは困難
であった。(Problems to be Solved by the Invention) As described above, in the conventional method of forming a metal film of a desired thickness on a semiconductor, an insulating film formed thereon, or a metal nitride layer formed on a metal film, using the CVD method, However, it is difficult to form a metal film of a desired thickness with good reproducibility in a short time. Further, even if a metal nitride layer is used as a reaction barrier, it is difficult to reliably prevent the reaction between metal and Si.
本発明は上記事情を考慮してなされたもので、その目的
とするところは、金属窒化物層上にCVD法で金属膜を
再現性良く且つ短時間に堆積することができ、スルーブ
ツトの向上をはかり得る半導体装置の製造方法を提供す
ることにある。The present invention has been made in consideration of the above circumstances, and its purpose is to be able to deposit a metal film on a metal nitride layer using the CVD method with good reproducibility and in a short time, and to improve throughput. An object of the present invention is to provide a method for manufacturing a semiconductor device that can be measured.
また、本発明の他の目的は、金属とSLとの反応を確実
に防止することができ、信頼性の高い金属/Stコンタ
クトを実現し得る半導体装置の製造方法を提供すること
にある。Another object of the present invention is to provide a method for manufacturing a semiconductor device that can reliably prevent the reaction between metal and SL and can realize a highly reliable metal/St contact.
[発明の構成]
(問題点を解決するための手段)
本発明の骨子は、CVD法で用いるガスを選択すること
により、金属窒化物層上への金属膜の成長を容易にした
ことにある。さらに、金属窒化物層の窒素を過剰として
反応障壁効果を高めることにある。[Structure of the Invention] (Means for Solving the Problems) The gist of the present invention is to facilitate the growth of a metal film on a metal nitride layer by selecting the gas used in the CVD method. . Furthermore, the purpose is to increase the reaction barrier effect by adding too much nitrogen in the metal nitride layer.
即ち本発明は、半導体基板上に金属窒化物層を介して金
属膜を形成する工程を含む半導体装置の製造方法におい
て、金属ハロゲン化合物ガスと硅素−水素化合物ガスを
含有する水素ガスとの混合ガスを用いた化学気相成長法
によって、前記金属膜を前記金属窒化物層上に堆積する
ようにした方法である。That is, the present invention provides a method for manufacturing a semiconductor device including a step of forming a metal film on a semiconductor substrate via a metal nitride layer, in which a mixed gas of a metal halide gas and a hydrogen gas containing a silicon-hydrogen compound gas is used. In this method, the metal film is deposited on the metal nitride layer by a chemical vapor deposition method using.
また本発明は、半導体基板上に金属窒化物層を介して金
属膜を形成する工程を含む半導体装置の製造方法におい
て、前記金属窒化物層をその初期平均組成が該金属窒化
物の金属−窒素間で形成される最も窒素成分の多い金属
窒化物よりも窒素成分が過剰となるように形成する方法
である。The present invention also provides a method for manufacturing a semiconductor device including a step of forming a metal film on a semiconductor substrate via a metal nitride layer, in which the metal nitride layer has an initial average composition of metal-nitrogen of the metal nitride. This is a method of forming the metal nitride in such a way that the nitrogen content is in excess of that of the metal nitride that is formed between the metal nitrides and has the highest nitrogen content.
(作用)
本発明によれば、半導体基板上に金属窒化物層を介して
CVD法により金属膜を形成することにより、半導体基
板上に密着性が良好で段差被覆性及び電気伝導性共に良
好な配線層を形成することが可能となる。さらに、金属
膜形成のためのCVD法において、水素中に硅素−水素
化合物ガスを含有せしめたことにより、金属窒化物上に
多数の核形成場所が生じることになり、これにより所望
の膜厚の金属膜を短時間で再現性良く形成することが可
能となる。(Function) According to the present invention, by forming a metal film on a semiconductor substrate by the CVD method via a metal nitride layer, it is possible to form a metal film on the semiconductor substrate with good adhesion and good step coverage and electrical conductivity. It becomes possible to form a wiring layer. Furthermore, in the CVD method for forming metal films, the inclusion of silicon-hydrogen compound gas in hydrogen creates many nucleation sites on the metal nitride, which allows the desired film thickness to be achieved. It becomes possible to form a metal film in a short time with good reproducibility.
また、金属窒化物層の窒素を過剰とすることにより、窒
化物粒界に窒素を析出させ、該窒化物層における未反応
の金属の残留を防止でき、金属との界面及び窒化物内部
での粒界における金属或いはStの拡散を抑制し、金属
/St構造の熱的安定性をより高温まで保持することが
できる。このため、良好なコンタクト特性及び良好なP
N接合特性を得ることが可能となる。従って、低抵抗配
線を信頼性良く形成することができ、半導体装置の高密
度化及び高集積化をはかることも可能となる。In addition, by adding too much nitrogen to the metal nitride layer, nitrogen can be precipitated at the nitride grain boundaries, preventing unreacted metal from remaining in the nitride layer, and reducing the amount of nitrogen at the interface with the metal and inside the nitride. It is possible to suppress the diffusion of metal or St at grain boundaries and maintain the thermal stability of the metal/St structure up to higher temperatures. Therefore, good contact characteristics and good P
It becomes possible to obtain N-junction characteristics. Therefore, low-resistance wiring can be formed with high reliability, and it is also possible to increase the density and integration of semiconductor devices.
(実施例) 以下、本発明の詳細を図示の実施例によって説明する。(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.
第1図は本発明の第1の実施例方法に係わる半導体装置
の製造工程を示す断面図である。まず、第1図(a)に
示す如く、比抵抗6Ωαのp型(100)St基板11
上にLP−CVD法により 400℃でSiH4とN2
0との混合ガスを用いて、0.8μmのSi02膜12
を形成し、続いて500人のTiNHC金属窒化物層)
13を形成する。TiN膜13は200”C17)基板
温度ニテ、TiのターゲットをN2とAr(50%ずつ
)の混合ガス中で圧力を5mTorrと設定し、スパッ
タ法により形成した。FIG. 1 is a sectional view showing the manufacturing process of a semiconductor device according to the first embodiment method of the present invention. First, as shown in FIG. 1(a), a p-type (100) St substrate 11 with a specific resistance of 6Ωα
SiH4 and N2 were added to the top at 400℃ using the LP-CVD method.
0.8 μm Si02 film 12 using a mixed gas with 0.
followed by 500 TiNHC metal nitride layers)
form 13. The TiN film 13 was formed by sputtering at a substrate temperature of 200''C17) using a Ti target in a mixed gas of N2 and Ar (50% each) at a pressure of 5 mTorr.
次イテ、LP−CVD法ニヨリ水素(N2)。Next step: LP-CVD method Niyori hydrogen (N2).
モノシラン(SiH4)及び6弗化タングステン(WF
6)の混合ガスを用い、N2を0.173Torr。Monosilane (SiH4) and tungsten hexafluoride (WF
Using the mixed gas of 6), N2 was set at 0.173 Torr.
SiH4をO,013Torr、 W F 6をO,0
B5Torrの各分圧に保持し、380℃の基板温度で
、第1図(b)に示す如(TIN膜1膜上3上膜(金属
膜)14を0.2μm形成する。このとき、堆積時間は
2分40秒であった。その後、第1図(C)に示す如く
、通常のりソグラフイと反応性イオンエツチング(RI
E)を用いて、配線パターンを加工する。SiH4 at O,013 Torr, W F6 at O,0
At a substrate temperature of 380° C. and maintaining a partial pressure of B5 Torr, an upper film (metal film) 14 of 0.2 μm is formed on the TIN film 1 and 3 as shown in FIG. 1(b). The time was 2 minutes and 40 seconds.Then, as shown in Figure 1(C), regular lamination and reactive ion etching (RI) were performed.
Process the wiring pattern using E).
なお、上記CVD法の実施に際しては、第2図に示す如
きコールドウオール型CVD装置を用い、反応炉21内
に収容されるサセプタ22に複数の基板23を配置し、
ヒータ24により基板を加熱すると共に、反応炉21内
に所定のガスを導入してW膜や5to2膜等の成長を行
った。Note that when carrying out the above CVD method, a cold wall type CVD apparatus as shown in FIG.
The substrate was heated by the heater 24, and a predetermined gas was introduced into the reaction furnace 21 to grow a W film, a 5to2 film, and the like.
ここで、W膜を成長する際に用いたSiH4の添加量は
O,013Torrであったが、このときにW膜中に含
まれるStの量はSIMS分析により 1.3〜1.8
%程度であった。また、SiH4の添加量に対してW膜
の成長速度をプロットすると、第3図のようになる。S
iH4添加なしの場合0〜48人/ winであり、0
.013TorrのSiH4分圧では750人/win
s O,026Torrでは1400人/gin
となり、成長速度の安定性は飛躍的に向上した。また、
下地がWの場合はSiH4の添加なしでも、200人/
ginと安定した成長速度であった。Here, the amount of SiH4 added when growing the W film was O.013 Torr, and the amount of St contained in the W film at this time was 1.3 to 1.8 according to SIMS analysis.
It was about %. Furthermore, when the growth rate of the W film is plotted against the amount of SiH4 added, the result is as shown in FIG. S
Without iH4 addition, it is 0 to 48 people/win, and 0
.. 750 people/win at SiH4 partial pressure of 013Torr
s O, 1400 people/gin at 026 Torr
As a result, the stability of growth rate has improved dramatically. Also,
If the base is W, 200 people / even without the addition of SiH4.
The growth rate was stable at gin.
かくして本実施例方法によれば、W膜の形成の際にCV
D法で用いるガスとして、WF6とH2との混合ガスに
5tH4を添加することにより、つまりキャリアガスと
してのH2にSiH,を添加することにより、TiN膜
1膜上3上分速い速度で再現性良くW膜14を成長する
ことができる。Thus, according to the method of this embodiment, CV
By adding 5tH4 to the mixed gas of WF6 and H2 as the gas used in the D method, that is, by adding SiH to H2 as a carrier gas, the reproducibility on the TiN film 1 layer can be increased by 3 times faster. The W film 14 can be grown well.
ここで、TiN膜13は下地5to2膜12との密着性
が良く、さらにTiN膜13とW膜14との密着性は極
めて良好である。従って、S i 02膜12上に密着
性良くW膜14を形成することができ、配線パターンの
形成に極めて有効である。Here, the TiN film 13 has good adhesion to the underlying 5to2 film 12, and furthermore, the adhesion between the TiN film 13 and the W film 14 is extremely good. Therefore, the W film 14 can be formed with good adhesion on the Si 02 film 12, which is extremely effective in forming wiring patterns.
また、従来工程を大幅に変えることなく、ガスの種類を
選択するのみので簡易に実現し得る等の利点もある。It also has the advantage that it can be easily implemented by simply selecting the type of gas without significantly changing the conventional process.
第4図は本発明の第2の実施例方法を説明するための工
程断面図である。この実施例は深い開口部を有する下地
の上に開口部の穴埋めも兼ねた平坦化配線を形成する例
である。FIG. 4 is a process sectional view for explaining the second embodiment method of the present invention. This embodiment is an example in which a flattened wiring that also serves as a filler for the opening is formed on a base having a deep opening.
まず、第4図(a)に示す如く、比抵抗6Ωaのp型(
100)Si基板41の表面にヒ素(As)ドープによ
るn十層42を形成し、この上に約1.3μmのS L
021143をLP−CVD法で形成する。続いて、
RIEによりSi02膜43の所望の位置に直径0.5
μmの開口部44を設ける。First, as shown in Figure 4(a), p-type (
100) An arsenic (As) doped n layer 42 is formed on the surface of a Si substrate 41, and an S L layer of about 1.3 μm is formed on this layer.
021143 is formed by LP-CVD method. continue,
A diameter of 0.5 mm is placed at a desired position on the Si02 film 43 by RIE.
An opening 44 of μm is provided.
次いで、850℃のLP−CVD法により分圧o、t’
rorrでH2を1分圧0.05TorrでTiCノ4
を。Next, the partial pressures o, t'
H2 with RORR 1 partial pressure 0.05 Torr TiC NO4
of.
分圧0.08TorrでNH,を導入し、第4図(b)
に示す如く全面に約500人のTiN膜(金属窒化物層
)45を被着する。続いて、基板温度を400℃とし、
分圧0.173TorrでH2を2分圧0,013To
rrでSiH4を1分圧0.085TorrでWF6を
導入し、TiNJli45上に約300人のW膜(金属
膜)46を堆積する。Introducing NH at a partial pressure of 0.08 Torr, Fig. 4(b)
As shown in FIG. 3, about 500 TiN films (metal nitride layers) 45 are deposited on the entire surface. Next, the substrate temperature was set to 400°C,
Partial pressure 0.173Torr and H2 at 2partial pressure 0.013Torr
WF6 is introduced into SiH4 at a partial pressure of 0.085 Torr, and about 300 W films (metal films) 46 are deposited on the TiNJli 45.
次いで、分圧0.272TorrのH2と分圧0.03
TorrのWF6を導入して、第4図(C)に示す如く
約2000人のW膜47を堆積する。このとき、W膜4
7は下地がW膜46であることから、SiH,の添加な
しで再現性良く形成される。次いで、第4図(d)に示
す如(、RIE等によりW膜47゜46及びTLN膜4
5を選択エツチングして配線パターンを形成する。Then, H2 with a partial pressure of 0.272 Torr and a partial pressure of 0.03
Torr's WF6 is introduced to deposit about 2000 W films 47 as shown in FIG. 4(C). At this time, the W film 4
Since the base layer 7 is the W film 46, it can be formed with good reproducibility without adding SiH. Next, as shown in FIG. 4(d), the W film 47° 46 and the TLN film 4 were
5 is selectively etched to form a wiring pattern.
このように本実施例方法では、TiN上に最初SiH3
を含むH2とWF6を導入し、SiH4還元でW膜を成
長させたのち、H2とWF6のみのH2還元でW膜を成
長させている。2段階成長としているのは、SiH4還
元では成長速度が大きいため、アスペクト比2.6の開
口部では反応ガスの濃度が不足して、開口部内の成長速
度が平坦部より遅くなるため、より段差被覆性の優れた
H2還元で補っている。即ち、SiH4還元でTiN表
面上でのW膜の安定な成長をさせてから、H2還元でW
膜を厚膜化させている。H2還元を用いた場合、TiN
上に直接用いると、その表面状態により0〜48人/w
1nと云う成長速度になるが、TiN上にW膜が形成さ
れていれば150人/■inと云う安定した成長速度が
得られる。従って、アスペクト比の大きな開口部44内
にW膜46゜47を段差被覆性良く埋込むことができ、
配線層の形成に極めて有効である。In this way, in the method of this embodiment, SiH3 is first deposited on TiN.
After introducing H2 and WF6 containing H2 and WF6 and growing a W film by SiH4 reduction, a W film is grown by H2 reduction of only H2 and WF6. The reason for the two-step growth is that the growth rate is high in SiH4 reduction, so the concentration of reactant gas is insufficient in the opening with an aspect ratio of 2.6, and the growth rate in the opening is slower than in the flat area. This is supplemented by H2 reduction with excellent coverage. That is, after stable growth of W film on the TiN surface by SiH4 reduction, W film is grown by H2 reduction.
The film is made thicker. When using H2 reduction, TiN
When used directly on the surface, 0 to 48 people/w depending on the surface condition
The growth rate is 1n, but if a W film is formed on TiN, a stable growth rate of 150 people/inch can be obtained. Therefore, the W film 46° 47 can be embedded in the opening 44 having a large aspect ratio with good step coverage.
It is extremely effective in forming wiring layers.
第5図は本発明の第3の実施例方法を説明するための工
程断面図である。この実施例は、開口部の導体膜埋込み
に選択CVD法を用いた例である。FIG. 5 is a process sectional view for explaining the third embodiment method of the present invention. This embodiment is an example in which a selective CVD method is used to fill the opening with a conductive film.
まず、第5図(a)に示す如く、比抵抗6Ω1のp型(
100)Si基板51の表面にAsドープによるn ”
Wir 52を形成し、その上にスパッタ法でTiN
膜を堆積し、700℃のNH3雰囲気中で加熱して30
0人のTi S i2膜53及び1000人のTiN膜
(金属窒化物層)54を形成する。続いて、TiN膜5
膜上4上さ 1.3μmの絶縁膜55を形成する。この
絶縁膜55は、0.8μmの常圧CVD法で形成したS
i02膜に0.5μmのBPSG膜を積層させた2層か
らなっている。続いて、絶縁膜55に口径0.5μmの
開口部56を形成する。First, as shown in Figure 5(a), p-type (
100) n'' by As doping on the surface of the Si substrate 51
Wir 52 is formed, and TiN is deposited on it by sputtering.
The film was deposited and heated in an NH3 atmosphere at 700°C for 30
A TiSi2 film 53 of 0 and a TiN film (metal nitride layer) 54 of 1000 are formed. Next, TiN film 5
An insulating film 55 having a height of 1.3 μm is formed on the film 4 . This insulating film 55 is made of S
It consists of two layers: an i02 film and a 0.5 μm BPSG film laminated. Subsequently, an opening 56 with a diameter of 0.5 μm is formed in the insulating film 55.
次いで、400℃の基板温度で、分圧0.171Tor
rのH2と0.013TorrのSiH4及び0.08
5TorrのWF6を導入したCVD反応炉内にて5分
間の堆積を行うことにより、第5図(b)に示す如くW
膜(金属膜)57を開口部56内に選択的に形成する。Then, at a substrate temperature of 400°C, a partial pressure of 0.171 Tor
H2 at r and SiH4 at 0.013 Torr and 0.08
By performing the deposition for 5 minutes in a CVD reactor in which 5 Torr of WF6 was introduced, W was deposited as shown in Fig. 5(b).
A film (metal film) 57 is selectively formed within the opening 56 .
なお、このとき、平坦部の絶縁膜上にはW膜が成長しな
いのと、底からの成長のため段差被覆性は問題とならな
い。Note that at this time, the W film does not grow on the insulating film in the flat portion, and the step coverage is not a problem because the W film grows from the bottom.
第6図は本発明の第4の実施例方法を説明するための工
程断面図である。この実施例は、金属膜とSt基板との
反応を確実に防止するために、これらの間の金属窒化膜
を窒素過剰としたものである。FIG. 6 is a process sectional view for explaining a fourth embodiment of the method of the present invention. In this example, in order to reliably prevent the reaction between the metal film and the St substrate, the metal nitride film between them is made to contain excess nitrogen.
まず、第6図(a)に示す如く、比抵抗4〜6Ωaのp
型(100)St基板61に約6000人の素子分離用
酸化膜62を形成する。続いて、素子形成領域の一部ニ
A S ヲ50)COY テ2 X 1015(11−
2イオン注入し、950℃、60分の熱処理を行い、n
+型型数散層63形成した。次いで、第6図(b)に示
す如く、LP−CVD法で全面に約0.3μnのSi0
2膜64を形成し、約7000〜8000人の寸法のコ
ンタクトホール64を開口した。また、コンタクト部に
再度Asを30KeVでI X to15a−2イオン
注入し、1000℃で15秒の熱処理を行い、n十層6
3′を形成した。First, as shown in Figure 6(a), p
Approximately 6,000 element isolation oxide films 62 are formed on a type (100) St substrate 61. Subsequently, a part of the element formation region 1015 (11-
2 ions were implanted, heat treatment was performed at 950°C for 60 minutes, and n
A + type dispersed layer 63 was formed. Next, as shown in FIG. 6(b), about 0.3 μn of Si0 is deposited on the entire surface by LP-CVD method.
Two films 64 were formed, and a contact hole 64 having a size of about 7,000 to 8,000 people was opened. In addition, As was ion-implanted again into the contact part at 30 KeV, and heat treatment was performed at 1000°C for 15 seconds to form the n-layer 6
3' was formed.
次いで、高真空のスパッタ装置内にて第6図(b)に示
す基板上に、100人のTi膜をアルゴンでスパッタ堆
積し、その後窒素とアルゴンとの混合ガス雰囲気中(圧
力5 X 1O−3Torr)でTiターゲットをスパ
ッタすることにより、第6図(C)に示す如く全面に1
000人のTiN)(膜(金属窒化物層)66を形成す
る。このとき、Xは1よりも大とした。次いで、lO%
水素+窒素混合ガス中にて700℃、30分の熱処理に
より 100人のTiを全てTi512に変えた後、第
6図(d)に示す如く全面に0゜8μmのAJ!膜(金
属膜)67を堆積する。Next, 100 Ti films were sputter-deposited using argon on the substrate shown in FIG. By sputtering a Ti target at
000 TiN) (film (metal nitride layer) 66 is formed. At this time, X is larger than 1. Then, 1O%
After converting all of the 100 Ti to Ti512 by heat treatment at 700°C for 30 minutes in a hydrogen + nitrogen mixed gas, an AJ of 0°8 μm was applied to the entire surface as shown in Figure 6(d). A film (metal film) 67 is deposited.
その後、Aノ膜67をパターン加工してlO%水素+窒
素混合ガス中で450℃30分のシンターを行う。Thereafter, the A film 67 is patterned and sintered at 450° C. for 30 minutes in a 10% hydrogen+nitrogen mixed gas.
この実施例では、第7図に示す如く、TiNx膜66の
N/T i比が1以下(X≧1)の場合と比べ、0.2
μmの接合リーク電流を著しく低減することができる。In this embodiment, as shown in FIG. 7, the N/Ti ratio of the TiNx film 66 is 0.2 or less than 1 (X≧1).
Junction leakage current of μm can be significantly reduced.
200X 500μm2の接合面積に対し、N / T
i比が0.9以下の場合、1O−8〜1O−7A(電
圧5v印加時)であるのに対し、N/Ti比が1.1で
は10−”A、 1.2以上では1O−13AとAA’
/St反応を抑制した結果、接合リーク特性の著しい改
善が見られた。For a junction area of 200X 500μm2, N/T
When the i ratio is 0.9 or less, it is 1O-8 to 1O-7A (when a voltage of 5V is applied), whereas when the N/Ti ratio is 1.1, it is 10-''A, and when it is 1.2 or more, it is 1O- 13A and AA'
As a result of suppressing the /St reaction, a significant improvement in junction leakage characteristics was observed.
また、同一手法でAノの代りにWを用いた場合、950
℃でのWのシリサイド化速度は、N/Ti比が1ではW
厚換算にして10人/winであるのに対し、N/T
1比が1.2では0.2〜0.5人/ll1nと低下し
、反応障壁効果が著しく向上した。Also, if W is used instead of A using the same method, 950
When the N/Ti ratio is 1, the silicidation rate of W at ℃ is
In terms of thickness, it is 10 people/win, but N/T
When the 1 ratio was 1.2, it decreased to 0.2 to 0.5 person/ll1n, and the reaction barrier effect was significantly improved.
かくして本実施例方法によれば、下地SL基板61と配
線層となるAノ膜67との間に介在させるTiN膜66
を窒素過剰とすることにより、Aノ膜67との界面及び
TiN膜6膜中6中粒界におけるAI若しくはStの拡
散を抑制し、A、ff/Si構造の熱的安定性をより高
温まで保持することができる。つまり、TiN膜66の
反応障壁効果を高めることができ、良好なコンタクト特
性及び良好なpn接合特性を得ることができる。従って
、低抵抗配線を信頼性良く形成することができ、半導体
装置の高密度化及び高集積化等にも有効である。Thus, according to the method of this embodiment, the TiN film 66 interposed between the base SL substrate 61 and the A film 67 serving as the wiring layer.
By making nitrogen excessive, diffusion of AI or St at the interface with the A film 67 and the grain boundaries in the TiN film 6 is suppressed, and the thermal stability of the A, ff/Si structure is improved even at higher temperatures. can be retained. In other words, the reaction barrier effect of the TiN film 66 can be enhanced, and good contact characteristics and good pn junction characteristics can be obtained. Therefore, low resistance wiring can be formed with high reliability, and it is also effective for increasing the density and integration of semiconductor devices.
なお、本発明は上述した各実施例方法に限定されるもの
ではない。例えば、第1〜第3の実施例において、金属
窒化物層はTiNに限るものではなく、Zr、Hf、N
b、Ta、Mo、W等の窒化物であってもよい。さらに
、金属膜形成のための金属ハロゲン化合物ガスとしては
、WF6の代りにMoF6を用いることが可能である。Note that the present invention is not limited to the methods of each embodiment described above. For example, in the first to third embodiments, the metal nitride layer is not limited to TiN, but may include Zr, Hf, N
Nitrides such as b, Ta, Mo, and W may also be used. Furthermore, MoF6 can be used instead of WF6 as the metal halide gas for forming the metal film.
また、金属窒化物層と下地基板との間に配置する金属膜
としては、TiSi2の代りに他の金属の硅化物、A、
t’、W等の金属単体を用いることも可能である。Further, as the metal film disposed between the metal nitride layer and the underlying substrate, other metal silicides, A,
It is also possible to use simple metals such as t' and W.
また、水素−硅素化合物はSin4以外に、SiH6,
SiHBを用いてもよい。さらに、水素−硅素化合物の
添加量は、仕様に応じて適宜変更可能である。In addition to Sin4, hydrogen-silicon compounds include SiH6,
SiHB may also be used. Furthermore, the amount of hydrogen-silicon compound added can be changed as appropriate depending on specifications.
また、第4の実施例において、金属膜はAノやW等に限
るものではなく、Cu、Ag、Au。Furthermore, in the fourth embodiment, the metal film is not limited to A, W, etc., but may be Cu, Ag, or Au.
Pt、Pd、Ni、Mo又はCrを主体とする金属であ
ってもよい。さらに、金属窒化物層の金属はTiに限ら
ず、Ti、Zr、Hf、Ta又はNbを主体とする金属
であればよい。その他、本発明の要旨を逸脱しない範囲
で、種々変形して実施することができる。It may be a metal mainly composed of Pt, Pd, Ni, Mo, or Cr. Further, the metal of the metal nitride layer is not limited to Ti, but may be any metal containing Ti, Zr, Hf, Ta, or Nb as a main component. In addition, various modifications can be made without departing from the gist of the present invention.
[発明の効果]
以上詳述したように本発明によれば、CVD法において
、金属ハロゲン化合物ガスと硅素−水素化合物ガスを含
有する水素ガスとの混合ガスを用いることにより、金属
窒化物層上に低抵抗金属膜を再現性良く短時間で、且つ
段差被覆性良く形成することができる。従って、配線層
の信頼性向上及び半導体装置のスルーブツト向上をはか
り得る。また、金属窒化物層を窒素過剰に形成すること
により、金属膜と下地基板との反応を確実に防止するこ
とができ、信頼性の高い金属/Siコンタクトを実現す
ることができ、その有用性は絶大である。[Effects of the Invention] As detailed above, according to the present invention, in the CVD method, by using a mixed gas of a metal halide compound gas and a hydrogen gas containing a silicon-hydrogen compound gas, a metal nitride layer can be coated. A low resistance metal film can be formed with good reproducibility in a short time and with good step coverage. Therefore, it is possible to improve the reliability of the wiring layer and the throughput of the semiconductor device. In addition, by forming the metal nitride layer with an excess of nitrogen, it is possible to reliably prevent the reaction between the metal film and the underlying substrate, making it possible to realize a highly reliable metal/Si contact. is enormous.
第1図は本発明の第1の実施例方法に係わる半導体装置
の製造工程を示す断面図、第2図は上記実施例に用いた
CVD装置を示す概略構成図、第3図はSiH4添加に
よるwl堆積速度の変化を示す特性図、第4図は第2の
実施例方法を説明するための工程断面図、第5図は第3
の実施例方法を説明するための工程断面図、第6図は第
4の実施例方法を説明するための工程断面図、第7図は
N/Ti比に対する接合リーク電流の変化を示す特性図
である。
11.41.51・・・St基板、12,43゜55・
・・Si02膜(絶縁膜) 、13,45.54・・・
TiNl1i(金属窒化物層) 、14,46,47゜
57−W膜(金属膜) 、42 * 52 ・・・n
十層、44.56・・・開口部、53・・・T i S
i 2 @。
出願人代理人 弁理士 鈴江武彦
第1図
第2図
第5図
第3図
第6図
第7図FIG. 1 is a sectional view showing the manufacturing process of a semiconductor device according to the method of the first embodiment of the present invention, FIG. 2 is a schematic configuration diagram showing the CVD equipment used in the above embodiment, and FIG. 3 is a A characteristic diagram showing changes in wl deposition rate, FIG. 4 is a process cross-sectional view for explaining the method of the second embodiment, and FIG.
6 is a process cross-sectional view for explaining the method of the fourth example, and FIG. 7 is a characteristic diagram showing changes in junction leakage current with respect to N/Ti ratio. It is. 11.41.51...St substrate, 12,43°55.
...Si02 film (insulating film), 13,45.54...
TiNl1i (metal nitride layer), 14,46,47°57-W film (metal film), 42*52...n
Ten layers, 44.56...opening, 53...T i S
i 2 @. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 5 Figure 3 Figure 6 Figure 7
Claims (9)
成する工程を含む半導体装置の製造方法において、金属
ハロゲン化合物ガスと硅素−水素化合物ガスを含有する
水素ガスとの混合ガスを用いた化学気相成長法によって
、前記金属膜を前記金属窒化物層上に堆積することを特
徴とする半導体装置の製造方法。(1) In a method for manufacturing a semiconductor device that includes a step of forming a metal film on a semiconductor substrate via a metal nitride layer, a mixed gas of a metal halide gas and a hydrogen gas containing a silicon-hydrogen compound gas is used. A method of manufacturing a semiconductor device, characterized in that the metal film is deposited on the metal nitride layer by a chemical vapor deposition method.
Nb、Ta、Mo又はWであることを特徴とする特許請
求の範囲第1項記載の半導体装置の製造方法。(2) The metal of the metal nitride layer is Ti, Zr, Hf,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the material is Nb, Ta, Mo, or W.
oF_6であることを特徴とする特許請求の範囲第1項
記載の半導体装置の製造方法。(3) The metal halide gas is WF_6 or M
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is oF_6.
_2H_6又はSi_3H_8であることを特徴とする
特許請求の範囲第1項記載の半導体装置の製造方法。(4) The silicon-hydrogen compound gas is SiH_4, Si
The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is _2H_6 or Si_3H_8.
は絶縁膜が形成されていることを特徴とする特許請求の
範囲第1項記載の半導体装置の製造方法。(5) The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate has a diffusion layer, a metal film, or an insulating film formed on its surface.
成する工程を含む半導体装置の製造方法において、前記
金属窒化物層をその初期平均組成が該金属窒化物の金属
−窒素間で形成される最も窒素成分の多い金属窒化物よ
りも窒素成分が過剰となるように形成したことを特徴と
する半導体装置の製造方法。(6) In a method for manufacturing a semiconductor device including a step of forming a metal film on a semiconductor substrate via a metal nitride layer, the metal nitride layer is formed such that the initial average composition is between the metal and nitrogen of the metal nitride. A method for manufacturing a semiconductor device, characterized in that the metal nitride is formed so that the nitrogen component is in excess of that of the metal nitride containing the highest nitrogen component.
窒化に伴う自由エネルギーの低下が小さいことを特徴と
する特許請求の範囲第6項記載の半導体装置の製造方法
。(7) The method of manufacturing a semiconductor device according to claim 6, wherein the metal film has a smaller reduction in free energy due to nitridation than the metal of the metal nitride layer.
Pd、Ni、W、Mo又はCrを主体とする金属である
ことを特徴とする特許請求の範囲第6項記載の半導体装
置の製造方法。(8) The metal film may include Al, Cu, Ag, Au, Pt,
7. The method of manufacturing a semiconductor device according to claim 6, wherein the metal is mainly Pd, Ni, W, Mo, or Cr.
Ta又はNbを主体とする金属であることを特徴とする
特許請求の範囲第6項記載の半導体装置の製造方法。(9) The metal of the metal nitride layer is Ti, Zr, Hf,
7. The method of manufacturing a semiconductor device according to claim 6, wherein the metal is mainly Ta or Nb.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP62104520A JP2542617B2 (en) | 1987-04-30 | 1987-04-30 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62104520A JP2542617B2 (en) | 1987-04-30 | 1987-04-30 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
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JPS63272049A true JPS63272049A (en) | 1988-11-09 |
JP2542617B2 JP2542617B2 (en) | 1996-10-09 |
Family
ID=14382767
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Application Number | Title | Priority Date | Filing Date |
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JP62104520A Expired - Lifetime JP2542617B2 (en) | 1987-04-30 | 1987-04-30 | Method for manufacturing semiconductor device |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02251139A (en) * | 1989-03-24 | 1990-10-08 | Fujitsu Ltd | Manufacture of semiconductor device |
EP0689231A3 (en) * | 1989-08-25 | 1997-06-04 | Applied Materials Inc | Process for deposition of a tungsten layer on a semi-conductor wafer |
JP2002524850A (en) * | 1998-08-31 | 2002-08-06 | インフィネオン テクノロジース アクチエンゲゼルシャフト | Microelectronic structure, method of manufacture thereof and its use in memory cells |
US6879043B2 (en) | 2000-10-30 | 2005-04-12 | Matsushita Electric Industrial Co., Ltd. | Electrode structure and method for fabricating the same |
CN111566786A (en) * | 2017-12-14 | 2020-08-21 | 应用材料公司 | Method for etching metal oxide with less etching residue |
-
1987
- 1987-04-30 JP JP62104520A patent/JP2542617B2/en not_active Expired - Lifetime
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02251139A (en) * | 1989-03-24 | 1990-10-08 | Fujitsu Ltd | Manufacture of semiconductor device |
EP0689231A3 (en) * | 1989-08-25 | 1997-06-04 | Applied Materials Inc | Process for deposition of a tungsten layer on a semi-conductor wafer |
EP0689232A3 (en) * | 1989-08-25 | 1997-06-04 | Applied Materials Inc | Process for deposition of a tungsten layer on a semiconductor wafer |
JP2002524850A (en) * | 1998-08-31 | 2002-08-06 | インフィネオン テクノロジース アクチエンゲゼルシャフト | Microelectronic structure, method of manufacture thereof and its use in memory cells |
US6879043B2 (en) | 2000-10-30 | 2005-04-12 | Matsushita Electric Industrial Co., Ltd. | Electrode structure and method for fabricating the same |
CN111566786A (en) * | 2017-12-14 | 2020-08-21 | 应用材料公司 | Method for etching metal oxide with less etching residue |
CN111566786B (en) * | 2017-12-14 | 2024-03-15 | 应用材料公司 | Method for etching metal oxide with less etching residue |
Also Published As
Publication number | Publication date |
---|---|
JP2542617B2 (en) | 1996-10-09 |
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