JPS63271969A - Solid-state image sensor - Google Patents
Solid-state image sensorInfo
- Publication number
- JPS63271969A JPS63271969A JP62109955A JP10995587A JPS63271969A JP S63271969 A JPS63271969 A JP S63271969A JP 62109955 A JP62109955 A JP 62109955A JP 10995587 A JP10995587 A JP 10995587A JP S63271969 A JPS63271969 A JP S63271969A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- solid
- sealing resin
- optical member
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 238000007789 sealing Methods 0.000 claims abstract description 21
- 229920005989 resin Polymers 0.000 claims abstract description 20
- 239000011347 resin Substances 0.000 claims abstract description 20
- 230000002093 peripheral effect Effects 0.000 claims abstract description 13
- 238000003384 imaging method Methods 0.000 claims description 12
- 238000000034 method Methods 0.000 abstract 2
- 230000000694 effects Effects 0.000 description 9
- 239000011521 glass Substances 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 230000008602 contraction Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、固体撮像素子に係わり、特に実装構成に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state image sensor, and particularly to a mounting configuration.
現在、固体撮像素子としては、COD、BBD等の電荷
転送素子を用いるものや、MOSトランジスタを用いる
ものなどが広く知られている。また、これら固体撮像素
子は電荷転送時に電荷の洩れがあること、光検出度が低
いこと、集積度が上がらないことなどの欠点があった。Currently, solid-state imaging devices that use charge transfer devices such as COD and BBD, and devices that use MOS transistors are widely known. Further, these solid-state image sensing devices have drawbacks such as charge leakage during charge transfer, low light detection, and difficulty in increasing the degree of integration.
この問題を一挙に解決するものとして静電誘導型トラン
ジスタ(S tatic I nduction T
rans−istor;略して5IT)を用いる固体
撮像素子も数々提案されている。Static induction transistors are designed to solve this problem all at once.
A number of solid-state imaging devices using a rans-istor (abbreviated as 5IT) have also been proposed.
上記固体撮像素子は、スチールカメラ、電子カメラ、V
TRカメラ及び自動分析装置などに広く用いられている
。固体撮像素子は画素の高密度と実装密度などの向上に
よる素子自体の小型化が要望されている0例えば、VT
Rデツキとカメラが一体化された一体型VTRカメラ。The above-mentioned solid-state image sensor can be used for still cameras, electronic cameras, V
Widely used in TR cameras and automatic analysis devices. For solid-state image sensors, there is a demand for miniaturization of the device itself due to improvements in pixel density and packaging density.For example, VT
An all-in-one VTR camera that combines an R deck and a camera.
8 w V T Rカメラ、固体撮像素子を用いた内視
鏡(電子スコープ)等においては、装置の小型化を図る
ために他の電子・機能部品と同様に小型化が強く要望さ
れている。従って、これら種々の要請に沿って、例えば
チップサイズやパンケージサイズなどの小型化の開発が
進められている。最近では、上記要請に対処するために
、第6図に示すようなセラミックなどの基体に半導体チ
ップを設け、この半導体チップの表面に光学部材を接着
したものがある。In 8W VTR cameras, endoscopes (electronic scopes) using solid-state image sensors, and the like, there is a strong demand for miniaturization, as with other electronic and functional components, in order to miniaturize the devices. Therefore, in line with these various demands, development of miniaturization, such as chip size and pancage size, is progressing. Recently, in order to meet the above requirements, there has been a device as shown in FIG. 6 in which a semiconductor chip is provided on a substrate such as ceramic, and an optical member is bonded to the surface of this semiconductor chip.
第6図は従来の固体撮像素子71の一例を示す断面図で
ある。光電変換部や周辺回路等が形成された半導体チッ
プ72は、セラミックなどで形成された基体73にダイ
ボンドされている。半導体チップ72の表面に形成され
たパターン(図示せず)と基体73の側面に形成したリ
ード・パターン74の延長上にある配線パターン(図示
せず)をボンディング・ワイヤ75で接続しである。半
導体チップ72の表面には、表面保護用のガラスなどの
透明板またはカラーフィルタ等の光学部材76が接着さ
れている。更に、上記半導体チップ72やボンディング
・ワイヤ75の保護のために、半導体チップ72と光学
部材76の外周面に沿って封止樹脂77によってボンテ
ィング封止されている。FIG. 6 is a cross-sectional view showing an example of a conventional solid-state image sensor 71. A semiconductor chip 72 on which a photoelectric conversion section, peripheral circuits, etc. are formed is die-bonded to a base body 73 made of ceramic or the like. A bonding wire 75 connects a pattern (not shown) formed on the surface of the semiconductor chip 72 and a wiring pattern (not shown) extending from a lead pattern 74 formed on the side surface of the base 73. An optical member 76 such as a transparent plate such as glass or a color filter for surface protection is adhered to the surface of the semiconductor chip 72 . Further, in order to protect the semiconductor chip 72 and the bonding wires 75, the semiconductor chip 72 and the optical member 76 are bonded and sealed along the outer peripheral surfaces thereof with a sealing resin 77.
〔発明が解決しようとする問題点〕
上記の従来の固体撮像素子71においては、封止樹脂7
7が経時変化によって矢印方向Aに収縮する。この収縮
する際に生ずる封止樹脂77の内部応力によって光学部
材76が半導体チップ72の表面より徐々に浮き上がり
剥離する問題があった。この原因が封止樹脂77の内部
応力によるためで、内部応力の少ない封止樹脂でボッテ
ィングすれば、上記欠点は解決できるものである。[Problems to be Solved by the Invention] In the conventional solid-state imaging device 71 described above, the sealing resin 7
7 contracts in the direction of the arrow A due to changes over time. There is a problem in that the optical member 76 gradually rises from the surface of the semiconductor chip 72 and peels off due to the internal stress of the sealing resin 77 that occurs during this contraction. This is due to the internal stress of the sealing resin 77, and the above-mentioned drawback can be solved by botting with a sealing resin that has less internal stress.
しかし、この内部応力の少ない封止樹脂は接着の強度が
弱いためボッティング封止の後の耐湿性が極端に悪くな
ると云う欠点があった。However, this sealing resin with low internal stress has a disadvantage in that its adhesive strength is weak, resulting in extremely poor moisture resistance after botting sealing.
この発明は、従来の固体撮像素子における上記の問題点
を解決するためになされたもので、耐湿性の優れた接着
強度の高い封止樹脂でボッティングしても半導体チップ
上の光学部材が剥離しない固体撮像素子を提供すること
を目的とする。This invention was made to solve the above-mentioned problems with conventional solid-state image sensors, and optical components on semiconductor chips do not peel off even when bonded with a sealing resin with excellent moisture resistance and high adhesive strength. The purpose of the present invention is to provide a solid-state image sensor that does not
〔問題点を解決するための手段および作用〕この発明は
、半導体チップの表面に光学部材を接着してなる固体撮
像素子において、上記光学部材の上表面側より外周面の
少なくとも一部分を面取りすることを特徴とする固体撮
像素子である。このように構成することによって封止樹
脂の収縮による内部応力の方向を斜め下方に向くように
させ光学部材が半導体チップに押し付けられ接着面が浮
き上がるのを防止するものである。[Means and effects for solving the problems] The present invention provides a solid-state imaging device in which an optical member is bonded to the surface of a semiconductor chip, in which at least a portion of the outer peripheral surface of the optical member is chamfered from the upper surface side. This is a solid-state image sensor characterized by: With this configuration, the direction of internal stress due to contraction of the sealing resin is directed diagonally downward, thereby preventing the optical member from being pressed against the semiconductor chip and lifting the adhesive surface.
以下、この発明を実施例に基づいて説明する。 Hereinafter, the present invention will be explained based on examples.
第1図(A)は、この発明に係わる固体撮像素子の第1
実施例を示す断面図、同図(B)は、この実施例のA部
分を拡大した断面図をそれぞれに示す、第1図(A)及
び(B)において、固体撮像素子11は従来例で示した
素子形態、すなわちCCD、BBD、MO3I−ランジ
スタ。FIG. 1(A) shows the first solid-state image sensor according to the present invention.
1A and 1B, the solid-state image sensor 11 is a conventional example. Device configurations shown: CCD, BBD, MO3I-transistor.
SITなどを用いている。これらの光電変換機能部また
は/及び周辺機能回路、例えばシフトレジスタ、クロッ
クパルス発生回路などの駆動回路や増幅回路など(いず
れも図示せず)が形成された半導体チップ12は、基体
13の凹部状の窪み部14のほぼ中央部に設けられてい
る。上記基体13は、LCC(リードレス・チップ・キ
ャリア)であり、ガラス入りエポキシ樹脂やセラミック
等から成る。この基体13の側面には、スルーホールに
配線パターンを施したり−ドパタ・−ン15が形成され
、このリード・パターン15が基体13の上表面16に
延在して配線パターン(図示せず)が形成されている。SIT etc. are used. The semiconductor chip 12 on which these photoelectric conversion functional parts and/or peripheral functional circuits, such as shift registers, drive circuits such as clock pulse generation circuits, amplifier circuits, etc. (none of which are shown) are formed, is located in the shape of a concave portion of the base 13. It is provided almost at the center of the recessed part 14. The base 13 is an LCC (leadless chip carrier) and is made of glass-filled epoxy resin, ceramic, or the like. A wiring pattern (not shown) is formed on the side surface of the base 13, and the lead pattern 15 extends to the upper surface 16 of the base 13 to form a wiring pattern (not shown). is formed.
この配線パターンと半導体チップ12の表面17に形成
された配線パターン(図示せず)とがボンディング・ワ
イヤ18によって接続されている。上記表面17には半
導体チップ12の表面保護用のガラスなどの透明板、又
はカラーフィルタからなる光学部材19が接着されてい
る。この光学部材19には、半導体チップ12と反対側
の光入射される上表面20より。This wiring pattern and a wiring pattern (not shown) formed on the surface 17 of the semiconductor chip 12 are connected by bonding wires 18. An optical member 19 made of a transparent plate such as glass or a color filter for protecting the surface of the semiconductor chip 12 is adhered to the surface 17 . This optical member 19 receives light from an upper surface 20 on the opposite side of the semiconductor chip 12 .
下方に向って、その外周面21の一部分または全部に亘
って面取り部22が形成されている。この面取り部22
は、光学部材19の厚さt1面取り量tc及び面取り角
度θとすると次の関係となる。A chamfered portion 22 is formed downwardly over part or all of the outer circumferential surface 21 . This chamfered portion 22
is the thickness t1 of the optical member 19, the amount of chamfering tc, and the chamfering angle θ, the following relationship is obtained.
面取り角度θは、およそ40°≦θ≦80”の範囲が良
いが、θ〉80°では後述する封止樹脂の収縮による内
部応力が矢印方向Bに示すように下方に向く作用が弱く
なる。また、θ〈40° となると光学部材19の受光
する有効面積が小さくなってしまうことになる。更に、
面取りNtCは、およそ0.3 t≦tc≦0.9tが
良く、tc<0.3tでは上記作用が薄れ、また、tc
>0.gtとなると光学部材19の下面側の稜NlA2
3がエツジとなりクランクを生じ易くなる恐れがある。The chamfering angle θ is preferably in the range of approximately 40°≦θ≦80″, but when θ>80°, the downward effect of internal stress due to contraction of the sealing resin, which will be described later, as shown in arrow direction B becomes weak. Furthermore, when θ<40°, the effective light receiving area of the optical member 19 becomes smaller.Furthermore,
Chamfering NtC is preferably approximately 0.3t≦tc≦0.9t, and when tc<0.3t, the above effect is weakened, and tc
>0. gt, the ridge NlA2 on the lower surface side of the optical member 19
3 may become an edge and easily cause a crank.
上記半導体チップ12及びボンディング・ワイヤ18の
保護のために、半導体チップ12と光学部材19の外周
面に沿って、例えば、エポキシ樹脂からなる封止樹脂2
4でボッティングされている。In order to protect the semiconductor chip 12 and the bonding wires 18, a sealing resin 2 made of, for example, epoxy resin is applied along the outer peripheral surfaces of the semiconductor chip 12 and the optical member 19.
Botted with 4.
この実施例によれば、封止樹脂24の収縮による内部応
力の方向を矢印方向已に示すように斜め下方に向くよう
にさせることができるので、光学部材19を半導体チッ
プ12に押し付ける作用を与えることができるので接着
面が浮き上がることを防止できる。According to this embodiment, the direction of the internal stress due to the contraction of the sealing resin 24 can be directed diagonally downward as shown in the direction of the arrow, so that the effect of pressing the optical member 19 against the semiconductor chip 12 is provided. This prevents the adhesive surface from lifting up.
次に、この発明に係わる固体撮像素子の他の実施例を説
明する。なお、以下の実施例においては、上記の第1実
施例と同様な機能を有する部材には同一の符号を付記し
てその説明は省略する。Next, another embodiment of the solid-state image sensing device according to the present invention will be described. In the following embodiments, members having the same functions as those in the first embodiment will be denoted by the same reference numerals, and their explanations will be omitted.
第2図は、この発明に係わる固体撮像素子の第2実施例
を示す断面図である。この実施例では上記の第1実施例
の光学部材19の面取り部22を変更したものである0
図において、光学部材19には、半導体チッブ12と反
対側の光入射される上表面20より下方に向って、その
外周面31の一部分または全部に亘って面取り部32が
形成されている。この面取り部32は凸部状の弯曲面が
形成されている。FIG. 2 is a sectional view showing a second embodiment of the solid-state imaging device according to the present invention. In this embodiment, the chamfered portion 22 of the optical member 19 of the first embodiment is modified.
In the figure, a chamfered portion 32 is formed in the optical member 19 over part or all of its outer circumferential surface 31 downward from the upper surface 20 on the side opposite to the semiconductor chip 12 where light is incident. This chamfered portion 32 is formed with a convex curved surface.
この実施例によれば、上記の第1実施例と同様の効果を
得ると共に、上記面取り部32が略円弧状になっている
ので、封止樹脂24の収縮時における内部応力を半導体
チップ12に向って下方に平均的に分散することができ
る。According to this embodiment, the same effect as the first embodiment described above is obtained, and since the chamfered portion 32 has a substantially arc shape, the internal stress generated when the sealing resin 24 contracts is transferred to the semiconductor chip 12. The average distribution can be distributed downwardly.
第3図は、この発明に係わる固体撮像素子の第3実施例
を示す断面図である。この実施例では第1実施例の光学
部材19の面取り部22を変更したものである0図にお
いて、光学部材19には半導体チップ12と反対側の光
入射される上表面20より下方に向って、その外周面4
1の一部分または全部に亘って面取り部42が形成され
ている。FIG. 3 is a sectional view showing a third embodiment of the solid-state image sensing device according to the present invention. In this embodiment, the chamfered portion 22 of the optical member 19 of the first embodiment is modified. In FIG. , its outer peripheral surface 4
A chamfered portion 42 is formed over a part or all of 1.
この面取り部42は凹部状の変曲面で形成されている。The chamfered portion 42 is formed of a concave curved surface.
この実施例によれば上記の第1.第2実施例と同様な効
果を得ることができる。According to this embodiment, the above first. The same effects as in the second embodiment can be obtained.
第4図及び第5図は、この発明に係わる固体撮像素子の
更に他の第4及び第5実施例をそれぞれに示す断面図で
ある。これら実施例は、基体の形態を変更したものであ
り、光学部材は第1実施例と同様なものを用いている。FIGS. 4 and 5 are cross-sectional views respectively showing further fourth and fifth embodiments of the solid-state imaging device according to the present invention. In these embodiments, the shape of the base body is changed, and the same optical members as in the first embodiment are used.
第4図において、ガラス入りエポキシ樹脂やセラミック
等で形成された基体51の側面にはリード・パターン(
図示せず)が形成され、このリード・パターンには外部
リード52が接続されている。この外部リード52はプ
リント回路基板に設けられた配線穴(スルーホール)に
挿入し半田付けをしたり、又はICソケットに入れて所
定の電気的な接続がされる。In FIG. 4, a lead pattern (
(not shown) is formed, and external leads 52 are connected to this lead pattern. This external lead 52 is inserted into a wiring hole (through hole) provided in a printed circuit board and soldered, or inserted into an IC socket to make a predetermined electrical connection.
この実施例によれば、上記の第1実施例の効果に加えて
、固体撮像素子11のプリント回路基板などへの適用範
囲が拡大される。According to this embodiment, in addition to the effects of the first embodiment described above, the scope of application of the solid-state image sensor 11 to printed circuit boards and the like is expanded.
第5図において、この実施例はガラス入りエポキシ樹脂
やセラミック等で形成された基体61にピン62を設け
、PGA (ピン・グリッド・アレイ)タイプにしたも
のである。この実施例は、上記の第4実施例と同様の適
用と効果を得るものである。In FIG. 5, this embodiment is a PGA (pin grid array) type in which pins 62 are provided on a base 61 made of glass-filled epoxy resin, ceramic, or the like. This embodiment obtains the same application and effect as the fourth embodiment described above.
この発明は、上記の種々の実施例に限定されるものでは
なく、幾多の変形又は変更ができるものである0例えば
、固体撮像素子として多数の画素を高密度に集積した、
いわゆるマトリックス状のアレイに限らず画素を一列に
配列したライン状の固体撮像素子でもよい。The present invention is not limited to the various embodiments described above, and can be modified or modified in many ways.
It is not limited to a so-called matrix array, and may be a line-shaped solid-state image sensor in which pixels are arranged in a line.
更に、単体の光電変換素子に用いてもよい。Furthermore, it may be used as a single photoelectric conversion element.
また、半導体チップと光学部材の形態の関係においても
、それぞれ略円形1円形、矩形状、多角形状などの形状
を必要に応じて適宜に組み合わせてもよい、また、当然
のことながら、固体撮像素子の外観形状も同様である。In addition, regarding the relationship between the shapes of the semiconductor chip and the optical member, shapes such as approximately circular, rectangular, polygonal, etc. may be appropriately combined as necessary. The external shape is also the same.
更に、光学部材に面取りを形成する場合は、例えば矩形
状のものにおいては、少なくともその一側面を面取りす
るか又は対向する二側面を面取りすることも可能である
。Further, when forming a chamfer on an optical member, for example, in the case of a rectangular optical member, it is possible to chamfer at least one side of the optical member or chamfer two opposing sides.
更に、上記の種々の実施例においては、単一の光学部材
を用いたが、複数枚の光学部材の組み合わせ、例えばカ
ラー・ストライプフィルタと透明な保護用のガラス板の
接合体であっても、これらの接着後に面取りを形成して
もよい。Furthermore, in the various embodiments described above, a single optical member was used, but even if a combination of multiple optical members is used, such as a combination of a color stripe filter and a transparent protective glass plate, Chamfers may be formed after these are bonded.
この発明に係わる固体撮像素子によれば、封止樹脂の経
時変化による収縮で生ずる内部応力を半導体チップに対
して斜め下方に向かせることができるので、耐湿性の高
い封止樹脂を用いることが可能である。従って、半導体
チップに接着された光学部材が浮き上がらず、更に#I
#が起らず、しかも小型化が可能な固体撮像素子を得る
ことができる。According to the solid-state imaging device according to the present invention, internal stress caused by shrinkage of the sealing resin over time can be directed diagonally downward with respect to the semiconductor chip, making it possible to use a sealing resin with high moisture resistance. It is possible. Therefore, the optical member bonded to the semiconductor chip is not lifted up, and the #I
It is possible to obtain a solid-state imaging device that does not cause # and can be miniaturized.
11・−・・−−−−m−固体撮像素子、12・−・・
−・・・・・半導体チップ13.51.61−・・−・
−・−基体、 20−・−・−・・・上表面21.31
.41・・−・・−・〜・外周面、22,32.42・
・・−・−・−面取り師弟1図(A)及び(B)は、こ
の発明に係わる固体撮像素子の第1実施例を示す断面図
及び部分拡大図、
第2図は、該固体撮像素子の第2実施例を示す断面図、
第3図は、該固体撮像素子の第3実施例を示す断面図、
第4図は、該固体撮像素子の第4実施例を示す断面図、
第5図は該固体撮像素子の第5実施例を示す断面図、
第6図は、従来の固体撮像素子の断面図をそれぞれに示
す。11...---m-solid-state image sensor, 12...
-...Semiconductor chip 13.51.61-...
-・-Base, 20-・-・・・Top surface 21.31
.. 41・・・・・・〜・Outer peripheral surface, 22, 32.42・
...------ Chamfer master and disciple 1 Figures (A) and (B) are a sectional view and partially enlarged view showing a first embodiment of a solid-state image sensor according to the present invention, and Figure 2 is a diagram showing the solid-state image sensor according to the first embodiment. 3 is a sectional view showing a third embodiment of the solid-state imaging device; FIG. 4 is a sectional view showing a fourth embodiment of the solid-state imaging device; The figure shows a cross-sectional view of a fifth embodiment of the solid-state image sensor, and FIG. 6 shows a cross-sectional view of a conventional solid-state image sensor.
Claims (1)
子において、基体の表面にダイボンドした半導体チップ
と、上表面側より外周面の少なくとも一部分に面取り部
を形成した光学部材と、上記光学部材の外周面に施した
封止樹脂とを備え上記封止樹脂の収縮の際に生ずる内部
応力を上記半導体チップに対して斜め下方に向くように
したことを特徴とする固体撮像素子。In a solid-state imaging device in which an optical member is bonded to the surface of a semiconductor chip, the semiconductor chip is die-bonded to the surface of a base body, the optical member has a chamfered portion formed on at least a portion of the outer peripheral surface from the upper surface side, and the outer peripheral surface of the optical member. A solid-state imaging device, comprising: a sealing resin applied to the semiconductor chip, and the internal stress generated when the sealing resin contracts is directed diagonally downward with respect to the semiconductor chip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62109955A JPS63271969A (en) | 1987-04-29 | 1987-04-29 | Solid-state image sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62109955A JPS63271969A (en) | 1987-04-29 | 1987-04-29 | Solid-state image sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63271969A true JPS63271969A (en) | 1988-11-09 |
Family
ID=14523368
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62109955A Pending JPS63271969A (en) | 1987-04-29 | 1987-04-29 | Solid-state image sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63271969A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0423469A (en) * | 1990-05-18 | 1992-01-27 | Toshiba Corp | Solid-state image sensor module |
US6172962B1 (en) | 1997-12-16 | 2001-01-09 | Matsushita Electric Industrial Co., Ltd. | Disk cartridge with finger-like holding members and three-part supporting feature |
JP2007142194A (en) * | 2005-11-18 | 2007-06-07 | Matsushita Electric Ind Co Ltd | Solid-state image pickup device |
JP2007173483A (en) * | 2005-12-21 | 2007-07-05 | Sanyo Electric Co Ltd | Semiconductor device, its manufacturing method, and camera module |
US7616250B2 (en) | 2004-07-27 | 2009-11-10 | Fujitsu Microelectronics Limited | Image capturing device |
WO2010086926A1 (en) * | 2009-01-30 | 2010-08-05 | パナソニック株式会社 | Optical device and method for manufacturing same |
WO2011141976A1 (en) * | 2010-05-12 | 2011-11-17 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
US9693462B2 (en) | 2014-11-17 | 2017-06-27 | Mitsubishi Electric Corporation | Printed circuit board |
-
1987
- 1987-04-29 JP JP62109955A patent/JPS63271969A/en active Pending
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0423469A (en) * | 1990-05-18 | 1992-01-27 | Toshiba Corp | Solid-state image sensor module |
US6430147B1 (en) | 1997-12-16 | 2002-08-06 | Matushita Electric Industrial Co., Ltd. | Disk cartridge and adapter |
US6288999B1 (en) | 1997-12-16 | 2001-09-11 | Matsushita Electric Industrial Co., Ltd | Disk cartridge and adapter |
US6351450B1 (en) | 1997-12-16 | 2002-02-26 | Matsushita Electric Industrial Co., Ltd. | Disk cartridge and adapter |
US6392987B1 (en) | 1997-12-16 | 2002-05-21 | Matsushita Electric Industrial Co., Ltd. | Disk cartridge and adapter with locking and misinsertion preventing mechanism for the cover |
US6172962B1 (en) | 1997-12-16 | 2001-01-09 | Matsushita Electric Industrial Co., Ltd. | Disk cartridge with finger-like holding members and three-part supporting feature |
US6215761B1 (en) | 1997-12-16 | 2001-04-10 | Matsushita Electric Industrial Co., Ltd. | Disk cartridge |
US7616250B2 (en) | 2004-07-27 | 2009-11-10 | Fujitsu Microelectronics Limited | Image capturing device |
JP2007142194A (en) * | 2005-11-18 | 2007-06-07 | Matsushita Electric Ind Co Ltd | Solid-state image pickup device |
JP2007173483A (en) * | 2005-12-21 | 2007-07-05 | Sanyo Electric Co Ltd | Semiconductor device, its manufacturing method, and camera module |
WO2010086926A1 (en) * | 2009-01-30 | 2010-08-05 | パナソニック株式会社 | Optical device and method for manufacturing same |
JP2010177569A (en) * | 2009-01-30 | 2010-08-12 | Panasonic Corp | Optical device and method of manufacturing the same |
CN102138215A (en) * | 2009-01-30 | 2011-07-27 | 松下电器产业株式会社 | Optical device and method for manufacturing same |
WO2011141976A1 (en) * | 2010-05-12 | 2011-11-17 | パナソニック株式会社 | Semiconductor device and method for manufacturing same |
US9693462B2 (en) | 2014-11-17 | 2017-06-27 | Mitsubishi Electric Corporation | Printed circuit board |
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