WO2011141976A1 - Semiconductor device and method for manufacturing same - Google Patents

Semiconductor device and method for manufacturing same Download PDF

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Publication number
WO2011141976A1
WO2011141976A1 PCT/JP2010/007279 JP2010007279W WO2011141976A1 WO 2011141976 A1 WO2011141976 A1 WO 2011141976A1 JP 2010007279 W JP2010007279 W JP 2010007279W WO 2011141976 A1 WO2011141976 A1 WO 2011141976A1
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WO
WIPO (PCT)
Prior art keywords
resin layer
semiconductor device
semiconductor substrate
electrode
semiconductor
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Application number
PCT/JP2010/007279
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French (fr)
Japanese (ja)
Inventor
井上　大輔
恭子 藤井
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パナソニック株式会社
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Publication of WO2011141976A1 publication Critical patent/WO2011141976A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Definitions

  • the present invention relates to a semiconductor device having an optical element and a method for manufacturing the same.
  • FIG. 10 is a cross-sectional view showing the structure of a solid-state imaging device having a conventional wafer level CSP structure.
  • a conventional solid-state imaging device 100 ⁇ / b> A is provided around a semiconductor element 101, an imaging element 102 provided on the main surface of the semiconductor element 101, a microlens 103 provided on the imaging element 102, and the periphery of the imaging element 102.
  • a solid-state imaging device 100 including a peripheral circuit region 104A and an electrode wiring 104B electrically connected to the peripheral circuit region 104A is provided.
  • a light transmitting plate 106 made of, for example, optical glass is provided on the main surface of the semiconductor element 101 with an adhesive layer 105 interposed therebetween. Further, a through electrode 107 that penetrates the semiconductor element 101 in the thickness direction is provided inside the semiconductor element 101.
  • the back surface of the semiconductor element 101 covers the metal wiring 108 electrically connected to the through electrode 107, covers the back surface of the semiconductor element 101 and part of the metal wiring 108, and has an opening in the other part of the metal wiring 108.
  • an external electrode 110 made of, for example, solder and provided in an opening of the insulating layer 109 and electrically connected to the metal wiring 108.
  • the imaging element 102 and the external electrode 110 are electrically connected through the peripheral circuit region 104A, the electrode wiring 104B, the through electrode 107, and the metal wiring 108. Therefore, the received light signal can be taken out to a flip chip substrate or the like.
  • the light receiving element for optical pickup of Blu-Ray employs a structure in which a through hole is formed on the light receiving part and the light receiving part is completely opened (for example, see Patent Document 2).
  • outgas is generated from the adhesive layer due to the heat history of the subsequent manufacturing process and the heat generation of the drive circuit after mounting. Fill in the cavity.
  • outgas particles are deposited on the glass surface due to the optical tweezer effect of the light beam and image characteristics deteriorate.
  • An object of the present invention is to solve the above-described conventional problems, and to provide a semiconductor device that can prevent excessive damage of a dicing blade and has a high yield, and a manufacturing method thereof.
  • a semiconductor device of the present invention includes a semiconductor substrate, an optical element provided on the surface of the semiconductor substrate, and the semiconductor element so as to cover the optical element on the surface of the semiconductor substrate.
  • a first resin layer provided in a region smaller than a surface of the substrate; and a second resin layer provided on the surface of the semiconductor substrate so as to cover a side surface of the first resin layer.
  • the first resin layer is provided so as to cover the optical element, the optical element can be protected from external factors such as dust adhesion and humidity change. Therefore, a semiconductor device that operates with high accuracy can be realized. Further, since the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, cost reduction can be expected. In addition, in the dicing process in which a plurality of semiconductor devices are singulated at the time of manufacture, compared to a configuration in which a light-transmitting plate is attached to a semiconductor substrate via an adhesive layer, individual pieces are obtained by dicing only the second resin layer and the semiconductor substrate. Chip chipping and excessive damage of the dicing blade can be prevented, and a semiconductor device with high yield can be provided.
  • the hardness of the second resin layer may be higher than the hardness of the first resin layer.
  • the first resin layer may be a silicone resin that is transparent to visible light.
  • the silicone resin is soft (generally shore strength D20 to 60)
  • the second resin layer is provided so as to cover the side surface of the first resin layer
  • the semiconductor device can be manufactured without the dicing blade dicing the first resin layer. Accordingly, chipping of individual chips and excessive damage of the dicing blade can be prevented, and a semiconductor device with high yield can be provided.
  • the semiconductor device preferably has an opening extending from the surface of the first resin layer to the upper surface of the second resin layer, and a part of the surface of the first resin layer is exposed. .
  • the first resin layer and the second resin layer can be arranged according to the required performance, it is possible to provide a semiconductor device having a high yield while preventing deterioration of optical characteristics.
  • the glass transition temperature Tg of the second resin layer may be 70 ° C. ⁇ Tg ⁇ 200 ° C.
  • the second resin layer may further cover a surface end portion of the first resin layer.
  • the second resin layer is formed thicker in the thickness direction of the semiconductor substrate than the first resin layer, and the region of the second resin layer formed thicker than the first resin layer is formed.
  • the angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate may be 80 ° or less.
  • the mold can be easily removed.
  • the angle formed by the inner wall of the second resin layer in the region of the second resin layer formed thicker than the first resin layer and the surface of the semiconductor substrate may be 45 ° or less. good.
  • the surface of the first resin layer may have a curvature.
  • the uncollimated light beam incident on the semiconductor device is efficiently condensed on the optical element. Further, the uncollimated light beam emitted from the optical element can be efficiently taken out of the semiconductor device. Therefore, the optical characteristics of the semiconductor device are improved.
  • the uncollimated light beam incident on the semiconductor device is condensed, so that the stray light reflected on the inner wall of the second resin layer in the region formed thicker than the first resin layer is incident on the optical element. Can be further prevented. Therefore, the optical characteristics of the semiconductor device are further improved.
  • the second resin layer may be opaque to visible light.
  • the end surface of the semiconductor substrate and the end surface of the second resin layer may be substantially flush with each other.
  • the semiconductor device can be manufactured by dicing that separates a wafer on which a plurality of semiconductor devices are formed.
  • an antireflection film that covers the inner wall of the second resin layer and prevents reflection of visible light may be provided.
  • the surface of the second resin layer may be flat.
  • an electrode region provided on the surface of the semiconductor substrate for transmitting a signal from the optical element or transmitting a signal to the optical element, and a through hole penetrating the semiconductor substrate in the thickness direction
  • a through electrode provided on the inner wall of the through hole and in contact with the back surface of the electrode region and extending to the back surface of the semiconductor substrate.
  • you may provide the filling layer with which the inside of the said through-hole was filled.
  • an insulating layer that covers the back surface of the semiconductor substrate except for a part on the through electrode may be provided.
  • an external electrode may be provided that is provided in a portion where the insulating layer on the through electrode is not covered and is electrically connected to the through electrode.
  • the semiconductor device of the present invention includes a semiconductor substrate, a plurality of optical elements provided on the surface of the semiconductor substrate, and a surface of the semiconductor substrate so as to cover the plurality of optical elements on the surface of the semiconductor substrate.
  • the method for manufacturing a semiconductor device of the present invention includes a step of preparing a semiconductor substrate having an optical element on a surface thereof, and a region smaller than the surface of the semiconductor substrate so as to cover the optical element on the surface of the semiconductor substrate.
  • a step (a) of forming a first resin layer, a step (b) of forming a second resin layer on the surface of the semiconductor substrate so as to cover the first resin layer, and the second resin layer And a step (c) of opening the side surface of the first resin layer so as not to be exposed.
  • the first resin layer is provided so as to cover the optical element, the optical element can be protected from external factors such as dust adhesion and humidity change. Therefore, a semiconductor device that operates with high accuracy can be realized. Further, since the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, cost reduction can be expected.
  • the dicing process in which a plurality of semiconductor devices are singulated at the time of manufacture, compared to a configuration in which a light-transmitting plate is attached to a semiconductor substrate via an adhesive layer, individual pieces are obtained by dicing only the second resin layer and the semiconductor substrate. Chip manufacturing and excessive damage of the dicing blade can be prevented, and a method for manufacturing a semiconductor device with high yield can be provided.
  • the second resin layer may be opened so that an angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate is 80 ° or less.
  • the second resin layer may be opened so that an angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate is 45 ° or less.
  • a step of making the second resin layer opaque to visible light may be further included.
  • the semiconductor substrate has an electrode region on the surface for transmitting a signal from the optical element or transmitting a signal to the optical element
  • the method for manufacturing a semiconductor device further includes: Forming a through-hole penetrating in the vertical direction and forming a through-electrode on the inner wall of the through-hole formed so as to contact the back surface of the electrode region and extend to the back surface of the semiconductor substrate.
  • a filling layer may be further filled in the through hole.
  • a step (d) of forming an insulating layer covering the back surface of the semiconductor substrate, excluding a part on the through electrode may be included.
  • a step (e) of forming an external electrode electrically connected to the through electrode in a portion where the insulating layer on the through electrode is not covered may be included.
  • step (a), the step (b), the step (d), the step (c), and the step (e) may be performed in this order.
  • the second resin layer covers the surface of the semiconductor substrate, so that a plurality of semiconductor substrates can be accurately supported when the through electrode is formed.
  • the second resin layer can be accurately formed by forming the external terminal last.
  • step (a) the step (b) and the step (c) may be performed simultaneously.
  • the step (a) may be performed after the step (b) and the step (c).
  • the first resin layer having a curvature on the surface can be formed. Therefore, the uncollimated light beam incident on the semiconductor device is efficiently condensed on the optical element. Further, the uncollimated light beam emitted from the optical element can be efficiently taken out of the semiconductor device. Therefore, the optical characteristics of the semiconductor device are improved.
  • the first resin layer included in each semiconductor device of the wafer which is an assembly of a plurality of semiconductor devices, can be manufactured with an arbitrary thickness.
  • the glass transition temperature Tg of the second resin layer is 70 ° C. ⁇ Tg ⁇ 200 ° C., and the method for manufacturing the semiconductor device further includes dicing the second resin layer formed in the step (b). A step of dicing by contacting the blade may be included.
  • the present invention can provide a high yield semiconductor device and a method for manufacturing the same that can prevent excessive damage of the dicing blade.
  • FIG. 1A is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment.
  • FIG. 1B is a perspective view illustrating an example of a structure of a semiconductor device.
  • FIG. 1C is a perspective view illustrating another example of the structure of the semiconductor device.
  • FIG. 2A is a diagram for explaining an example of a method of manufacturing a semiconductor device.
  • FIG. 2B is a diagram for explaining an example of a manufacturing method subsequent to FIG. 2A.
  • FIG. 2C is a diagram for explaining an example of a manufacturing method subsequent to FIG. 2B.
  • FIG. 2D is a diagram for explaining an example of a manufacturing method continued from FIG. 2C.
  • FIG. 1A is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment.
  • FIG. 1B is a perspective view illustrating an example of a structure of a semiconductor device.
  • FIG. 1C is a perspective view illustrating another example of the structure of the
  • FIG. 3A is a diagram for describing an example of a method of manufacturing a semiconductor device according to a variation of the first embodiment.
  • FIG. 3B is a diagram for explaining an example of a manufacturing method subsequent to FIG. 3A.
  • FIG. 4A is a cross-sectional view showing an example of the structure of the semiconductor device according to the second embodiment.
  • FIG. 4B is a perspective view illustrating an example of the structure of the semiconductor device.
  • FIG. 4C is a perspective view illustrating another example of the structure of the semiconductor device.
  • FIG. 5A is a diagram for describing an example of a method of manufacturing a semiconductor device.
  • FIG. 5B is a diagram for explaining an example of the manufacturing method continued from FIG. 5A.
  • FIG. 5C is a diagram for explaining an example of a manufacturing method subsequent to FIG. 5B.
  • FIG. 6 is a cross-sectional view illustrating another example of the structure of the semiconductor device.
  • FIG. 7 is a cross-sectional view showing still another example of the structure of the semiconductor device.
  • FIG. 8 is a cross-sectional view illustrating an example of the structure of a semiconductor device having an antireflection film.
  • FIG. 9 is a cross-sectional view illustrating an example of the structure of a semiconductor device having a plurality of light receiving portions.
  • FIG. 10 is a cross-sectional view showing the structure of a conventional solid-state imaging device.
  • the semiconductor device according to this embodiment is provided in a region smaller than the surface of the semiconductor substrate so as to cover the optical element on the surface of the semiconductor substrate, the optical element provided on the surface of the semiconductor substrate, and the surface of the semiconductor substrate. And a second resin layer provided on the surface of the semiconductor substrate so as to cover a side surface of the first resin layer. Thereby, excessive damage of the dicing blade at the time of manufacture can be prevented, and a high yield semiconductor device can be realized.
  • FIG. 1A is a cross-sectional view showing an example of the structure of the semiconductor device according to the present embodiment
  • FIG. 1B is a perspective view showing an example of the structure of the semiconductor device according to the present embodiment.
  • a semiconductor device 10 includes a semiconductor element 11, a light receiving unit 12 provided on the surface thereof, and a periphery of the light receiving unit 12.
  • a signal from the light receiving unit 12 Is larger than the region of the light receiving unit 12 and covers the edge of the semiconductor element 11 so as to cover the light receiving unit 12 and the peripheral circuit region 13 for processing the electrode, part of the electrode region 14 formed of a metal thin film such as Al, Cu, etc.
  • the first resin layer 15 that has receded inward from, for example, 50 to 2000 ⁇ m, preferably about 1000 ⁇ m, and the second resin layer 16 provided so as to cover the side surface of the first resin layer 15 are provided.
  • the semiconductor device 10 has an opening 17 so as to spread from the upper surface of the first resin layer 15 to the second resin layer 16, and the surface of the first resin layer 15, the side surface of the opening of the second resin layer 16, and the upper surface thereof. Is exposed. Further, the surface resin edge portion and a part of the periphery of the first resin layer 15 are covered with the second resin layer 16.
  • the area of the opening 17 where the first resin layer 15 is exposed is, for example, about 50 to 400 ⁇ m larger than the area of the light receiving unit 12, and preferably about 100 ⁇ m larger.
  • the surface of the resin layer 15 is narrower by about 50 to 400 ⁇ m, more preferably about 100 ⁇ m.
  • the second resin layer 16 is harder than the first resin layer 15 and has a thickness of 400 to 500 ⁇ m, for example.
  • the semiconductor device 10 that can protect the light receiving unit 12 and operates with high accuracy can be realized.
  • the second resin layer 16 having the opening 17 is selectively provided on the light receiving unit 12, the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, so that cost reduction can be expected.
  • the dicing process for separating the plurality of semiconductor devices 10 into pieces the dicing process using only the second resin layer 16 and the semiconductor element 11 is performed in comparison with a configuration in which a light transmitting plate is attached to the semiconductor element 11 via an adhesive layer. Chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with high yield can be provided.
  • the elastic modulus of the semiconductor element 11 is, for example, 130 to 190 GPa.
  • the semiconductor device 10 includes a through hole 18, a through electrode 19 formed on the inner wall of the through hole 18, a filling layer 20 filling the through hole 18, and a main surface below the semiconductor element 11 in the drawing ( The insulating layer 21 formed on the back surface and the external electrode 22 are provided.
  • FIG. 1A and FIG. 1B will be described in detail.
  • the semiconductor element 11 corresponds to a semiconductor substrate of the present invention, and a light receiving portion 12 and a peripheral circuit region 13 are provided on the main surface (front surface) above the drawing.
  • the light receiving unit 12 corresponds to the optical element of the present invention, and is, for example, a solid-state image sensor that generates a signal according to received light.
  • Peripheral circuit region 13 is, for example, an amplifier circuit that processes a signal from light receiving unit 12.
  • the electrode region 14 is formed on the surface of the semiconductor element 11 and transmits the signal processed in the peripheral circuit region 13 to the through electrode 19. Specifically, the back surface of the electrode region 14 is connected to the peripheral circuit region 13 and the through electrode 19.
  • the first resin layer 15 is provided on the surface of the semiconductor element 11 in a region larger than the region of the light receiving unit 12 and smaller than the semiconductor element 11 so as to cover the light receiving unit 12. At this time, the first resin layer is preferably formed to be larger by about 100 to 500 ⁇ m than the region of the surface of the light receiving unit 12, and particularly preferably about 200 ⁇ m.
  • the first resin layer 15 is a silicone resin that is transparent to visible light.
  • a thermosetting rubber resin agent that is transparent to visible light may be used.
  • the glass transition temperature Tg1 of the first resin layer 15 is Tg1 ⁇ 50 ° C.
  • the first resin layer 15 has no discoloration and contraction when receiving blue light having a high power density, and has a light transmittance of 85% or more (wavelength: 400 nm, thickness when the thickness is 2 mm). : 2 mm). If the thickness of the first resin layer 15 is reduced, the light transmittance is increased so that good light receiving characteristics can be obtained. From the viewpoint of the subsequent manufacturing process, the thickness of the first resin layer 15 is 10 to 10%. 400 ⁇ m is desirable, and particularly preferably about 30 ⁇ m.
  • the second resin layer 16 is formed so as to cover the side surface and the surface end of the first resin layer 15.
  • the glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ⁇ Tg2 ⁇ 200 ° C., and more preferably 150 ° C. ⁇ Tg2 ⁇ 180 ° C.
  • the dicing blade dices the second resin layer 16 in the dicing process by selectively providing the first resin layer 15 in a region larger than the surface of the light receiving unit 12 and smaller than the surface of the semiconductor element 11. Therefore, chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with a high yield can be provided.
  • the main component of the second resin layer 16 is an epoxy or polyimide thermosetting resin, and the main component may be different from that of the first resin layer 15.
  • the main component of the second resin layer 16 is the same as the main component of the first resin layer 15, and an inorganic substance (for example, silica or the like) is mixed into the main component, whereby the hardness of the second resin layer 16 ( It is desirable to adjust the elastic modulus.
  • an inorganic substance for example, silica or the like
  • Carbon may be mixed to blacken the second resin layer 16. Examples of carbon to be mixed include carbon black, channel black, furnace black, acetylene black, thermal black, and lamp black.
  • carbon black it is desirable that the average particle size is fine.
  • the average particle diameter is preferably, for example, 1 to 900 nm, particularly preferably about 1 to 100 nm.
  • the side surface of the semiconductor element 11 and the side surface of the second resin layer 16 are substantially flush with each other.
  • the end surface of the semiconductor element 11 and the end surface of the second resin layer 16 are substantially flush.
  • the side surface of the opening 17 provided in the second resin layer 16 is formed so that the angle ⁇ formed with respect to the surface of the semiconductor element 11 is 80 ° or less.
  • the angle ⁇ formed by the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer 15 in the second resin layer 16 and the surface of the semiconductor element 11 is 80 ° or less. is there.
  • the side surface of the opening 17 is formed so that the angle ⁇ formed with respect to the surface of the semiconductor element 11 is 45 ° or less.
  • the side surface of the opening 17 of the second resin layer 16 is formed so that the angle ⁇ formed with respect to the surface of the semiconductor element 11 is 45 ° or less.
  • the opening 17 is provided so as not to contact the outer periphery of the semiconductor element 11 as shown in FIG. 1B. That is, the opening 17 is formed by cutting a part of the second resin layer 16 into, for example, a box shape from the surface of the semiconductor element 11 to the surface of the second resin layer 16.
  • the opening 17 is formed by cutting out a part of the second resin layer 16 from, for example, a truncated cone from the surface of the semiconductor element 11 to the surface of the second resin layer 16. Also good.
  • the through hole 18 penetrates the semiconductor element 11 in the thickness direction and is formed immediately below the electrode region 14.
  • the depth of the through hole 18 is, for example, 100 to 300 ⁇ m. That is, the thickness of the semiconductor element 11 is, for example, 100 to 300 ⁇ m.
  • the through electrode 19 is provided on the inner wall of the through hole 18, contacts the back surface of the electrode region 14, and extends to the back surface of the semiconductor element 11. In other words, the through electrode 19 is formed across a part of the back surface of the semiconductor element 11 and the inside of the through hole 18.
  • the through electrode 19 is made of a metal such as Ti or Cu, and is electrically connected to the electrode region 14.
  • the filling layer 20 is made of, for example, resin filled in the through hole 18.
  • the through electrode 19 may be configured to cover only the surface inside the through hole 18 as shown in FIG. 1A, or may be configured to completely fill the through hole 18 instead of the filling layer 20.
  • the insulating layer 21 is made of, for example, a resin that covers the back surface of the semiconductor element 11 except for a part on the through electrode 19. In other words, the insulating layer 21 covers the back surface of the semiconductor element 11 and has an opening in part of the through electrode 19.
  • the external electrode 22 is made of a lead-free solder material having a Sn—Ag—Cu composition, for example, which is provided in a portion not covered with the insulating layer 21 on the through electrode 19 and is electrically connected to the through electrode 19.
  • the external electrode 22 is provided in the opening of the insulating layer 21 and is electrically connected to the through electrode 19.
  • the electrode region 14 is electrically connected to the external electrode 22 via the through electrode 19, a signal corresponding to the light received by the light receiving unit 12 can be extracted to the outside of the semiconductor device 10. Become.
  • the semiconductor device 10 includes the semiconductor element 11, the light receiving unit 12 and the electrode region 14 provided on the surface of the semiconductor element 11, and the surface of the semiconductor element 11.
  • the first resin layer 15 provided in a region smaller than the surface of the semiconductor element 11 so as to cover the light receiving portion 12, and the side surface of the first resin layer 15 provided on the surface of the semiconductor element 11 are provided.
  • the second resin layer 16 is provided. The first resin layer 15 and the second resin layer 16 are formed in close contact with the semiconductor element 11.
  • the first resin layer 15 is provided so as to cover the light receiving part 12, the light receiving part 12 can be protected from external factors such as dust adhesion and humidity change, and the semiconductor device 10 operating with high accuracy can be obtained. realizable.
  • the light transmissive plate can be omitted, so that cost reduction can be expected.
  • the dicing process in which a plurality of semiconductor devices 10 are singulated at the time of manufacture compared to the configuration in which a light transmitting plate is attached to the semiconductor element 11 via an adhesive layer, only the second resin layer 16 and the semiconductor element 11 are included. By dicing, chipping of individual chips and excessive breakage of the dicing blade can be prevented, and the semiconductor device 10 with high yield can be provided.
  • the semiconductor device 10 does not contract and discolor the first resin layer 15 when receiving blue light with high power density. Warpage and deterioration of the light receiving characteristics can be prevented.
  • the semiconductor device 10 since the first resin layer 15 has a rubber structure at room temperature, if the entire surface of the semiconductor element 11 is covered, chipping of individual chips and breakage of the dicing blade occur in the dicing process.
  • the second resin layer 16 is provided so as to cover the side surface of the first resin layer 15, the semiconductor device 10 can be manufactured without the dicing blade dicing the first resin layer 15.
  • the semiconductor device 10 since the first resin layer 15 is selectively provided corresponding to the light receiving portion 12, the semiconductor device 10 can be manufactured without dicing the first resin layer 15. Therefore, chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with a high yield can be provided.
  • the semiconductor device 10 exemplified in the present embodiment is more reliable and can be manufactured at a lower cost than the conventional one, is excellent in image characteristics, and is excellent in miniaturization and low profile of the semiconductor device 10.
  • FIG. 2A to 2D are diagrams for explaining an example of a manufacturing method of the semiconductor device 10 according to the present embodiment.
  • FIG. 2D is a schematic diagram for explaining a process of dividing the semiconductor device 10 into pieces by dicing, and shows a plurality of semiconductor devices 10.
  • each process demonstrated below can be implemented using a well-known process, detailed description, such as process conditions, is abbreviate
  • the material and process shown below are one typical example, and do not limit the semiconductor device 10 and the manufacturing method thereof according to the present invention. Substitutions of other materials and processes of known suitability are also included in the present invention. The same applies to the semiconductor device and the manufacturing method thereof according to the second embodiment described later.
  • a wafer including a plurality of semiconductor elements 11 is prepared (semiconductor element preparation step).
  • the semiconductor element preparation step shown in FIG. 2A (a) corresponds to a step of preparing the semiconductor substrate of the present invention.
  • Each semiconductor element 11 is formed by a known method, and the surface of the semiconductor element 11 is provided with a light receiving portion 12, a peripheral circuit region 13, and an electrode region 14.
  • the electrode region 14 is made of a metal thin film such as Al or Cu.
  • the light receiving unit 12, the peripheral circuit region 13, and the electrode region 14 corresponding to each of the plurality of semiconductor devices 10 to be separated later are formed on one wafer.
  • the first resin layer 15 is formed so as to cover the light receiving portions 12 of the plurality of wafer-like semiconductor elements 11 (first resin layer forming step).
  • the first resin layer 15 is formed by a spin coating method, a dispensing method, or a printing filling method. It is preferable to use a spin coating method.
  • a photosensitive liquid resist 31 is applied to the surface of the semiconductor element 11 by using, for example, dry film bonding or spin coating, Using photolithography technology, the resist is patterned so that only the light receiving portion 12 is opened by exposure and development (FIG. 2A (b)).
  • the thickness of the resist 31 may be determined according to the thickness of the first resin layer 15 to be finally formed.
  • the thickness of the first resin layer 15 is generally 10 to 400 ⁇ m, preferably 30 ⁇ m.
  • the first resin layer 15 is applied to the surface of the semiconductor element 11 by spin coating.
  • the first resin layer 15 deposited on the resist is removed by spin coating centrifugal force.
  • the rotational speed and time of spin coating may be appropriately changed depending on the degree of filling of the first resin layer 15 into the opening of the resist 31 and the removability of the first resin layer 15 deposited on the resist 31.
  • the first resin layer 15 is thermally cured. At this time, the first resin layer 15 rises due to the surface tension with respect to the opening of the resist 31, or rises due to the effect of spin coating rotation speed and shrinkage of thermosetting. Therefore, by polishing the surface of the first resin layer 15, the surface of the first resin layer 15 and the surface of the resist 31 are smoothed, and the first resin layer 15 having a flat upper surface can be obtained. Thereby, the incident light is incident on the light receiving unit 12 without being irregularly reflected by the first resin layer 15, so that the semiconductor device 10 can be driven without causing deterioration of the light receiving characteristics of the semiconductor device 10.
  • the steps shown in FIGS. 2A (b) to 2 (d) correspond to the step (a) for forming the first resin layer of the present invention.
  • a second resin layer is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 (second resin layer forming step).
  • the second resin layer 16 is formed by a transfer mold method using a mold. More specifically, as shown in FIG. 2A (e), the second resin layer material R2 is injected from the lateral direction of the wafer using a flat mold D1. Thereafter, after the second resin layer material R2 is thermally cured, the mold D1 is removed as shown in FIG. 2B (f). That is, the process shown in FIGS. 2A (e) and 2B (f) is a second resin layer forming process by a transfer molding method. In other words, the step shown in FIGS. 2A (e) and 2B (f) corresponds to the step (b) of forming the second resin layer of the present invention.
  • carbon may be mixed into the main component of the second resin layer. Examples of carbon to be mixed include carbon black, channel black, furnace black, acetylene black, thermal black, and lamp black. For carbon black, it is desirable that the average particle size is fine. In addition, the average particle diameter of the mixed carbon is, for example, 1 to 900 nm, particularly preferably about 1 to 100 nm.
  • This blackening step corresponds to a step of making the second resin layer of the present invention opaque to visible light.
  • a desired value generally about 100 to 300 ⁇ m
  • mirror surface processing such as CMP (chemical mechanical polishing) (back grind process).
  • a through-hole 18 that penetrates the semiconductor element 11 in the thickness direction is formed so as to reach the back surface of the electrode region 14 from the back surface of the semiconductor element 11.
  • dry etching, wet etching, or the like may be performed using a resist, SiO2, a metal film, or the like as a mask.
  • an insulating film such as SiO 2 is formed on the entire back surface of the semiconductor element 11 and inside the semiconductor element 11 and the through hole 18 using a CVD (Chemical Vapor Deposition) method, a printing filling method of an insulating paste, or the like.
  • CVD Chemical Vapor Deposition
  • the insulating film formed in the electrode region 14 is removed again by using dry etching, wet etching, or the like, the insulating film is provided on the inner wall of the through hole 18, is in contact with the back surface of the electrode region 14, and A through electrode 19 extending to the back surface is formed.
  • the through electrode 19 is formed by the following process.
  • a metal thin film is formed on the entire back surface of the semiconductor element 11 using a sputtering method or the like.
  • Ti, TiW, Cr, Cu or the like is mainly used for the metal thin film.
  • the resist is patterned in accordance with the through electrode 19 by exposure and development using a photolithography technique.
  • the thickness of the resist may be determined according to the thickness of the through electrode 19 to be finally formed. Generally, it is about 5 to 30 ⁇ m.
  • the penetration electrode 19 is formed with metals, such as Cu, using an electroplating method.
  • a filling layer 20 is formed in the through hole 18 in which the through electrode 19 is formed.
  • a resin is used as a material to be filled as the filling layer 20.
  • the filling layer 20 may be filled by spin coating with a liquid photo-curing or thermosetting resin, or the filling layer 20 may be filled with a resin paste by a printing filling method, dipping, or the like.
  • a metal may be used as a material with which the filling layer 20 is filled.
  • the metal plating may be filled using an electrolytic plating method, or the metal paste may be filled mainly using a printing filling method, dipping, or the like.
  • the filling layer 20 is filled by the electrolytic plating method, it is preferable that the filling layer 20 is simultaneously formed when the through electrode 19 is formed. At this time, the filling layer 20 is filled so that the through hole 18 is completely embedded.
  • the filling layer 20 and the through electrode 19 are formed separately, for example, after the through electrode 19 is formed, a mask having an opening is formed in the through hole 18 and the through hole 18 is formed by electrolytic plating.
  • the filling layer 20 is formed.
  • an insulating layer 21 is formed on the back surface of the semiconductor element 11 so as to cover the through electrode 19.
  • the insulating layer 21 is formed by using a photosensitive resin and spin coating or attaching a dry film.
  • an opening that exposes part of the through electrode 19 is formed by selectively removing the insulating layer 21 using a photolithography technique.
  • the insulating layer 21 covering the back surface of the semiconductor element 11 is formed by excluding a part on the through electrode 19 (insulating layer forming step). In other words, this insulating layer forming step corresponds to step (d) of the present invention.
  • the second resin layer 16 is formed by forming an opening 17 in the second resin layer material R2 (opening step). Form.
  • the second resin layer 16 is formed by opening the second resin layer material R2 so that the side surface of the first resin layer 15 is not exposed. That is, the opening process shown in FIGS. 2B (i), 2C (j), and 2C (k) corresponds to the process (c) of the present invention. Hereinafter, this opening process will be described.
  • a photosensitive liquid resist 32 is applied to the surface of the second resin layer material R2 by using, for example, dry film bonding or spin coating.
  • the resist 32 is patterned by photolithography so that the second resin layer material R2 is opened in a region corresponding to the light receiving portion 12 by exposure and development.
  • the second resin layer material R2 provided in the opening 17 using the resist pattern as a protective film is removed using a dedicated etching solution.
  • the side surface of the opening 17 is formed such that the angle ⁇ formed with respect to the surface of the semiconductor element 11 is 80 ° or less.
  • the first resin layer 15 and the second resin layer 16 are preferably made of different materials. It is desirable that the angle ⁇ formed by the side surface of the opening 17 and the surface of the semiconductor element 11 is 45 ° or less.
  • the resist 32 is removed by a dedicated remover.
  • the electrode region 14 is formed on the opening from which a part of the through electrode 19 is exposed by a solder ball mounting method using a flux, a solder paste printing method, or an electroplating method.
  • the external electrode 22 to be electrically connected is formed (external electrode forming step).
  • the external electrode 22 electrically connected to the through electrode 19 is formed in a portion not covered with the insulating layer 21 on the through electrode 19.
  • a lead-free solder material having a Sn—Ag—Cu composition is used as the material of the external electrode 22.
  • the external electrode forming step shown in FIG. 2C (l) corresponds to the step (e) of the present invention.
  • a wafer having a plurality of semiconductor devices 10 as shown in FIG. 1A is formed.
  • a dicing blade 40 such as a dicing saw is used to cut a wafer including a plurality of semiconductor elements 11 and divide the plurality of semiconductor devices 10 into individual pieces (dicing step).
  • dicing is performed by bringing the dicing blade 40 of the present invention into contact with the second resin layer 16.
  • the second resin layer 16, the semiconductor element 11, and the insulating layer 21 are cut by the dicing blade 40 and separated into a plurality of semiconductor devices 10.
  • the first resin layer 15 has a rubber structure at room temperature
  • the dicing blade 40 cuts the first resin layer 15, chipping of individual chips (each semiconductor device 10) and breakage of the dicing blade 40 are performed. Occurs.
  • the dicing blade 40 does not cut the first resin layer, but cuts the second resin layer 16 provided so as to cover the side surface of the first resin layer 15. Since the glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ⁇ Tg2 ⁇ 200 ° C., chipping of individual chips and breakage of the dicing blade 40 do not occur in the dicing process.
  • the manufacturing method of the semiconductor device 10 according to the present embodiment can prevent chipping of individual chips and excessive damage of the dicing blade 40 and can manufacture the semiconductor device 10 with high yield.
  • the opening 17 is formed after the filling layer 20 is formed.
  • the semiconductor element 11 can be sufficiently supported by the second resin layer 16, and the semiconductor device 10 can be manufactured with high accuracy.
  • the through hole 18, the through electrode 19, the filling layer 20, the insulating layer 21, and the external electrode 22 can be formed in a state where the semiconductor element 11 is sufficiently supported by the second resin layer material R ⁇ b> 2 having a flat surface after curing. . Therefore, the semiconductor device 10 can be manufactured with high accuracy.
  • Modification of Embodiment 1 This modification is the same in that the second resin layer 16 is formed by transfer molding, but the mold used to form the second resin layer 16 is different from that of the first embodiment.
  • a method of manufacturing a semiconductor device according to this modification will be described with reference to FIGS. 3A and 3B. Note that the semiconductor device manufactured by the manufacturing method of the present modification is the semiconductor device 10 according to Embodiment 1 shown in FIGS. 1A and 1B.
  • 3A and 3B are diagrams for explaining an example of a manufacturing method of the semiconductor device 10 according to the present modification.
  • the first resin layer 15 is formed on the semiconductor element 11. Since this process is the same as the process described with reference to FIGS. 2A (a) to 2A (d), a detailed description thereof will be omitted.
  • the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 (second resin layer forming step). Opening is performed so that the side surface of the substrate is not exposed (opening step).
  • the second resin layer 16 is formed by a transfer molding method using a downwardly convex mold D2 as shown in FIG. 3A (e).
  • the shape of the mold D2 used here has a convex shape corresponding to the opening 17 as shown in FIG. 3A (e).
  • the shape of the convex portion may be appropriately determined depending on the size and position of the light receiving portion 12 of the semiconductor element 11.
  • the angle ⁇ formed by the convex side surface of the mold D2 with the surface of the semiconductor element 11 is 80 °. The following is desirable. More preferably, the formed angle ⁇ should be 45 ° or less.
  • the second resin layer material R2 is formed so as to cover the first resin layer 15, and at the same time, the second resin layer material R2 is opened so that the side surface of the first resin layer 15 is not exposed.
  • the second resin layer material R2 is injected from the lateral direction of the wafer using a downwardly convex mold D2. Thereafter, after the second resin layer material R2 is thermally cured, the second resin layer 16 is formed by removing the mold D2 as shown in FIG. 3B (f).
  • the manufacturing method of the semiconductor device 10 according to the present modified example uses the downwardly projecting mold D2 as compared with the manufacturing method of the semiconductor device 10 of the first embodiment, so that the second resin layer forming step and the opening are performed. The difference is that the process is performed simultaneously.
  • the manufacturing method of the semiconductor device 10 according to the present modification can reduce the number of work steps as compared with the manufacturing method of the semiconductor device 10 according to the first embodiment.
  • FIGS. 3B (g) to (i) the through hole 18, the through electrode 19, the filling layer 20, the insulating layer 21, and the external electrode 22 are formed.
  • the process for forming these is the same as the process described in FIG. 2B (g), FIG. 2B (h), and FIG. 2C (l), and thus detailed description thereof is omitted.
  • a wafer including a plurality of semiconductor devices 10 is cut using a dicing blade 40 such as a dicing saw to separate the plurality of semiconductor devices 10 into individual pieces (dicing step). Since the dicing process is the same as that of the first embodiment, detailed description thereof is omitted.
  • the semiconductor device 10 is manufactured through the above steps.
  • the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 by using the downwardly projecting mold D2. Simultaneously with the second resin layer forming step, the second resin layer 16 is opened so that the side surfaces of the first resin layer 15 are not exposed (opening step). Thereby, compared with the manufacturing method of Embodiment 1, work man-hours can be reduced.
  • a first resin layer 15 is formed between the convex portion of the mold D2 and the light receiving portion 12. Therefore, since the light receiving part 12 is protected by the first resin layer 15, the light receiving characteristic can be maintained without being damaged by the mold D2. That is, in the manufacturing method of this modification, the second resin layer forming step and the opening step are simultaneously performed while protecting the light receiving unit 12 with the first resin layer 15.
  • the semiconductor device according to the present embodiment is substantially the same as the semiconductor device according to the first embodiment, except that the surface of the first resin layer has a curvature.
  • the uncollimated light beam incident on the semiconductor device is efficiently condensed on the light receiving unit 12. Therefore, the light receiving characteristics of the semiconductor device are improved.
  • the incident uncollimated light flux collects, so that the stray light reflected by the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer is incident on the light receiving unit 12. This can be further prevented. Therefore, the light receiving characteristics of the semiconductor device are further improved.
  • the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device according to the first embodiment.
  • FIG. 4A is a cross-sectional view illustrating an example of the structure of the semiconductor device according to the present embodiment
  • FIG. 4B is a perspective view illustrating an example of the structure of the semiconductor device according to the present embodiment.
  • the semiconductor device 30 according to the present embodiment shown in FIG. 4A includes a first resin layer 25 instead of the first resin layer 15 as compared with the semiconductor device 10 according to the first embodiment.
  • the first resin layer 25 has a curvature on the surface.
  • the radius of curvature of the first resin layer 25 may be appropriately selected depending on the spread angle of incident light, the beam diameter, and the size and position of the region of the light receiving unit 12 so that the incident light is efficiently collected on the light receiving unit 12. Good.
  • the first resin layer 25 having a curvature on the surface can efficiently collect incident light on the light receiving unit 12, an uncollimated light beam incident on the semiconductor device 30 is incident on the light receiving unit 12. Condensed efficiently. Therefore, the light receiving characteristics of the semiconductor device 30 are improved.
  • stray light reflected from the side surface of the opening 17 of the second resin layer 16 can be prevented from entering the light receiving unit 12 and deterioration of the light receiving characteristics of the semiconductor device 30 can be reduced.
  • stray light reflected on the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer 25 is condensed on the incident uncollimated light flux to the light receiving unit 12. Incident can be further prevented. Therefore, the light receiving characteristics of the semiconductor device 30 are further improved.
  • the opening 17 is formed from the surface of the semiconductor element 11 to the surface of the second resin layer 16 so that a part of the second resin layer 16 is hollowed out into, for example, a cylindrical shape. Also good.
  • the structure in which the second resin layer 16 is opened in a cylindrical shape as shown in FIG. 4C has a curvature of the surface of the first resin layer 25 as compared with the structure in which the second resin layer 16 is opened in a box shape as shown in FIG. 4B. The curvature of the light incident on the first resin layer 25 can be accurately collected on the light receiving unit 12.
  • FIGS. 5A to 5C are diagrams for explaining a method of manufacturing the semiconductor device 30 according to the present embodiment.
  • FIG. 5C is a schematic diagram for explaining a process of dividing the semiconductor device 30 into pieces by dicing, and shows a plurality of semiconductor devices 10.
  • semiconductor element preparation step a wafer including a plurality of semiconductor elements 11 is prepared (semiconductor element preparation step). Since this step is the same as the semiconductor element preparation step shown in FIG. 2A (a), detailed description thereof is omitted.
  • the thickness of the resist 31 may be determined according to the thickness of the side surface of the first resin layer 25 to be finally formed.
  • the thickness of the side surface of the first resin layer 25 is generally 10 to 400 ⁇ m, preferably 30 ⁇ m.
  • the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 25 (second resin layer forming step). Opening is performed so that the side surface of the substrate is not exposed (opening step). In other words, the second resin layer 16 that covers the resist 31 is formed, and at the same time, the second resin layer 16 is opened so that the side surfaces of the resist 31 are not exposed.
  • the second resin layer 16 is formed by the transfer molding method using the downward convex mold D2 as described in the modification of the first embodiment.
  • the second resin layer material R2 is injected so as to cover the resist 31, and at the same time, the second resin layer material R2 is opened so that the side surface of the resist 31 is not exposed.
  • the second resin layer material R2 is injected from the lateral direction of the wafer using a downwardly convex mold D2. Thereafter, the second resin layer material R2 is thermally cured, and then the second resin layer 16 is formed by removing the mold D2 as shown in FIG. 5A (d), and the resist 31 is removed with a dedicated remover.
  • the first resin layer 25 is formed on the surface of the semiconductor element 11 in a region smaller than the surface of the semiconductor element 11 so as to cover the light receiving portion 12 (first resin layer forming step).
  • a first resin layer 25 having a curvature on the surface is formed by a dispensing method. That is, it fills by dripping 1st resin layer material R1 with respect to the opening part by which the 2nd resin layer 16 was opened.
  • the curvature radius of the upper surface of the first resin layer 25 is determined by the dropping amount of the first resin layer material R1 and the height and area of the opening where the second resin layer 16 is opened. In other words, the curvature radius of the upper surface of the first resin layer 25 is determined by the dropping amount of the first resin layer material R1 and the volume of the opening of the second resin layer 16.
  • the first resin layer material R1 having a curvature on the surface is formed by, for example, thermosetting the first resin layer material R1.
  • FIGS. 5B (f) to (h) a through hole 18, a through electrode 19, a filling layer 20, an insulating layer 21, and an external electrode 22 are formed.
  • the process for forming these is the same as the process described in FIG. 2B (g), FIG. 2B (h), and FIG. 2C (l), and thus detailed description thereof is omitted.
  • a wafer having a plurality of semiconductor devices 30 is formed.
  • a dicing blade 40 such as a dicing saw is used to cut a wafer having a plurality of semiconductor devices 30 and separate the plurality of semiconductor devices 30 (dicing step). . Note that the dicing process is the same as the process described in FIG.
  • the second resin layer forming step and the opening step are simultaneously performed on the surface of the semiconductor element 11, and then the first resin layer forming step is performed. .
  • the first resin layer 25 having a curvature on the surface can be formed. Therefore, the uncollimated light beam incident on the semiconductor device 30 is efficiently condensed on the light receiving unit 12. Therefore, the light receiving characteristics of the semiconductor device 30 are improved.
  • stray light reflected on the inner wall of the second resin layer 16 in a region formed thicker than the first resin layer 25 is collected by collecting the uncollimated light beam incident on the first resin layer 25. Incidence to the light receiving unit 12 can be further prevented. Therefore, the light receiving characteristics of the semiconductor device 30 are further improved. In other words, since the stray light reflected from the side surface of the opening 17 can be prevented from entering the light receiving portion 12, the light receiving characteristics of the semiconductor device 30 are improved.
  • first resin layer 25 included in each semiconductor device 30 of a wafer that is an aggregate of a plurality of semiconductor devices 30 can be manufactured with an arbitrary thickness.
  • the manufacturing method of the semiconductor device 30 according to the present embodiment is the same as the manufacturing method of the semiconductor device 10 according to the first embodiment, and the dicing blade 40 does not cut the first resin layer 25 in the dicing process. Then, the second resin layer 16 provided so as to cover the side surface of the first resin layer 25 is cut.
  • the manufacturing method of the semiconductor device 30 according to the present embodiment can prevent chipping of individual chips and excessive damage of the dicing blade 40, as in the manufacturing method of the semiconductor device 10 according to the first embodiment.
  • a semiconductor device 30 with a high yield can be manufactured.
  • the first resin layer 25 is formed after the second resin layer 16 is formed.
  • the method for forming the first resin layer 25 having a curvature on the surface is not limited to this, and a resist is used.
  • the second resin layer 16 may be formed after the first resin layer 25 is formed.
  • the first resin layer 25 is formed by filling the first resin layer material R ⁇ b> 1 into the opening portion of the resist using a dispensing method. May be.
  • the mold D2 as shown in FIG. 5A (c) when the mold D2 as shown in FIG. 5A (c) is used, the curvature of the first resin layer 25 is compressively deformed by the convex portion of the mold D2. Therefore, it is preferable to use a flat mold D1 as shown in FIG. 2A (e).
  • the second resin layer 16 covers the upper surface end of the first resin layer 15, but the second resin layer 16 is a side surface of the first resin layer 15 as shown in FIG. 6.
  • a configuration in which the upper end portion is not covered may be employed.
  • the second resin layer 16 is formed thicker than the first resin layer. However, as shown in FIG. 7, the thickness of the second resin layer 16 and the thickness of the first resin layer 15 are formed. May be the same. In other words, the upper surface of the first resin layer 15 and the upper surface of the second resin layer 16 may be substantially flush.
  • the semiconductor device may further include an antireflection film that covers the inner wall of the second resin layer 16 and prevents reflection of visible light.
  • FIG. 8 is a cross-sectional view showing an example of the structure of a semiconductor device having an antireflection film.
  • the semiconductor device shown in FIG. 1A further includes an antireflection film 35 that covers the inner wall of the second resin layer 16 and prevents reflection of visible light.
  • the antireflection film 35 covering the inner wall of the second resin layer 16 can prevent stray light reflected on the inner wall of the second resin layer 16 and reduce deterioration of the light receiving characteristics of the semiconductor device.
  • the antireflection film 35 may be formed using, for example, a sputtering method or a sheet attaching process.
  • the semiconductor device includes a semiconductor element 11, a plurality of light receiving parts 12 provided on the surface of the semiconductor element 11, and a plurality of light receiving parts 12 covered on the surface of the semiconductor element 11.
  • a first resin layer 15 provided in a region smaller than the semiconductor element 11, and a second resin layer 16 provided on the surface of the semiconductor element 11 so as to cover the side surface of the first resin layer 15. Also good.
  • the first resin layer 15 of the semiconductor device 10 is formed by etching.
  • the first resin layer 15 may be formed by dispensing. Good.
  • the resist 31 is first patterned similarly to the spin coating method. And what is necessary is just to fill 1st resin layer material R1 with respect to the opening part of the resist 31 using the dispensing method. At this time, the filling amount of the first resin layer material R ⁇ b> 1 may be appropriately determined by the volume of the opening of the resist 31. Since the first resin layer material R1 is supported by the resist 31, the shape of the first resin layer material R1 before thermosetting can be accurately formed. That is, the shape of the first resin layer 15 can be formed with high accuracy.
  • the subsequent construction method is the same as the spin coating method.
  • the first resin layer material R1 may be formed on the light receiving portion 12 by using a dispensing method, but the shape of the first resin layer material R1 before curing is accurately maintained. It is difficult. That is, it is difficult to form the first resin layer 15 with high accuracy.
  • the glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ⁇ Tg2 ⁇ 200 ° C.
  • the glass transition temperature Tg2 of the second resin layer 16 is not limited to this. What is necessary is just to be higher than the glass transition temperature Tg1 of 1 resin layer 15. In other words, the hardness of the second resin layer 16 only needs to be higher than the hardness of the first resin layer 15.
  • the semiconductor device 10 includes the light receiving unit 12, but may include a light emitting unit that emits light instead of the light receiving unit 12.
  • the through-hole 18 and the through-electrode 19 were formed after the 1st resin layer was formed, they may be formed before the 1st resin layer is formed, It may be formed before the two resin layers are formed.
  • the semiconductor device of the present invention is particularly suitable for various semiconductor devices and various modules such as an optical pickup device and a solid-state imaging device, as well as a photodiode and a laser module.

Abstract

Disclosed is a high-yield semiconductor device which can prevent a dicing blade from excessively breaking. The semiconductor device (10) is provided with: a semiconductor element (11); a light receiving section (12), which is provided on the front surface of the semiconductor element (11); a first resin layer (15), which is provided in a region smaller than the front surface of the semiconductor element (11), said region being on the front surface of the semiconductor element (11), such that the light receiving section (12) is covered with the first resin layer; and a second resin layer (16), which is provided on the front surface of the semiconductor element (11) such that the side surface of the first resin layer (15) is covered with the second resin layer.

Description

半導体装置及びその製造方法Semiconductor device and manufacturing method thereof
　本発明は、光学素子を有する半導体装置及びその製造方法に関するものである。 The present invention relates to a semiconductor device having an optical element and a method for manufacturing the same.
　近年、電子機器の小型化、薄型化、軽量化及び高機能化の進展に伴い、半導体装置は、従来のパッケージ構造からベアチップあるいはＣＳＰ（チップ・サイズ・パッケージ）構造が主流になってきている。この中でも、ウエハ状態の組立工程において、貫通電極及び再配線形成によって電気的接続を可能にするウエハレベルＣＳＰ技術が注目されており、固体撮像素子をはじめとする光学デバイスにおいても、この技術が採用されてきている（例えば特許文献１参照）。 In recent years, with the progress of downsizing, thinning, weight reduction, and high functionality of electronic devices, semiconductor devices have become a mainstream from a conventional package structure to a bare chip or CSP (chip size package) structure. Among these, wafer level CSP technology that enables electrical connection by forming through electrodes and rewiring in the assembly process in the wafer state is attracting attention, and this technology is also adopted in optical devices such as solid-state imaging devices. (See, for example, Patent Document 1).
　図１０は、従来のウエハレベルＣＳＰ構造を有する固体撮像装置の構造を示す断面図である。 FIG. 10 is a cross-sectional view showing the structure of a solid-state imaging device having a conventional wafer level CSP structure.
　従来の固体撮像装置１００Ａは、半導体素子１０１と、半導体素子１０１の主面に設けられた撮像素子１０２と、撮像素子１０２上に設けられたマイクロレンズ１０３と、撮像素子１０２の周辺に設けられた周辺回路領域１０４Ａと、周辺回路領域１０４Ａと電気的に接続された電極配線１０４Ｂとを含む固体撮像素子１００を備えている。 A conventional solid-state imaging device 100 </ b> A is provided around a semiconductor element 101, an imaging element 102 provided on the main surface of the semiconductor element 101, a microlens 103 provided on the imaging element 102, and the periphery of the imaging element 102. A solid-state imaging device 100 including a peripheral circuit region 104A and an electrode wiring 104B electrically connected to the peripheral circuit region 104A is provided.
　また、半導体素子１０１の主面上には接着層１０５を介して、例えば光学ガラスからなる透光板１０６が設けられている。さらに、半導体素子１０１の内部には、半導体素子１０１を厚み方向に貫通する貫通電極１０７が設けられている。 Further, a light transmitting plate 106 made of, for example, optical glass is provided on the main surface of the semiconductor element 101 with an adhesive layer 105 interposed therebetween. Further, a through electrode 107 that penetrates the semiconductor element 101 in the thickness direction is provided inside the semiconductor element 101.
　加えて、半導体素子１０１の裏面は、貫通電極１０７と電気的に接続された金属配線１０８と、半導体素子１０１の裏面と金属配線１０８の一部を覆うと共に金属配線１０８の他部に開口部を有する絶縁層１０９と、絶縁層１０９の開口部に設けられ金属配線１０８と電気的に接続された例えば半田からなる外部電極１１０とを備えている。 In addition, the back surface of the semiconductor element 101 covers the metal wiring 108 electrically connected to the through electrode 107, covers the back surface of the semiconductor element 101 and part of the metal wiring 108, and has an opening in the other part of the metal wiring 108. And an external electrode 110 made of, for example, solder and provided in an opening of the insulating layer 109 and electrically connected to the metal wiring 108.
　以上のように、従来の固体撮像装置１００Ａは撮像素子１０２と外部電極１１０とは、周辺回路領域１０４Ａと電極配線１０４Ｂと貫通電極１０７と金属配線１０８とを介して、電気的に接続されているので受光信号をフリップチップ用基板等に取り出せることができる。 As described above, in the conventional solid-state imaging device 100A, the imaging element 102 and the external electrode 110 are electrically connected through the peripheral circuit region 104A, the electrode wiring 104B, the through electrode 107, and the metal wiring 108. Therefore, the received light signal can be taken out to a flip chip substrate or the like.
　また、Ｂｌｕ－Ｒａｙの光ピックアップ用受光素子においては、受光部上に貫通孔を形成し、受光部を完全に開口するような構造も採用されている（例えば特許文献２参照）。 Also, the light receiving element for optical pickup of Blu-Ray employs a structure in which a through hole is formed on the light receiving part and the light receiving part is completely opened (for example, see Patent Document 2).
特開２００４－２０７４６１号公報JP 2004-207461 A 特開２００９－２６７１５２号公報JP 2009-267152 A
　しかし、上記の固体撮像素子の上部に接着層を介して透光板を設ける構成の場合、透光板・接着層・透光板との一括ダイシング（切削）工程でスループットの低下、個片チップのチッピング及び、ダイシングブレードが破損しやすいという問題が生じ、歩留まりを低下させる要因となっている。加えて、透光板そのものの材料費が高くなるという問題もある。 However, in the case where a translucent plate is provided above the solid-state imaging device via an adhesive layer, throughput is reduced in a batch dicing (cutting) process with the translucent plate, adhesive layer, and translucent plate, and individual chips This causes a problem that the chipping and the dicing blade are easily damaged, and this is a factor for reducing the yield. In addition, there is a problem that the material cost of the translucent plate itself increases.
　また、固体撮像素子の全面に亘って接着層を設ける構造の場合、接着層にエポキシまたはポリイミドを主成分とする部材を用いると、パワー密度の高い青色の光線において、接着層の収縮及び変色が発生するといった信頼性の問題が生じる。 In addition, in the case of a structure in which an adhesive layer is provided over the entire surface of the solid-state imaging device, if a member mainly composed of epoxy or polyimide is used for the adhesive layer, the adhesive layer contracts and discolors in blue light with high power density. A reliability problem occurs.
　加えて、受光部上にキャビティーを形成するように接着層を選択的に設ける構成の場合、その後の製造工程の熱履歴及び、実装後の駆動回路の発熱により、接着層からアウトガスが発生しキャビティー内に充満する。このとき、パワー密度の高い青色の光線の受光において、光線の光ピンセット効果によりアウトガス粒子がガラス表面上に析出し画像特性が劣化するといった問題が生じる。 In addition, when the adhesive layer is selectively provided so as to form a cavity on the light receiving part, outgas is generated from the adhesive layer due to the heat history of the subsequent manufacturing process and the heat generation of the drive circuit after mounting. Fill in the cavity. At this time, when receiving a blue light beam having a high power density, a problem arises in that outgas particles are deposited on the glass surface due to the optical tweezer effect of the light beam and image characteristics deteriorate.
　これを解決するために、受光部上のみに透光板を選択的に開口する構成が想定されるが、この構成の場合、受光部が外気にさらされることにより、ダスト付着、湿度変化等で固体撮像素子を精度よく動作することができなくなる。そのため、その後の二次実装工程の環境を厳密に管理する必要がある。 In order to solve this, a configuration in which the light transmitting plate is selectively opened only on the light receiving portion is assumed. In this configuration, the light receiving portion is exposed to the outside air, thereby causing dust adhesion, humidity change, and the like. The solid-state image sensor cannot be operated with high accuracy. Therefore, it is necessary to strictly manage the environment of the subsequent secondary mounting process.
　本発明は、上記従来の問題点を解決するもので、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置およびその製造方法を提供することを目的とする。 An object of the present invention is to solve the above-described conventional problems, and to provide a semiconductor device that can prevent excessive damage of a dicing blade and has a high yield, and a manufacturing method thereof.
　上記の目的を達成するために、本発明の半導体装置は半導体基板と、前記半導体基板の表面に設けられた光学素子と、前記半導体基板の表面上に、前記光学素子を覆うように、前記半導体基板の表面よりも小さい領域に設けられた第１樹脂層と、前記半導体基板の表面上に、前記第１樹脂層の側面を覆うように設けられた第２樹脂層とを備える。 In order to achieve the above object, a semiconductor device of the present invention includes a semiconductor substrate, an optical element provided on the surface of the semiconductor substrate, and the semiconductor element so as to cover the optical element on the surface of the semiconductor substrate. A first resin layer provided in a region smaller than a surface of the substrate; and a second resin layer provided on the surface of the semiconductor substrate so as to cover a side surface of the first resin layer.
　これにより、光学素子を覆うように第１樹脂層を備えるので、ダスト付着や湿度変化等の外的要因から光学素子を保護することができる。よって、精度良く動作する半導体装置を実現できる。また、透光板を含む従来の構成に比べ、透光板を省略できるので低コスト化が期待できる。加えて、半導体基板に接着層を介して透光板を貼り付けた構成に比べ、製造時に複数の半導体装置を個片化するダイシング工程において、第２樹脂層及び半導体基板のみのダイシングにより個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置を提供することができる。 Thereby, since the first resin layer is provided so as to cover the optical element, the optical element can be protected from external factors such as dust adhesion and humidity change. Therefore, a semiconductor device that operates with high accuracy can be realized. Further, since the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, cost reduction can be expected. In addition, in the dicing process in which a plurality of semiconductor devices are singulated at the time of manufacture, compared to a configuration in which a light-transmitting plate is attached to a semiconductor substrate via an adhesive layer, individual pieces are obtained by dicing only the second resin layer and the semiconductor substrate. Chip chipping and excessive damage of the dicing blade can be prevented, and a semiconductor device with high yield can be provided.
　また、前記第２樹脂層の硬度は、前記第１樹脂層の硬度より高くても良い。 The hardness of the second resin layer may be higher than the hardness of the first resin layer.
　また、前記第１樹脂層は可視光に対して透明なシリコーン樹脂であっても良い。 The first resin layer may be a silicone resin that is transparent to visible light.
　これにより、パワー密度の高い青色の光線の受光及び発光の際、第１樹脂層の収縮および変色が発生することないので、半導体装置の反り及び光学特性の劣化を防止することができる。 This prevents the first resin layer from contracting and discoloring when receiving and emitting blue light having a high power density, thereby preventing warpage and deterioration of optical characteristics of the semiconductor device.
　ところで、シリコーン樹脂はやわらかい（一般的にショア強度Ｄ２０～６０）ために半導体基板全面に覆うと、ダイシング工程において、個片チップのチッピング及び、ダイシングブレードの破損が生じる。しかし、第１樹脂層の側面を覆うように第２樹脂層が設けられているので、ダイシングブレードが第１樹脂層をダイシングすることなく半導体装置を製造できる。よって、個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置を提供することができる。 By the way, since the silicone resin is soft (generally shore strength D20 to 60), if the entire surface of the semiconductor substrate is covered, chipping of individual chips and breakage of the dicing blade occur in the dicing process. However, since the second resin layer is provided so as to cover the side surface of the first resin layer, the semiconductor device can be manufactured without the dicing blade dicing the first resin layer. Accordingly, chipping of individual chips and excessive damage of the dicing blade can be prevented, and a semiconductor device with high yield can be provided.
　また、前記半導体装置は、前記第１樹脂層の表面から前記第２樹脂層の上面へ広がるように開口部を有し、前記第１樹脂層の表面の一部が露出していることが好ましい。 The semiconductor device preferably has an opening extending from the surface of the first resin layer to the upper surface of the second resin layer, and a part of the surface of the first resin layer is exposed. .
　これにより、光透過性が要求される第１樹脂層を、ダイシング耐性を考慮することなく材料選択し形成できる。よって、第１樹脂層と第２樹脂層とを、要求性能に応じて配置できるので、光学特性の劣化を防止しつつ高歩留まりを有する半導体装置を提供することができる。 Thereby, it is possible to select and form the first resin layer that requires light transmittance without considering dicing resistance. Therefore, since the first resin layer and the second resin layer can be arranged according to the required performance, it is possible to provide a semiconductor device having a high yield while preventing deterioration of optical characteristics.
　また、前記第２樹脂層のガラス転移温度Ｔｇは、７０℃≦Ｔｇ≦２００℃であっても良い。 The glass transition temperature Tg of the second resin layer may be 70 ° C. ≦ Tg ≦ 200 ° C.
　これにより、製造時に複数の半導体装置を個片化する際、個片チップのチッピング及び、ダイシングブレードの過度の破損をより確実に防止でき、一層高歩留まりな半導体装置を提供することができる。 Thereby, when a plurality of semiconductor devices are singulated at the time of manufacturing, chipping of individual chips and excessive damage of the dicing blade can be prevented more reliably, and a semiconductor device with higher yield can be provided.
　また、前記第２樹脂層はさらに、前記第１樹脂層の表面端部を覆っても良い。 Further, the second resin layer may further cover a surface end portion of the first resin layer.
　また、前記第２樹脂層は、前記第１樹脂層よりも前記半導体基板の厚さ方向に厚く形成され、前記第２樹脂層のうち前記第１樹脂層よりも厚く形成されている領域の前記第２樹脂層の内壁と、前記半導体基板の表面とがなす角は、８０°以下であっても良い。 Further, the second resin layer is formed thicker in the thickness direction of the semiconductor substrate than the first resin layer, and the region of the second resin layer formed thicker than the first resin layer is formed. The angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate may be 80 ° or less.
　これにより、製造時に金型を用いて第２樹脂層を形成する場合、金型の型抜けが良くなる。 Thus, when the second resin layer is formed using a mold at the time of manufacture, the mold can be easily removed.
　また、前記第２樹脂層のうち前記第１樹脂層よりも厚く形成されている領域の前記第２樹脂層の内壁と、前記半導体基板の表面とがなす角は、４５°以下であっても良い。 The angle formed by the inner wall of the second resin layer in the region of the second resin layer formed thicker than the first resin layer and the surface of the semiconductor substrate may be 45 ° or less. good.
　これにより、半導体装置に入射するコリメートされてない光束に対して、第１樹脂層よりも厚く形成されている領域の第２樹脂層の内壁で反射される迷光の、光学素子への入射を防止できる。よって、半導体装置の光学特性が向上する。 This prevents stray light reflected on the inner wall of the second resin layer in the region formed thicker than the first resin layer from entering the optical element with respect to the uncollimated light beam incident on the semiconductor device. it can. Therefore, the optical characteristics of the semiconductor device are improved.
　また、前記第１樹脂層の表面は曲率を有しても良い。 The surface of the first resin layer may have a curvature.
　これにより、半導体装置に入射するコリメートされてない光束が、光学素子に効率よく集光される。また、光学素子から出射するコリメートされていない光束を、半導体装置の外へ効率よく取り出すことができる。よって、半導体装置の光学特性が向上する。 Thereby, the uncollimated light beam incident on the semiconductor device is efficiently condensed on the optical element. Further, the uncollimated light beam emitted from the optical element can be efficiently taken out of the semiconductor device. Therefore, the optical characteristics of the semiconductor device are improved.
　さらに、半導体装置に入射するコリメートされていない光束が集光することにより、第１樹脂層よりも厚く形成されている領域の第２樹脂層の内壁で反射される迷光の、光学素子への入射を一層防止できる。よって、半導体装置の光学特性が一層向上する。 Further, the uncollimated light beam incident on the semiconductor device is condensed, so that the stray light reflected on the inner wall of the second resin layer in the region formed thicker than the first resin layer is incident on the optical element. Can be further prevented. Therefore, the optical characteristics of the semiconductor device are further improved.
　また、前記第２樹脂層は、可視光に対して不透明であっても良い。 Further, the second resin layer may be opaque to visible light.
　これにより、光学素子以外の領域に入射する光を防止することができ、半導体装置の光学特性が向上する。 Thereby, it is possible to prevent light incident on the area other than the optical element, and the optical characteristics of the semiconductor device are improved.
　また、前記半導体基板の端面と前記第２樹脂層の端面とは実質的に面一であっても良い。 The end surface of the semiconductor substrate and the end surface of the second resin layer may be substantially flush with each other.
　これにより、半導体装置は、複数の半導体装置が形成されたウエハを個片化するダイシングにより製造できる。 Thereby, the semiconductor device can be manufactured by dicing that separates a wafer on which a plurality of semiconductor devices are formed.
　また、さらに、前記第２樹脂層の内壁を覆い、可視光の反射を防止する反射防止膜を備えても良い。 Furthermore, an antireflection film that covers the inner wall of the second resin layer and prevents reflection of visible light may be provided.
　これにより、コリメートされていない光束が、第２樹脂層の内壁で反射されて光学素子へ入射することを防止できる。よって、半導体装置の光学特性が一層向上する。 Thereby, it is possible to prevent the uncollimated light beam from being reflected by the inner wall of the second resin layer and entering the optical element. Therefore, the optical characteristics of the semiconductor device are further improved.
　また、前記第２樹脂層の表面は平坦であっても良い。 Further, the surface of the second resin layer may be flat.
　これにより、半導体装置の取り扱いが容易となる。 This makes it easier to handle the semiconductor device.
　また、さらに、前記半導体基板の表面に設けられ、前記光学素子からの信号を伝達する、又は、前記光学素子に信号を伝達する電極領域と、前記半導体基板を厚さ方向に貫通する貫通孔と、前記貫通孔の内壁上に設けられ、前記電極領域の裏面に接し、前記半導体基板の裏面まで延びる貫通電極とを備えてもよい。また、さらに、前記貫通孔の内部に充填された充填層を備えてもよい。また、さらに、前記貫通電極上の一部を除外して、前記半導体基板の裏面を覆う絶縁層を備えてもよい。また、前記貫通電極上の前記絶縁層が覆われていない部分に設けられ、前記貫通電極と電気的に接続された外部電極を備えてもよい。 Furthermore, an electrode region provided on the surface of the semiconductor substrate for transmitting a signal from the optical element or transmitting a signal to the optical element, and a through hole penetrating the semiconductor substrate in the thickness direction And a through electrode provided on the inner wall of the through hole and in contact with the back surface of the electrode region and extending to the back surface of the semiconductor substrate. Furthermore, you may provide the filling layer with which the inside of the said through-hole was filled. Furthermore, an insulating layer that covers the back surface of the semiconductor substrate except for a part on the through electrode may be provided. In addition, an external electrode may be provided that is provided in a portion where the insulating layer on the through electrode is not covered and is electrically connected to the through electrode.
　これにより、光学素子からの信号を貫通電極を介して半導体基板の裏面に取り出すことにより、更なる小型化、薄型化を実現することができる。 Thereby, further reduction in size and thickness can be realized by taking out the signal from the optical element to the back surface of the semiconductor substrate through the through electrode.
　また、本発明の半導体装置は、半導体基板と、前記半導体基板の表面に設けられた複数の光学素子と、前記半導体基板の表面に、前記複数の光学素子を覆うように、前記半導体基板の表面よりも小さい領域に設けられた第１樹脂層と、前記半導体基板の表面上に、前記第１樹脂層の側面を覆うように設けられた第２樹脂層とを備える。 The semiconductor device of the present invention includes a semiconductor substrate, a plurality of optical elements provided on the surface of the semiconductor substrate, and a surface of the semiconductor substrate so as to cover the plurality of optical elements on the surface of the semiconductor substrate. A first resin layer provided in a smaller area, and a second resin layer provided on the surface of the semiconductor substrate so as to cover a side surface of the first resin layer.
　本発明の半導体装置の製造方法は、表面に光学素子を備える半導体基板を準備する工程と、前記半導体基板の表面上に、前記光学素子を覆うように、前記半導体基板の表面よりも小さい領域に第１樹脂層を形成する工程（ａ）と、前記半導体基板の表面上に、前記第１樹脂層を覆うように第２樹脂層を形成する工程（ｂ）と、前記第２樹脂層を前記第１樹脂層の側面が露出しないように開口させる工程（ｃ）とを含む。 The method for manufacturing a semiconductor device of the present invention includes a step of preparing a semiconductor substrate having an optical element on a surface thereof, and a region smaller than the surface of the semiconductor substrate so as to cover the optical element on the surface of the semiconductor substrate. A step (a) of forming a first resin layer, a step (b) of forming a second resin layer on the surface of the semiconductor substrate so as to cover the first resin layer, and the second resin layer And a step (c) of opening the side surface of the first resin layer so as not to be exposed.
　これにより、光学素子を覆うように第１樹脂層を備えるので、ダスト付着や湿度変化等の外的要因から光学素子を保護することができる。よって、精度良く動作する半導体装置を実現できる。また、透光板を含む従来の構成に比べ、透光板を省略できるので低コスト化が期待できる。加えて、半導体基板に接着層を介して透光板を貼り付けた構成に比べ、製造時に複数の半導体装置を個片化するダイシング工程において、第２樹脂層及び半導体基板のみのダイシングにより個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置の製造方法を提供することができる。 Thereby, since the first resin layer is provided so as to cover the optical element, the optical element can be protected from external factors such as dust adhesion and humidity change. Therefore, a semiconductor device that operates with high accuracy can be realized. Further, since the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, cost reduction can be expected. In addition, in the dicing process in which a plurality of semiconductor devices are singulated at the time of manufacture, compared to a configuration in which a light-transmitting plate is attached to a semiconductor substrate via an adhesive layer, individual pieces are obtained by dicing only the second resin layer and the semiconductor substrate. Chip manufacturing and excessive damage of the dicing blade can be prevented, and a method for manufacturing a semiconductor device with high yield can be provided.
　また、前記工程（ｃ）では、前記第２樹脂層の内壁と前記半導体基板の表面とのなす角が８０°以下となるように前記第２樹脂層を開口させてもよい。 In the step (c), the second resin layer may be opened so that an angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate is 80 ° or less.
　また、前記工程（ｃ）では、前記第２樹脂層の内壁と前記半導体基板の表面とのなす角が４５°以下となるように前記第２樹脂層を開口させもよい。 In the step (c), the second resin layer may be opened so that an angle formed by the inner wall of the second resin layer and the surface of the semiconductor substrate is 45 ° or less.
　これにより、半導体装置に入射するコリメートされてない光束に対して、第１樹脂層よりも厚く形成されている領域の第２樹脂層の内壁で反射される迷光の、光学素子への入射を防止できる。よって、半導体装置の光学特性が向上する。 This prevents stray light reflected on the inner wall of the second resin layer in the region formed thicker than the first resin layer from entering the optical element with respect to the uncollimated light beam incident on the semiconductor device. it can. Therefore, the optical characteristics of the semiconductor device are improved.
　また、さらに、前記第２樹脂層を、可視光に対して不透明とする工程を含んでもよい。 Furthermore, a step of making the second resin layer opaque to visible light may be further included.
　これにより、光学素子以外への領域に入射する光を防止することができる。 Thereby, it is possible to prevent light incident on a region other than the optical element.
　また、前記半導体基板は表面に、前記光学素子からの信号を伝達する、又は、前記光学素子に信号を伝達する電極領域を有し、前記半導体装置の製造方法は、さらに、前記半導体基板を厚さ方向に貫通する貫通孔を形成する工程と、形成された前記貫通孔の内壁上に、前記電極領域の裏面に接し、前記半導体基板の裏面まで延びる貫通電極を形成する工程とを含んでもよい。また、前記貫通電極を形成する工程では、さらに、前記貫通孔の内部に充填層を充填してもよい。また、さらに、前記貫通電極上の一部を除外して、前記半導体基板の裏面を覆う絶縁層を形成する工程（ｄ）を含んでもよい。また、さらに、前記貫通電極上の前記絶縁層が覆われていない部分に、前記貫通電極と電気的に接続される外部電極を形成する工程（ｅ）を含んでもよい。 The semiconductor substrate has an electrode region on the surface for transmitting a signal from the optical element or transmitting a signal to the optical element, and the method for manufacturing a semiconductor device further includes: Forming a through-hole penetrating in the vertical direction and forming a through-electrode on the inner wall of the through-hole formed so as to contact the back surface of the electrode region and extend to the back surface of the semiconductor substrate. . Further, in the step of forming the through electrode, a filling layer may be further filled in the through hole. Furthermore, a step (d) of forming an insulating layer covering the back surface of the semiconductor substrate, excluding a part on the through electrode, may be included. Furthermore, a step (e) of forming an external electrode electrically connected to the through electrode in a portion where the insulating layer on the through electrode is not covered may be included.
　これにより、光学素子からの信号を貫通電極を介して半導体基板の裏面に取り出すことにより、更なる小型化、薄型化を実現することができる。 Thereby, further reduction in size and thickness can be realized by taking out the signal from the optical element to the back surface of the semiconductor substrate through the through electrode.
　また、前記工程（ａ）の後に、前記工程（ｂ）と前記工程（ｄ）と前記工程（ｃ）と前記工程（ｅ）とをこの順で行ってもよい。 Further, after the step (a), the step (b), the step (d), the step (c), and the step (e) may be performed in this order.
　これにより、第２樹脂層が半導体基板の表面を覆うことで、貫通電極を形成する際に精度よく複数の半導体基板を支えることができる。加えて、外部端子を最後に形成することで、精度よく第２樹脂層を形成することができる。 Thus, the second resin layer covers the surface of the semiconductor substrate, so that a plurality of semiconductor substrates can be accurately supported when the through electrode is formed. In addition, the second resin layer can be accurately formed by forming the external terminal last.
　また、前記工程（ａ）の後に、前記工程（ｂ）と前記工程（ｃ）とを同時に行ってもよい。 Further, after the step (a), the step (b) and the step (c) may be performed simultaneously.
　これにより、第１樹脂層により光学素子を保護しつつ、第２樹脂層を同時に形成することで、作業工数を削減することができる。 Thereby, it is possible to reduce the number of work steps by simultaneously forming the second resin layer while protecting the optical element by the first resin layer.
　また、前記工程（ｂ）及び前記工程（ｃ）の後に、前記工程（ａ）を行ってもよい。 The step (a) may be performed after the step (b) and the step (c).
　これにより、表面に曲率を有する第１樹脂層を形成できる。よって、半導体装置に入射するコリメートされてない光束が、光学素子に効率よく集光される。また、光学素子から出射するコリメートされていない光束を、半導体装置の外へ効率よく取り出すことができる。したがって、半導体装置の光学特性が向上する。 Thereby, the first resin layer having a curvature on the surface can be formed. Therefore, the uncollimated light beam incident on the semiconductor device is efficiently condensed on the optical element. Further, the uncollimated light beam emitted from the optical element can be efficiently taken out of the semiconductor device. Therefore, the optical characteristics of the semiconductor device are improved.
　さらに、第１樹脂層に入射するコリメートされていない光束が集光することにより、第１樹脂層よりも厚く形成されている領域の第２樹脂層の内壁で反射される迷光の、光学素子への入射を一層防止できる。よって、半導体装置の光学特性が一層向上する。 Furthermore, when the uncollimated light beam incident on the first resin layer is collected, stray light reflected by the inner wall of the second resin layer in the region formed thicker than the first resin layer is transmitted to the optical element. Can be further prevented. Therefore, the optical characteristics of the semiconductor device are further improved.
　また、複数の半導体装置の集合体であるウエハの、各半導体装置に含まれる第１樹脂層を任意の厚さで製造できる。 Further, the first resin layer included in each semiconductor device of the wafer, which is an assembly of a plurality of semiconductor devices, can be manufactured with an arbitrary thickness.
　また、前記第２樹脂層のガラス転移温度Ｔｇは、７０℃≦Ｔｇ≦２００℃であり、前記半導体装置の製造方法は、さらに、前記工程（ｂ）で形成された前記第２樹脂層にダイシングブレードを当接することによりダイシングする工程を含んでもよい。 The glass transition temperature Tg of the second resin layer is 70 ° C. ≦ Tg ≦ 200 ° C., and the method for manufacturing the semiconductor device further includes dicing the second resin layer formed in the step (b). A step of dicing by contacting the blade may be included.
　これにより、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置を大量に製造できる。 Thereby, excessive damage of the dicing blade can be prevented, and a high yield semiconductor device can be manufactured in large quantities.
　本発明は、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置及びその製造方法を提供することができる。 The present invention can provide a high yield semiconductor device and a method for manufacturing the same that can prevent excessive damage of the dicing blade.
図１Ａは、実施の形態１に係る半導体装置の構造の一例を示す断面図である。FIG. 1A is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment. 図１Ｂは、半導体装置の構造の一例を示す斜視図である。FIG. 1B is a perspective view illustrating an example of a structure of a semiconductor device. 図１Ｃは、半導体装置の構造の他の一例を示す斜視図である。FIG. 1C is a perspective view illustrating another example of the structure of the semiconductor device. 図２Ａは、半導体装置の製造方法の一例を説明するための図である。FIG. 2A is a diagram for explaining an example of a method of manufacturing a semiconductor device. 図２Ｂは、図２Ａの続きの製造方法の一例を説明するための図である。FIG. 2B is a diagram for explaining an example of a manufacturing method subsequent to FIG. 2A. 図２Ｃは、図２Ｂの続きの製造方法の一例を説明するための図である。FIG. 2C is a diagram for explaining an example of a manufacturing method subsequent to FIG. 2B. 図２Ｄは、図２Ｃの続きの製造方法の一例を説明するための図である。FIG. 2D is a diagram for explaining an example of a manufacturing method continued from FIG. 2C. 図３Ａは、実施の形態１の変形例に係る半導体装置の製造方法の一例を説明するための図である。FIG. 3A is a diagram for describing an example of a method of manufacturing a semiconductor device according to a variation of the first embodiment. 図３Ｂは、図３Ａの続きの製造方法の一例を説明するための図である。FIG. 3B is a diagram for explaining an example of a manufacturing method subsequent to FIG. 3A. 図４Ａは、実施の形態２に係る半導体装置の構造の一例を示す断面図である。FIG. 4A is a cross-sectional view showing an example of the structure of the semiconductor device according to the second embodiment. 図４Ｂは、半導体装置の構造の一例を示す斜視図である。FIG. 4B is a perspective view illustrating an example of the structure of the semiconductor device. 図４Ｃは、半導体装置の構造の他の一例を示す斜視図である。FIG. 4C is a perspective view illustrating another example of the structure of the semiconductor device. 図５Ａは、半導体装置の製造方法の一例を説明するための図である。FIG. 5A is a diagram for describing an example of a method of manufacturing a semiconductor device. 図５Ｂは、図５Ａの続きの製造方法の一例を説明するための図である。FIG. 5B is a diagram for explaining an example of the manufacturing method continued from FIG. 5A. 図５Ｃは、図５Ｂの続きの製造方法の一例を説明するための図である。FIG. 5C is a diagram for explaining an example of a manufacturing method subsequent to FIG. 5B. 図６は、半導体装置の構造の他の一例を示す断面図である。FIG. 6 is a cross-sectional view illustrating another example of the structure of the semiconductor device. 図７は、半導体装置の構造のさらに他の一例を示す断面図である。FIG. 7 is a cross-sectional view showing still another example of the structure of the semiconductor device. 図８は、反射防止膜を有する半導体装置の構造の一例を示す断面図である。FIG. 8 is a cross-sectional view illustrating an example of the structure of a semiconductor device having an antireflection film. 図９は、複数の受光部を有する半導体装置の構造の一例を示す断面図である。FIG. 9 is a cross-sectional view illustrating an example of the structure of a semiconductor device having a plurality of light receiving portions. 図１０は、従来の固体撮像装置の構造を示す断面図である。FIG. 10 is a cross-sectional view showing the structure of a conventional solid-state imaging device.
　以下、本発明の実施の形態を図に基づき説明する。なお、以下では、全ての図を通じて同一又は相当する要素については同じ符号を付して、その重複する説明を省略する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description, the same or corresponding elements are denoted by the same reference symbols throughout all the drawings, and redundant description thereof is omitted.
　（実施の形態１）
　本実施の形態に係る半導体装置は、半導体基板と、半導体基板の表面に設けられた光学素子と、半導体基板の表面上に、光学素子を覆うように、半導体基板の表面よりも小さい領域に設けられた第１樹脂層と、半導体基板の表面上に、前記第１樹脂層の側面を覆うように設けられた第２樹脂層とを備える。これにより、製造時のダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置を実現できる。 (Embodiment 1)
The semiconductor device according to this embodiment is provided in a region smaller than the surface of the semiconductor substrate so as to cover the optical element on the surface of the semiconductor substrate, the optical element provided on the surface of the semiconductor substrate, and the surface of the semiconductor substrate. And a second resin layer provided on the surface of the semiconductor substrate so as to cover a side surface of the first resin layer. Thereby, excessive damage of the dicing blade at the time of manufacture can be prevented, and a high yield semiconductor device can be realized.
　以下、本実施の形態に係る例示的な半導体装置について説明する。 Hereinafter, an exemplary semiconductor device according to the present embodiment will be described.
　図１Ａは、本実施の形態に係る半導体装置の構造の一例を示す断面図であり、図１Ｂは、本実施の形態に係る半導体装置の構造の一例を示す斜視図である。 FIG. 1A is a cross-sectional view showing an example of the structure of the semiconductor device according to the present embodiment, and FIG. 1B is a perspective view showing an example of the structure of the semiconductor device according to the present embodiment.
　図１Ａに示すように、本実施の形態に係る半導体装置１０は、半導体素子１１と、その表面に設けられた受光部１２と、受光部１２の周辺に設けられ、例えば受光部１２からの信号を処理する周辺回路領域１３と、Ａｌ、Ｃｕ等の金属薄膜で形成された電極領域１４の一部と、受光部１２を覆うように、受光部１２の領域よりも大きく、半導体素子１１の端部から例えば５０～２０００μｍで、好ましくは１０００μｍ程度内方へ後退した第１樹脂層１５と、第１樹脂層１５の側面を覆うように設けられた第２樹脂層１６とを備える。 As shown in FIG. 1A, a semiconductor device 10 according to the present embodiment includes a semiconductor element 11, a light receiving unit 12 provided on the surface thereof, and a periphery of the light receiving unit 12. For example, a signal from the light receiving unit 12 Is larger than the region of the light receiving unit 12 and covers the edge of the semiconductor element 11 so as to cover the light receiving unit 12 and the peripheral circuit region 13 for processing the electrode, part of the electrode region 14 formed of a metal thin film such as Al, Cu, etc. The first resin layer 15 that has receded inward from, for example, 50 to 2000 μm, preferably about 1000 μm, and the second resin layer 16 provided so as to cover the side surface of the first resin layer 15 are provided.
　また、半導体装置１０は、第１樹脂層１５の上面から第２樹脂層１６へ広がるように開口部１７を有し、第１樹脂層１５の表面、第２樹脂層１６の開口部側面および上面は、露出している。また、第１樹脂層１５の表面端部及び周辺の一部は、第２樹脂層１６で覆われている。第１樹脂層１５の露出している開口部１７の領域は、受光部１２の領域よりも、例えば、５０～４００μｍ程度大きくなっており、さらには、１００μｍ程度大きいことが好ましく、且つ、第１樹脂層１５の表面端部よりも、例えば、５０～４００μｍ程度狭くなっており、さらには、１００μｍ程度狭いことが好ましい。また、第２樹脂層１６は、第１樹脂層１５よりも硬く、厚さは、例えば、４００～５００μｍである。 The semiconductor device 10 has an opening 17 so as to spread from the upper surface of the first resin layer 15 to the second resin layer 16, and the surface of the first resin layer 15, the side surface of the opening of the second resin layer 16, and the upper surface thereof. Is exposed. Further, the surface resin edge portion and a part of the periphery of the first resin layer 15 are covered with the second resin layer 16. The area of the opening 17 where the first resin layer 15 is exposed is, for example, about 50 to 400 μm larger than the area of the light receiving unit 12, and preferably about 100 μm larger. For example, the surface of the resin layer 15 is narrower by about 50 to 400 μm, more preferably about 100 μm. The second resin layer 16 is harder than the first resin layer 15 and has a thickness of 400 to 500 μm, for example.
　これにより、受光部１２上を覆うように第１樹脂層１５を備えるので、受光部１２を保護することができ精度良く動作する半導体装置１０を実現できる。また、受光部１２上に選択的に開口部１７を持つ第２樹脂層１６を備えるので、透光板を含む従来の構成に比べ、透光板を省略できるので低コスト化が期待できる。加えて、半導体素子１１に接着層を介して透光板を貼り付けた構成に比べ、複数の半導体装置１０を個片化するダイシング工程において、第２樹脂層１６と半導体素子１１のみのダイシングにより個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置１０を提供することができる。なお、半導体素子１１の弾性率は、例えば、１３０～１９０ＧＰａである。 Thereby, since the first resin layer 15 is provided so as to cover the light receiving unit 12, the semiconductor device 10 that can protect the light receiving unit 12 and operates with high accuracy can be realized. Further, since the second resin layer 16 having the opening 17 is selectively provided on the light receiving unit 12, the light transmitting plate can be omitted as compared with the conventional configuration including the light transmitting plate, so that cost reduction can be expected. In addition, in the dicing process for separating the plurality of semiconductor devices 10 into pieces, the dicing process using only the second resin layer 16 and the semiconductor element 11 is performed in comparison with a configuration in which a light transmitting plate is attached to the semiconductor element 11 via an adhesive layer. Chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with high yield can be provided. The elastic modulus of the semiconductor element 11 is, for example, 130 to 190 GPa.
　また、さらに、半導体装置１０は、貫通孔１８と、貫通孔１８の内壁上に形成された貫通電極１９と、貫通孔１８を充填する充填層２０と、半導体素子１１の図面下方の主面（裏面）に形成された絶縁層２１と、外部電極２２とを備える。 Further, the semiconductor device 10 includes a through hole 18, a through electrode 19 formed on the inner wall of the through hole 18, a filling layer 20 filling the through hole 18, and a main surface below the semiconductor element 11 in the drawing ( The insulating layer 21 formed on the back surface and the external electrode 22 are provided.
　以下、図１Ａ及び図１Ｂに記載した各構成要素について、詳細に説明する。 Hereinafter, each component described in FIG. 1A and FIG. 1B will be described in detail.
　まず、半導体素子１１及び半導体素子１１の表面側に形成された各構成要素について説明する。 First, the semiconductor element 11 and each component formed on the surface side of the semiconductor element 11 will be described.
　半導体素子１１は、本発明の半導体基板に相当し、図面上方の主面（表面）に、受光部１２及び周辺回路領域１３が設けられている。 The semiconductor element 11 corresponds to a semiconductor substrate of the present invention, and a light receiving portion 12 and a peripheral circuit region 13 are provided on the main surface (front surface) above the drawing.
　受光部１２は、本発明の光学素子に相当し、例えば、受光した光に応じて信号を生成する、例えば固体撮像素子である。 The light receiving unit 12 corresponds to the optical element of the present invention, and is, for example, a solid-state image sensor that generates a signal according to received light.
　周辺回路領域１３は、受光部１２からの信号を処理する、例えば増幅回路である。 Peripheral circuit region 13 is, for example, an amplifier circuit that processes a signal from light receiving unit 12.
　電極領域１４は、半導体素子１１の表面に形成され、周辺回路領域１３で処理された信号を貫通電極１９に伝達する。具体的には、この電極領域１４の裏面は、周辺回路領域１３と貫通電極１９とに接続している。 The electrode region 14 is formed on the surface of the semiconductor element 11 and transmits the signal processed in the peripheral circuit region 13 to the through electrode 19. Specifically, the back surface of the electrode region 14 is connected to the peripheral circuit region 13 and the through electrode 19.
　第１樹脂層１５は、半導体素子１１の表面上に、受光部１２を覆うように、受光部１２の領域よりも大きく、半導体素子１１よりも小さい領域に設けられている。この際、第１樹脂層は、受光部１２表面の領域よりも１００～５００μｍ程度大きく形成されていることが望ましく、特に好ましくは２００μｍ程度大きく形成されていることが望ましい。 The first resin layer 15 is provided on the surface of the semiconductor element 11 in a region larger than the region of the light receiving unit 12 and smaller than the semiconductor element 11 so as to cover the light receiving unit 12. At this time, the first resin layer is preferably formed to be larger by about 100 to 500 μm than the region of the surface of the light receiving unit 12, and particularly preferably about 200 μm.
　第１樹脂層１５は、可視光に対して透明なシリコーン樹脂である。言い換えると、可視光に対して透明な熱硬化型のゴム樹脂剤でもよい。具体的には、第１樹脂層１５のガラス転移温度Ｔｇ１は、Ｔｇ１≦５０℃である。また、例えば、第１樹脂層１５は、パワー密度の高い青色の光線の受光において、変色及び収縮がなく、厚さが２ｍｍの場合の光の透過率が８５％以上（波長：４００ｎｍ、厚さ：２ｍｍ）であることが望ましい。第１樹脂層１５の厚さを薄くすれば、光の透過率が上がるので良好な受光特性を得ることができるが、その後の製造工程の観点から、第１樹脂層１５の厚さは１０～４００μｍが望ましく、特に好ましくは３０μｍ程度であることが望ましい。 The first resin layer 15 is a silicone resin that is transparent to visible light. In other words, a thermosetting rubber resin agent that is transparent to visible light may be used. Specifically, the glass transition temperature Tg1 of the first resin layer 15 is Tg1 ≦ 50 ° C. Further, for example, the first resin layer 15 has no discoloration and contraction when receiving blue light having a high power density, and has a light transmittance of 85% or more (wavelength: 400 nm, thickness when the thickness is 2 mm). : 2 mm). If the thickness of the first resin layer 15 is reduced, the light transmittance is increased so that good light receiving characteristics can be obtained. From the viewpoint of the subsequent manufacturing process, the thickness of the first resin layer 15 is 10 to 10%. 400 μm is desirable, and particularly preferably about 30 μm.
　これにより、パワー密度の高い青色の光線の受光の際、第１樹脂層１５の収縮および変色が発生することがないので、半導体装置１０の反り及び受光特性の劣化を防止することができる。 This prevents the first resin layer 15 from contracting and discoloring when receiving a blue light beam having a high power density, thereby preventing the warpage of the semiconductor device 10 and the deterioration of the light receiving characteristics.
　第２樹脂層１６は、第１樹脂層１５の側面及び表面端部を覆うように形成されている。この第２樹脂層１６のガラス転移温度Ｔｇ２は、７０℃≦Ｔｇ２≦２００℃であり、さらに好ましくは、１５０℃≦Ｔｇ２≦１８０℃である。これにより、製造時に複数の半導体装置１０の集合体であるウエハから各半導体装置１０を個片化するダイシング工程において、個片チップのチッピング及び、ダイシングブレードの過度の破損を確実に防止でき、高歩留まりな半導体装置１０を実現できる。具体的には、第１樹脂層１５は常温でゴム構造であるために半導体素子１１の全面に覆うと、ダイシング工程において、個片チップのチッピング及び、ダイシングブレードの破損が生じる。しかしながら、第１樹脂層１５を受光部１２表面より大きく、半導体素子１１表面より小さい領域に選択的に設けることで、ダイシング工程において、ダイシングブレードは第２樹脂層１６をダイシングする。よって、個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置１０を提供することができる。 The second resin layer 16 is formed so as to cover the side surface and the surface end of the first resin layer 15. The glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ≦ Tg2 ≦ 200 ° C., and more preferably 150 ° C. ≦ Tg2 ≦ 180 ° C. Thereby, in the dicing process of separating each semiconductor device 10 from a wafer that is an aggregate of a plurality of semiconductor devices 10 during manufacturing, chipping of individual chips and excessive damage of the dicing blade can be reliably prevented. The semiconductor device 10 with a high yield can be realized. Specifically, since the first resin layer 15 has a rubber structure at room temperature, if the entire surface of the semiconductor element 11 is covered, chipping of individual chips and breakage of the dicing blade occur in the dicing process. However, the dicing blade dices the second resin layer 16 in the dicing process by selectively providing the first resin layer 15 in a region larger than the surface of the light receiving unit 12 and smaller than the surface of the semiconductor element 11. Therefore, chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with a high yield can be provided.
　また、この第２樹脂層１６の主成分は、エポキシ、ポリイミド系の熱硬化型の樹脂であり、第１樹脂層１５と主成分が異なっても構わない。ただし、好ましくは、第２樹脂層１６の主成分は第１樹脂層１５の主成分と同じとし、当該主成分に無機物質（例えばシリカ等）を混入することで第２樹脂層１６の硬度（弾性率）を調整することが望ましい。これにより、第１樹脂層１５と第２樹脂層１６の主成分が同一のためそれぞれの親和性が高くなり、第１樹脂層１５と第２樹脂層１６との界面で良好な接続を得ることができる。 The main component of the second resin layer 16 is an epoxy or polyimide thermosetting resin, and the main component may be different from that of the first resin layer 15. However, preferably, the main component of the second resin layer 16 is the same as the main component of the first resin layer 15, and an inorganic substance (for example, silica or the like) is mixed into the main component, whereby the hardness of the second resin layer 16 ( It is desirable to adjust the elastic modulus. Thereby, since the main component of the 1st resin layer 15 and the 2nd resin layer 16 is the same, each affinity becomes high, and obtains a favorable connection in the interface of the 1st resin layer 15 and the 2nd resin layer 16. Can do.
　また、第２樹脂層１６は、可視光（λ＝３００～８００ｎｍ）に対して不透明であってもよい。言い換えると、可視光において黒色であってもよい。第２樹脂層１６を黒色化するためにはカーボンを混入すればよい。混入するカーボンとしては、例えば、カーボンブラック、チャンネルブラック、ファーネスブラック、アセチレンブラック、サーマルブラック、ランブブラック等が挙げられる。カーボンブラックでは平均粒子径が細かいほうが望ましい。平均粒子径は、例えば１～９００ｎｍが好ましく、特に好ましくは、１～１００ｎｍ程度が良い。これにより、受光部１２以外の領域に入射する光を防止することができ、半導体装置１０の受光特性の劣化を軽減することができる。 The second resin layer 16 may be opaque to visible light (λ = 300 to 800 nm). In other words, it may be black in visible light. Carbon may be mixed to blacken the second resin layer 16. Examples of carbon to be mixed include carbon black, channel black, furnace black, acetylene black, thermal black, and lamp black. For carbon black, it is desirable that the average particle size is fine. The average particle diameter is preferably, for example, 1 to 900 nm, particularly preferably about 1 to 100 nm. Thereby, the light incident on the region other than the light receiving unit 12 can be prevented, and the deterioration of the light receiving characteristics of the semiconductor device 10 can be reduced.
　また、半導体素子１１の側面と第２樹脂層１６の側面とは実質的に面一である。言い換えると、半導体素子１１の端面と第２樹脂層１６の端面とは実質的に面一である。これにより、複数の半導体装置１０を個片化するダイシング工程において、個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置１０を提供することができる。 Further, the side surface of the semiconductor element 11 and the side surface of the second resin layer 16 are substantially flush with each other. In other words, the end surface of the semiconductor element 11 and the end surface of the second resin layer 16 are substantially flush. Thereby, in the dicing process for dividing the plurality of semiconductor devices 10 into individual pieces, chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with high yield can be provided.
　また、第２樹脂層１６に設けられた開口部１７の側面は、半導体素子１１の表面に対して、なす角θが８０°以下となるように形成されている。言い換えると、第２樹脂層１６のうち、第１樹脂層１５よりも厚く形成されている領域の第２樹脂層１６の内壁と、半導体素子１１の表面とがなす角θは、８０°以下である。これにより製造時に金型を用いて第２樹脂層１６を形成する場合、当該金型の型抜けが良くなる。 Further, the side surface of the opening 17 provided in the second resin layer 16 is formed so that the angle θ formed with respect to the surface of the semiconductor element 11 is 80 ° or less. In other words, the angle θ formed by the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer 15 in the second resin layer 16 and the surface of the semiconductor element 11 is 80 ° or less. is there. Thereby, when forming the 2nd resin layer 16 using a metal mold | die at the time of manufacture, the mold release of the said metal mold | die becomes good.
　また、好ましくは、開口部１７の側面は、半導体素子１１の表面に対して、なす角θが４５°以下となるように形成されている。これにより、半導体装置１０に入射するコリメートされてない光束に対して、第２樹脂層１６の開口部１７の側面で反射される迷光の、受光部１２への入射を防止できる。よって、半導体装置１０の受光特性が向上する。 Preferably, the side surface of the opening 17 is formed so that the angle θ formed with respect to the surface of the semiconductor element 11 is 45 ° or less. Thereby, it is possible to prevent the stray light reflected from the side surface of the opening 17 of the second resin layer 16 from entering the light receiving unit 12 with respect to the uncollimated light beam entering the semiconductor device 10. Therefore, the light receiving characteristics of the semiconductor device 10 are improved.
　開口部１７は、図１Ｂに示すように、半導体素子１１の外周部に接しないように設けられている。つまり、開口部１７は、半導体素子１１の表面から第２樹脂層１６の表面にかけて、第２樹脂層１６の一部分が、例えば箱型にくり抜かれることで形成されている。 The opening 17 is provided so as not to contact the outer periphery of the semiconductor element 11 as shown in FIG. 1B. That is, the opening 17 is formed by cutting a part of the second resin layer 16 into, for example, a box shape from the surface of the semiconductor element 11 to the surface of the second resin layer 16.
　なお、開口部１７は、図１Ｃに示すように、半導体素子１１の表面から第２樹脂層１６の表面にかけて、第２樹脂層１６の一部分が、例えば円錐台にくり抜かれることで形成されても良い。 As shown in FIG. 1C, the opening 17 is formed by cutting out a part of the second resin layer 16 from, for example, a truncated cone from the surface of the semiconductor element 11 to the surface of the second resin layer 16. Also good.
　次に、半導体素子１１の表面側に形成された各構成要素以外の構成要素について説明する。 Next, components other than the respective components formed on the surface side of the semiconductor element 11 will be described.
　貫通孔１８は、半導体素子１１を厚さ方向に貫通し、且つ、電極領域１４の直下部に形成されている。この貫通孔１８の深さは、例えば１００～３００μｍである。すなわち、半導体素子１１の厚みは、例えば１００～３００μｍである。 The through hole 18 penetrates the semiconductor element 11 in the thickness direction and is formed immediately below the electrode region 14. The depth of the through hole 18 is, for example, 100 to 300 μm. That is, the thickness of the semiconductor element 11 is, for example, 100 to 300 μm.
　貫通電極１９は、貫通孔１８の内壁上に設けられ、電極領域１４の裏面に接し、半導体素子１１の裏面まで延びる。言い換えると、貫通電極１９は、半導体素子１１の裏面の一部と貫通孔１８の内部に亘って形成されている。ここで、貫通電極１９は例えばＴｉ、Ｃｕ等の金属からなり、電極領域１４と電気的に接続されている。 The through electrode 19 is provided on the inner wall of the through hole 18, contacts the back surface of the electrode region 14, and extends to the back surface of the semiconductor element 11. In other words, the through electrode 19 is formed across a part of the back surface of the semiconductor element 11 and the inside of the through hole 18. Here, the through electrode 19 is made of a metal such as Ti or Cu, and is electrically connected to the electrode region 14.
　充填層２０は、貫通孔１８の内部に充填された、例えば樹脂からなる。 The filling layer 20 is made of, for example, resin filled in the through hole 18.
　なお、貫通電極１９は、図１Ａのように貫通孔１８内部の表面だけを覆う構成であってもよいし、充填層２０の代わりに、貫通孔１８を完全に埋める構成であってもよい。 The through electrode 19 may be configured to cover only the surface inside the through hole 18 as shown in FIG. 1A, or may be configured to completely fill the through hole 18 instead of the filling layer 20.
　絶縁層２１は、貫通電極１９上の一部を除外して、半導体素子１１の裏面を覆う、例えば樹脂からなる。言い換えると、絶縁層２１は、半導体素子１１の裏面を覆い、貫通電極１９の一部に開口部を有する。 The insulating layer 21 is made of, for example, a resin that covers the back surface of the semiconductor element 11 except for a part on the through electrode 19. In other words, the insulating layer 21 covers the back surface of the semiconductor element 11 and has an opening in part of the through electrode 19.
　外部電極２２は、貫通電極１９上の絶縁層２１で覆われていない部分に設けられ、貫通電極１９と電気的に接続された、例えばＳｎ－Ａｇ－Ｃｕ組成の鉛フリー半田材料からなる。言い換えると、外部電極２２は、絶縁層２１の開口部に設けられ、貫通電極１９と電気的に接続されている。 The external electrode 22 is made of a lead-free solder material having a Sn—Ag—Cu composition, for example, which is provided in a portion not covered with the insulating layer 21 on the through electrode 19 and is electrically connected to the through electrode 19. In other words, the external electrode 22 is provided in the opening of the insulating layer 21 and is electrically connected to the through electrode 19.
　このように、電極領域１４が貫通電極１９を介して外部電極２２と電気的に接続されているため、受光部１２で受光した光に応じた信号を半導体装置１０の外部へ取り出すことが可能となる。 As described above, since the electrode region 14 is electrically connected to the external electrode 22 via the through electrode 19, a signal corresponding to the light received by the light receiving unit 12 can be extracted to the outside of the semiconductor device 10. Become.
　以上のように、図１Ａに示した本実施の形態に係る半導体装置１０は、半導体素子１１と、半導体素子１１の表面に設けられた受光部１２及び電極領域１４と、半導体素子１１の表面上に、受光部１２を覆うように、半導体素子１１の表面よりも小さい領域に設けられた第１樹脂層１５と、半導体素子１１の表面上に、第１樹脂層１５の側面を覆うように設けられた第２樹脂層１６とを備える。なお、第１樹脂層１５及び第２樹脂層１６は、半導体素子１１に密着して形成されている。 As described above, the semiconductor device 10 according to the present embodiment illustrated in FIG. 1A includes the semiconductor element 11, the light receiving unit 12 and the electrode region 14 provided on the surface of the semiconductor element 11, and the surface of the semiconductor element 11. In addition, the first resin layer 15 provided in a region smaller than the surface of the semiconductor element 11 so as to cover the light receiving portion 12, and the side surface of the first resin layer 15 provided on the surface of the semiconductor element 11 are provided. The second resin layer 16 is provided. The first resin layer 15 and the second resin layer 16 are formed in close contact with the semiconductor element 11.
　これによると、受光部１２上を覆うように第１樹脂層１５を備えるので、ダスト付着や湿度変化等の外的要因から受光部１２を保護することができ、精度良く動作する半導体装置１０を実現できる。 According to this, since the first resin layer 15 is provided so as to cover the light receiving part 12, the light receiving part 12 can be protected from external factors such as dust adhesion and humidity change, and the semiconductor device 10 operating with high accuracy can be obtained. realizable.
　また、透光板を含む従来の構成に比べ、透光板を省略できるので低コスト化が期待できる。加えて、半導体素子１１に接着層を介して透光板を貼り付けた構成に比べ、製造時に複数の半導体装置１０を個片化するダイシング工程において、第２樹脂層１６及び半導体素子１１のみのダイシングにより個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置１０を提供することができる。 Also, compared to the conventional configuration including a light transmissive plate, the light transmissive plate can be omitted, so that cost reduction can be expected. In addition, in the dicing process in which a plurality of semiconductor devices 10 are singulated at the time of manufacture, compared to the configuration in which a light transmitting plate is attached to the semiconductor element 11 via an adhesive layer, only the second resin layer 16 and the semiconductor element 11 are included. By dicing, chipping of individual chips and excessive breakage of the dicing blade can be prevented, and the semiconductor device 10 with high yield can be provided.
　また、第１樹脂層１５に可視光に対して透明なシリコーン材料を用いることで、パワー密度の高い青色の光線の受光において、第１樹脂層１５の収縮および変色が発生することなく半導体装置１０の反り及び受光特性の劣化を防止することができる。 In addition, by using a silicone material that is transparent to visible light for the first resin layer 15, the semiconductor device 10 does not contract and discolor the first resin layer 15 when receiving blue light with high power density. Warpage and deterioration of the light receiving characteristics can be prevented.
　ところで、第１樹脂層１５は常温でゴム構造であるために半導体素子１１の全面に覆うと、ダイシング工程において、個片チップのチッピング及び、ダイシングブレードの破損が生じる。しかし、第１樹脂層１５の側面を覆うように第２樹脂層１６が設けられているので、ダイシングブレードが第１樹脂層１５をダイシングすることなく半導体装置１０を製造できる。言い換えると、第１樹脂層１５は受光部１２に対応して選択的に設けられているので、第１樹脂層１５をダイシングすることなく半導体装置１０を製造できる。よって、個片チップのチッピング及び、ダイシングブレードの過度の破損を防止でき、高歩留まりな半導体装置１０を提供することができる。 Incidentally, since the first resin layer 15 has a rubber structure at room temperature, if the entire surface of the semiconductor element 11 is covered, chipping of individual chips and breakage of the dicing blade occur in the dicing process. However, since the second resin layer 16 is provided so as to cover the side surface of the first resin layer 15, the semiconductor device 10 can be manufactured without the dicing blade dicing the first resin layer 15. In other words, since the first resin layer 15 is selectively provided corresponding to the light receiving portion 12, the semiconductor device 10 can be manufactured without dicing the first resin layer 15. Therefore, chipping of individual chips and excessive damage of the dicing blade can be prevented, and the semiconductor device 10 with a high yield can be provided.
　つまり、本実施の形態において例示した半導体装置１０は、従来よりも高信頼性で、低コストに製造でき、画像特性に優れ、ならびに半導体装置１０の小型化・低背化に優れている。 That is, the semiconductor device 10 exemplified in the present embodiment is more reliable and can be manufactured at a lower cost than the conventional one, is excellent in image characteristics, and is excellent in miniaturization and low profile of the semiconductor device 10.
　（半導体装置の製造方法）
　次に、本実施の形態に係る半導体装置１０の製造方法について説明する。 (Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device 10 according to the present embodiment will be described.
　図２Ａ～２Ｄは、本実施の形態に係る半導体装置１０の製造方法の一例を説明するための図である。なお、図２Ｄは、半導体装置１０をダイシングによって個片化する工程を説明するための模式図であり、複数の半導体装置１０が示されている。また、以下で説明する各工程は周知のプロセスを用いて実施できるため、プロセス条件などの詳細な説明は適宜省略する。また、以下で示す材料及びプロセスは１つの典型例であり、本発明に係る半導体装置１０及びその製造方法を限定するものではない。適性が知られている他の材料及びプロセスを代用した場合も本発明に含まれる。これらのことは、後述する実施の形態２に係る半導体装置及びその製造方法についても同様である。 2A to 2D are diagrams for explaining an example of a manufacturing method of the semiconductor device 10 according to the present embodiment. FIG. 2D is a schematic diagram for explaining a process of dividing the semiconductor device 10 into pieces by dicing, and shows a plurality of semiconductor devices 10. Moreover, since each process demonstrated below can be implemented using a well-known process, detailed description, such as process conditions, is abbreviate | omitted suitably. Moreover, the material and process shown below are one typical example, and do not limit the semiconductor device 10 and the manufacturing method thereof according to the present invention. Substitutions of other materials and processes of known suitability are also included in the present invention. The same applies to the semiconductor device and the manufacturing method thereof according to the second embodiment described later.
　はじめに、図２Ａ（ａ）に示すように、複数の半導体素子１１を含むウエハを準備する（半導体素子準備工程）。この図２Ａ（ａ）に示す半導体素子準備工程は、本発明の半導体基板を準備する工程に相当する。 First, as shown in FIG. 2A (a), a wafer including a plurality of semiconductor elements 11 is prepared (semiconductor element preparation step). The semiconductor element preparation step shown in FIG. 2A (a) corresponds to a step of preparing the semiconductor substrate of the present invention.
　各半導体素子１１は公知の方法により形成され、半導体素子１１の表面には受光部１２と周辺回路領域１３と電極領域１４とを備えるものとする。ここで、電極領域１４は、例えばＡｌ，Ｃｕ等の金属薄膜から成る。 Each semiconductor element 11 is formed by a known method, and the surface of the semiconductor element 11 is provided with a light receiving portion 12, a peripheral circuit region 13, and an electrode region 14. Here, the electrode region 14 is made of a metal thin film such as Al or Cu.
　なお、この工程では後に個片化される複数の半導体装置１０のそれぞれに対応する受光部１２、周辺回路領域１３及び電極領域１４が、１つのウエハに形成される。 In this step, the light receiving unit 12, the peripheral circuit region 13, and the electrode region 14 corresponding to each of the plurality of semiconductor devices 10 to be separated later are formed on one wafer.
　次に、ウエハ状の複数の半導体素子１１の受光部１２上を覆うように第１樹脂層１５を形成する（第１樹脂層形成工程）。第１樹脂層１５を形成するには例えば、スピンコート法、ディスペンス法、印刷充填法で形成する。好ましくはスピンコート法を用いることが望ましい。 Next, the first resin layer 15 is formed so as to cover the light receiving portions 12 of the plurality of wafer-like semiconductor elements 11 (first resin layer forming step). For example, the first resin layer 15 is formed by a spin coating method, a dispensing method, or a printing filling method. It is preferable to use a spin coating method.
　具体的には、スピンコート法で第１樹脂層１５を形成するには、半導体素子１１の表面に例えばドライフィルム貼り付け又はスピンコート法を用いて感光性の液状のレジスト３１を塗布した後、フォトリソグラフィ技術を用いて、露光及び現像により受光部１２のみを開口するようにレジストをパターニングする（図２Ａ（ｂ））。ここで、レジスト３１の厚さは、最終的に形成したい第１樹脂層１５の厚さに応じて決定すればよい。第１樹脂層１５の厚さは、一般的には１０～４００μｍで、好ましくは３０μｍである。 Specifically, in order to form the first resin layer 15 by spin coating, a photosensitive liquid resist 31 is applied to the surface of the semiconductor element 11 by using, for example, dry film bonding or spin coating, Using photolithography technology, the resist is patterned so that only the light receiving portion 12 is opened by exposure and development (FIG. 2A (b)). Here, the thickness of the resist 31 may be determined according to the thickness of the first resin layer 15 to be finally formed. The thickness of the first resin layer 15 is generally 10 to 400 μm, preferably 30 μm.
　その後、図２Ａ（ｃ）に示すように、第１樹脂層１５を半導体素子１１の表面にスピンコート法で塗布する。レジスト上に堆積した第１樹脂層１５はスピンコートの遠心力で除去される。スピンコートの回転数と時間は第１樹脂層１５のレジスト３１の開口部への充填度とレジスト３１上に堆積した第１樹脂層１５の除去性とで適宜変更すればよい。 Thereafter, as shown in FIG. 2A (c), the first resin layer 15 is applied to the surface of the semiconductor element 11 by spin coating. The first resin layer 15 deposited on the resist is removed by spin coating centrifugal force. The rotational speed and time of spin coating may be appropriately changed depending on the degree of filling of the first resin layer 15 into the opening of the resist 31 and the removability of the first resin layer 15 deposited on the resist 31.
　その後、第１樹脂層１５を熱硬化させる。このとき、第１樹脂層１５はレジスト３１の開口に対して表面張力により盛り上がる、もしくはスピンコートの回転数及び、熱硬化の収縮の影響により盛り下がっている。そのため、第１樹脂層１５の表面を研磨加工をすることで、第１樹脂層１５の表面ならびにレジスト３１の表面が平滑化され、上面のフラットな第１樹脂層１５を得ることができる。これにより、入射光が第１樹脂層１５で乱反射されることなく受光部１２に入射するので、半導体装置１０の受光特性の劣化を発生することなく半導体装置１０を駆動することができる。 Thereafter, the first resin layer 15 is thermally cured. At this time, the first resin layer 15 rises due to the surface tension with respect to the opening of the resist 31, or rises due to the effect of spin coating rotation speed and shrinkage of thermosetting. Therefore, by polishing the surface of the first resin layer 15, the surface of the first resin layer 15 and the surface of the resist 31 are smoothed, and the first resin layer 15 having a flat upper surface can be obtained. Thereby, the incident light is incident on the light receiving unit 12 without being irregularly reflected by the first resin layer 15, so that the semiconductor device 10 can be driven without causing deterioration of the light receiving characteristics of the semiconductor device 10.
　その後、図２Ａ（ｄ）に示すように、レジスト３１のみを専用リムーバーで除去する。これにより、受光部１２上を覆い、かつ、半導体素子１１の表面よりも小さい領域に第１樹脂層１５が形成される。つまり、図２Ａ（ｂ）～（ｄ）に示す工程は、本発明の第１樹脂層を形成する工程（ａ）に相当する。 Thereafter, as shown in FIG. 2A (d), only the resist 31 is removed by a dedicated remover. Thereby, the first resin layer 15 is formed in a region that covers the light receiving portion 12 and is smaller than the surface of the semiconductor element 11. That is, the steps shown in FIGS. 2A (b) to 2 (d) correspond to the step (a) for forming the first resin layer of the present invention.
　次に、半導体素子１１の表面上に、第１樹脂層１５を覆うように第２樹脂層を形成する（第２樹脂層形成工程）。 Next, a second resin layer is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 (second resin layer forming step).
　具体的には、第２樹脂層１６は、金型を用いてトランスファーモールド法で形成される。より具体的には、図２Ａ（ｅ）に示すように、フラット形状の金型Ｄ１を用いて、ウエハの横方向から第２樹脂層材料Ｒ２を注入する。その後、第２樹脂層材料Ｒ２を熱硬化させた後、図２Ｂ（ｆ）に示すように金型Ｄ１を取りはずす。つまり、図２Ａ（ｅ）及び図２Ｂ（ｆ）に示す工程は、トランスファーモールド法による第２樹脂層形成工程である。言い換えると、図２Ａ（ｅ）及び図２Ｂ（ｆ）に示す工程は、本発明の第２樹脂層を形成する工程（ｂ）に相当する。 Specifically, the second resin layer 16 is formed by a transfer mold method using a mold. More specifically, as shown in FIG. 2A (e), the second resin layer material R2 is injected from the lateral direction of the wafer using a flat mold D1. Thereafter, after the second resin layer material R2 is thermally cured, the mold D1 is removed as shown in FIG. 2B (f). That is, the process shown in FIGS. 2A (e) and 2B (f) is a second resin layer forming process by a transfer molding method. In other words, the step shown in FIGS. 2A (e) and 2B (f) corresponds to the step (b) of forming the second resin layer of the present invention.
　ところで、図２Ａ（ｅ）に示すように第２樹脂層材料Ｒ２を注入するときに、第２樹脂層材料Ｒ２を可視光に対して不透明としてもよい（黒色化工程）。言い換えると、第２樹脂層材料Ｒ２を可視光（λ＝３００～８００ｎｍ）において黒色であってもよい。第２樹脂層材料Ｒ２を黒色化するためには、第２樹脂層の主成分にカーボンを混入すればよい。混入するカーボンとしては、例えば、カーボンブラック、チャンネルブラック、ファーネスブラック、アセチレンブラック、サーマルブラック、ランブブラック等が挙げられる。カーボンブラックでは平均粒子径が細かいほうが望ましい。また、混入するカーボンの平均粒子径は、例えば１～９００ｎｍ、とくに好ましくは、１～１００ｎｍ程度が良い。これにより、以降の工程で第２樹脂層材料Ｒ２が開口されることにより形成される第２樹脂層１６は、受光部１２以外への領域に入射する光を防止することができ、半導体装置１０の受光特性の劣化を軽減することができる。なお、この黒色化工程は、本発明の第２樹脂層を可視光に対して不透明とする工程に相当する。 Incidentally, as shown in FIG. 2A (e), when the second resin layer material R2 is injected, the second resin layer material R2 may be opaque to visible light (blackening step). In other words, the second resin layer material R2 may be black in visible light (λ = 300 to 800 nm). In order to blacken the second resin layer material R2, carbon may be mixed into the main component of the second resin layer. Examples of carbon to be mixed include carbon black, channel black, furnace black, acetylene black, thermal black, and lamp black. For carbon black, it is desirable that the average particle size is fine. In addition, the average particle diameter of the mixed carbon is, for example, 1 to 900 nm, particularly preferably about 1 to 100 nm. Thereby, the second resin layer 16 formed by opening the second resin layer material R2 in the subsequent process can prevent light incident on the region other than the light receiving unit 12, and the semiconductor device 10. It is possible to reduce the deterioration of the light receiving characteristics. This blackening step corresponds to a step of making the second resin layer of the present invention opaque to visible light.
　次に、ウエハの厚さを予め所望の値（一般に、１００～３００μｍ程度）にまでバックグラインドし、更に、ＣＭＰ（ｃｈｅｍｉｃａｌ　ｍｅｃｈａｎｉｃａｌ　ｐｏｌｉｓｈｉｎｇ　）等の鏡面処理を施しておくことが望ましい（バックグラインド工程）。 Next, it is desirable to back grind the wafer thickness to a desired value (generally about 100 to 300 μm) in advance, and to perform mirror surface processing such as CMP (chemical mechanical polishing) (back grind process). .
　続いて、図２Ｂ（ｇ）に示すように、半導体素子１１の裏面から、電極領域１４の裏面に達するように半導体素子１１を厚さ方向に貫通する貫通孔１８を形成する。具体的には、レジスト、ＳｉＯ２、金属膜等をマスクとし、ドライエッチング、ウェットエッチング等を行なえば良い。 Subsequently, as shown in FIG. 2B (g), a through-hole 18 that penetrates the semiconductor element 11 in the thickness direction is formed so as to reach the back surface of the electrode region 14 from the back surface of the semiconductor element 11. Specifically, dry etching, wet etching, or the like may be performed using a resist, SiO2, a metal film, or the like as a mask.
　次に、ＣＶＤ（Ｃｈｅｍｉｃａｌ　Ｖａｐｏｒ　Ｄｅｐｏｓｉｔｉｏｎ）法や絶縁ペーストの印刷充填法等を用いて、半導体素子１１の裏面全体、ならびに、半導体素子１１、貫通孔１８内部にＳｉＯ２等の絶縁膜を形成する。 Next, an insulating film such as SiO 2 is formed on the entire back surface of the semiconductor element 11 and inside the semiconductor element 11 and the through hole 18 using a CVD (Chemical Vapor Deposition) method, a printing filling method of an insulating paste, or the like.
　続いて、再度ドライエッチングやウェットエッチング等を用いて、電極領域１４に形成された絶縁膜を除去した後、貫通孔１８の内壁上に設けられ、電極領域１４の裏面に接し、半導体素子１１の裏面にまで延びるような貫通電極１９を形成する。具体的には、貫通電極１９は、以下のような工程で形成される。例えば、スパッタ法等を用いて、半導体素子１１の裏面の全面に金属薄膜を形成する。ここで、金属薄膜には、主にＴｉ、ＴｉＷ、Ｃｒ、Ｃｕ等を用いる。続いて、ドライフィルム貼り付け又はスピンコートによる感光性の液状レジスト塗布を行なった後、フォトリソグラフィ技術を用いて、露光及び現像により貫通電極１９に合わせてレジストをパターニングする。尚、レジストの厚さは、最終的に形成したい貫通電極１９の厚さに応じて決定すればよい。一般には、５～３０μｍ程度とする。そして、電解めっき法を用いて、Ｃｕ等の金属で貫通電極１９を形成する。 Subsequently, after the insulating film formed in the electrode region 14 is removed again by using dry etching, wet etching, or the like, the insulating film is provided on the inner wall of the through hole 18, is in contact with the back surface of the electrode region 14, and A through electrode 19 extending to the back surface is formed. Specifically, the through electrode 19 is formed by the following process. For example, a metal thin film is formed on the entire back surface of the semiconductor element 11 using a sputtering method or the like. Here, Ti, TiW, Cr, Cu or the like is mainly used for the metal thin film. Subsequently, after applying a photosensitive liquid resist by applying a dry film or by spin coating, the resist is patterned in accordance with the through electrode 19 by exposure and development using a photolithography technique. Note that the thickness of the resist may be determined according to the thickness of the through electrode 19 to be finally formed. Generally, it is about 5 to 30 μm. And the penetration electrode 19 is formed with metals, such as Cu, using an electroplating method.
　次に、図２Ｂ（ｈ）に示すように、貫通電極１９が形成された貫通孔１８に対し、充填層２０を形成する。充填層２０として充填される材料としては、樹脂を用いる。具体的には、液状の光硬化型又は熱硬化型の樹脂をスピンコートにより充填層２０を充填する、又は、樹脂ペーストを印刷充填法、ディッピング等により充填層２０を充填すれば良い。 Next, as shown in FIG. 2B (h), a filling layer 20 is formed in the through hole 18 in which the through electrode 19 is formed. As a material to be filled as the filling layer 20, a resin is used. Specifically, the filling layer 20 may be filled by spin coating with a liquid photo-curing or thermosetting resin, or the filling layer 20 may be filled with a resin paste by a printing filling method, dipping, or the like.
　なお、充填層２０として充填される材料としては、金属でもよい。充填層２０として金属を用いる場合は、電解めっき法を用いて金属めっきを充填する、又は、印刷充填法、ディッピング等を用いて主に金属ペーストを充填すればよい。 In addition, as a material with which the filling layer 20 is filled, a metal may be used. When a metal is used as the filling layer 20, the metal plating may be filled using an electrolytic plating method, or the metal paste may be filled mainly using a printing filling method, dipping, or the like.
　充填層２０を電解めっき法によって充填する場合は、貫通電極１９を形成する際に、同時に行なうことが望ましい。この際、充填層２０により、貫通孔１８が完全に埋め込まれるように充填する。 In the case where the filling layer 20 is filled by the electrolytic plating method, it is preferable that the filling layer 20 is simultaneously formed when the through electrode 19 is formed. At this time, the filling layer 20 is filled so that the through hole 18 is completely embedded.
　また、充填層２０と貫通電極１９とを別々に形成する場合は、例えば貫通電極１９を形成した後に、貫通孔１８の部分に開口を持つマスクを形成し、電解めっき法を用いて貫通孔１８に充填層２０を形成する。 When the filling layer 20 and the through electrode 19 are formed separately, for example, after the through electrode 19 is formed, a mask having an opening is formed in the through hole 18 and the through hole 18 is formed by electrolytic plating. The filling layer 20 is formed.
　なお、図２Ｂ（ｇ）及び（ｈ）に示す工程は、本発明の貫通孔を形成する工程と、本発明の貫通電極を形成する工程に相当する。 2B (g) and (h) correspond to the step of forming the through hole of the present invention and the step of forming the through electrode of the present invention.
　続いて、半導体素子１１の裏面に、貫通電極１９を覆うように絶縁層２１を形成する。例えば、絶縁層２１は、感光性樹脂を用い、スピンコート又はドライフィルム貼り付けによって形成する。次に、フォトリソグラフィ技術を用い、絶縁層２１を選択的に除去することにより、貫通電極１９の一部を露出させる開口部を形成する。言い換えると、貫通電極１９上の一部を除外して、半導体素子１１の裏面を覆う絶縁層２１を形成する（絶縁層形成工程）。言い換えると、この絶縁層形成工程は、本発明の工程（ｄ）に相当する。 Subsequently, an insulating layer 21 is formed on the back surface of the semiconductor element 11 so as to cover the through electrode 19. For example, the insulating layer 21 is formed by using a photosensitive resin and spin coating or attaching a dry film. Next, an opening that exposes part of the through electrode 19 is formed by selectively removing the insulating layer 21 using a photolithography technique. In other words, the insulating layer 21 covering the back surface of the semiconductor element 11 is formed by excluding a part on the through electrode 19 (insulating layer forming step). In other words, this insulating layer forming step corresponds to step (d) of the present invention.
　その後、図２Ｂ（ｉ）、図２Ｃ（ｊ）及び図２Ｃ（ｋ）に示すように、第２樹脂層材料Ｒ２に開口部１７を形成する（開口工程）ことにより、第２樹脂層１６を形成する。言い換えると、第１樹脂層１５の側面が露出しないように、第２樹脂層材料Ｒ２を開口させることにより、第２樹脂層１６を形成する。つまり、図２Ｂ（ｉ）、図２Ｃ（ｊ）及び図２Ｃ（ｋ）に示す開口工程は、本発明の工程（ｃ）に相当する。以下、この開口工程について説明する。 Thereafter, as shown in FIG. 2B (i), FIG. 2C (j) and FIG. 2C (k), the second resin layer 16 is formed by forming an opening 17 in the second resin layer material R2 (opening step). Form. In other words, the second resin layer 16 is formed by opening the second resin layer material R2 so that the side surface of the first resin layer 15 is not exposed. That is, the opening process shown in FIGS. 2B (i), 2C (j), and 2C (k) corresponds to the process (c) of the present invention. Hereinafter, this opening process will be described.
　開口部１７を形成するには、例えばドライフィルム貼り付け又はスピンコート法を用いて、第２樹脂層材料Ｒ２の表面に感光性の液状のレジスト３２を塗布する。その後、図２Ｂ（ｉ）に示すように、フォトリソグラフィ技術を用いて、露光及び現像により受光部１２に対応した領域に第２樹脂層材料Ｒ２を開口させるようにレジスト３２をパターニングする。その後、図２Ｃ（ｊ）に示すように、レジストパターンを保護膜として開口部１７に設けられた第２樹脂層材料Ｒ２を専用のエッチング液を用いて除去する。これにより、開口部１７の側面は、半導体素子１１の表面に対してなす角θが８０°以下となるように形成される。このとき、エッチング液を用いて開口部１７を形成するので、第１樹脂層１５と第２樹脂層１６の組成は異なる材料が望ましい。なお、開口部１７の側面と、半導体素子１１の表面とがなす角θは、４５°以下となるように形成されることが望ましい。 In order to form the opening 17, a photosensitive liquid resist 32 is applied to the surface of the second resin layer material R2 by using, for example, dry film bonding or spin coating. Thereafter, as shown in FIG. 2B (i), the resist 32 is patterned by photolithography so that the second resin layer material R2 is opened in a region corresponding to the light receiving portion 12 by exposure and development. Thereafter, as shown in FIG. 2C (j), the second resin layer material R2 provided in the opening 17 using the resist pattern as a protective film is removed using a dedicated etching solution. Thus, the side surface of the opening 17 is formed such that the angle θ formed with respect to the surface of the semiconductor element 11 is 80 ° or less. At this time, since the opening 17 is formed using an etching solution, the first resin layer 15 and the second resin layer 16 are preferably made of different materials. It is desirable that the angle θ formed by the side surface of the opening 17 and the surface of the semiconductor element 11 is 45 ° or less.
　その後、図２Ｃ（ｋ）に示すように、レジスト３２を専用のリムーバーにより除去する。 Thereafter, as shown in FIG. 2C (k), the resist 32 is removed by a dedicated remover.
　その後、図２Ｃ（ｌ）に示すように、貫通電極１９の一部が露出された開口部に対し、フラックスを用いた半田ボール搭載法、半田ペースト印刷法又は電気めっき法により、電極領域１４と電気的に接続される外部電極２２を形成する（外部電極形成工程）。言い換えると、貫通電極１９上の絶縁層２１で覆われていない部分に、貫通電極１９と電気的に接続された外部電極２２を形成する。外部電極２２の材料としては、例えば、Ｓｎ－Ａｇ－Ｃｕ組成の鉛フリー半田材料を用いる。なお、図２Ｃ（ｌ）に示す外部電極形成工程は、本発明の工程（ｅ）に相当する。 After that, as shown in FIG. 2C (l), the electrode region 14 is formed on the opening from which a part of the through electrode 19 is exposed by a solder ball mounting method using a flux, a solder paste printing method, or an electroplating method. The external electrode 22 to be electrically connected is formed (external electrode forming step). In other words, the external electrode 22 electrically connected to the through electrode 19 is formed in a portion not covered with the insulating layer 21 on the through electrode 19. For example, a lead-free solder material having a Sn—Ag—Cu composition is used as the material of the external electrode 22. The external electrode forming step shown in FIG. 2C (l) corresponds to the step (e) of the present invention.
　以上の工程により、図１Ａに示すような半導体装置１０を複数個有するウエハが形成される。 Through the above steps, a wafer having a plurality of semiconductor devices 10 as shown in FIG. 1A is formed.
　最後に、図２Ｄ（ｍ）に示すように、例えばダイシングソー等のダイシングブレード４０を用い、半導体素子１１を複数含むウエハを切削し、複数の半導体装置１０を個片化する（ダイシング工程）。言い換えると、第２樹脂層１６に、本発明のダイシングブレード４０を当接することによりダイシングする。具体的には、ダイシングブレード４０により、第２樹脂層１６、半導体素子１１及び絶縁層２１を切削して、複数の半導体装置１０へ個片化する。 Finally, as shown in FIG. 2D (m), for example, a dicing blade 40 such as a dicing saw is used to cut a wafer including a plurality of semiconductor elements 11 and divide the plurality of semiconductor devices 10 into individual pieces (dicing step). In other words, dicing is performed by bringing the dicing blade 40 of the present invention into contact with the second resin layer 16. Specifically, the second resin layer 16, the semiconductor element 11, and the insulating layer 21 are cut by the dicing blade 40 and separated into a plurality of semiconductor devices 10.
　ここで、第１樹脂層１５は常温でゴム構造であるために、ダイシングブレード４０が第１樹脂層１５を切削する場合、個片チップ（各半導体装置１０）のチッピング及び、ダイシングブレード４０の破損が生じる。言い換えると、第１樹脂層１５が半導体素子１１の表面全体に設けられている場合、ダイシング工程において、個片チップ（各半導体装置１０）のチッピング及び、ダイシングブレード４０の破損が生じる。しかし、上記のダイシング工程で、ダイシングブレード４０は、第１樹脂層を切削せず、第１樹脂層１５の側面を覆うように設けられている第２樹脂層１６を切削する。この第２樹脂層１６のガラス転移温度Ｔｇ２は７０℃≦Ｔｇ２≦２００℃であるので、ダイシング工程における個片チップのチッピング及びダイシングブレード４０の破損は生じない。 Here, since the first resin layer 15 has a rubber structure at room temperature, when the dicing blade 40 cuts the first resin layer 15, chipping of individual chips (each semiconductor device 10) and breakage of the dicing blade 40 are performed. Occurs. In other words, when the first resin layer 15 is provided on the entire surface of the semiconductor element 11, chipping of individual chips (each semiconductor device 10) and breakage of the dicing blade 40 occur in the dicing process. However, in the above dicing process, the dicing blade 40 does not cut the first resin layer, but cuts the second resin layer 16 provided so as to cover the side surface of the first resin layer 15. Since the glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ≦ Tg2 ≦ 200 ° C., chipping of individual chips and breakage of the dicing blade 40 do not occur in the dicing process.
　このように、本実施の形態に係る半導体装置１０の製造方法は、個片チップのチッピング及び、ダイシングブレード４０の過度の破損を防止でき、高歩留まりな半導体装置１０を製造できる。 As described above, the manufacturing method of the semiconductor device 10 according to the present embodiment can prevent chipping of individual chips and excessive damage of the dicing blade 40 and can manufacture the semiconductor device 10 with high yield.
　また、充填層２０を形成した後に開口部１７を形成する。これにより、第２樹脂層１６で半導体素子１１を十分に支持することが出来、精度よく半導体装置１０を製造することが出来る。言い換えると、貫通孔１８、貫通電極１９、充填層２０、絶縁層２１及び外部電極２２を、硬化後の表面がフラットな第２樹脂層材料Ｒ２により半導体素子１１を十分に支持した状態で形成できる。よって、半導体装置１０を精度よく製造できる。 Further, the opening 17 is formed after the filling layer 20 is formed. Thereby, the semiconductor element 11 can be sufficiently supported by the second resin layer 16, and the semiconductor device 10 can be manufactured with high accuracy. In other words, the through hole 18, the through electrode 19, the filling layer 20, the insulating layer 21, and the external electrode 22 can be formed in a state where the semiconductor element 11 is sufficiently supported by the second resin layer material R <b> 2 having a flat surface after curing. . Therefore, the semiconductor device 10 can be manufactured with high accuracy.
　（実施の形態１の変形例）
　本変形例では、トランスファーモールド法により第２樹脂層１６を形成する点では同じであるが、第２樹脂層１６を形成するために用いる金型が実施の形態１とは異なる。以下、図３Ａ及び図３Ｂを用いて、本変形例に係る半導体装置の製造方法について説明する。なお、本変形例の製造方法により製造される半導体装置は、図１Ａ及び図１Ｂに示す実施の形態１に係る半導体装置１０である。 (Modification of Embodiment 1)
This modification is the same in that the second resin layer 16 is formed by transfer molding, but the mold used to form the second resin layer 16 is different from that of the first embodiment. Hereinafter, a method of manufacturing a semiconductor device according to this modification will be described with reference to FIGS. 3A and 3B. Note that the semiconductor device manufactured by the manufacturing method of the present modification is the semiconductor device 10 according to Embodiment 1 shown in FIGS. 1A and 1B.
　図３Ａ及び図３Ｂは、本変形例に係る半導体装置１０の製造方法の一例を説明するための図である。 3A and 3B are diagrams for explaining an example of a manufacturing method of the semiconductor device 10 according to the present modification.
　まず、図３Ａ（ａ）～（ｄ）に示すように、半導体素子１１上に第１樹脂層１５を形成する。この工程は、図２Ａ（ａ）～図２Ａ（ｄ）で説明した工程と同様であるので、詳細な説明は省略する。 First, as shown in FIGS. 3A (a) to (d), the first resin layer 15 is formed on the semiconductor element 11. Since this process is the same as the process described with reference to FIGS. 2A (a) to 2A (d), a detailed description thereof will be omitted.
　次に、半導体素子１１の表面上に、第１樹脂層１５を覆うように第２樹脂層１６を形成する（第２樹脂層形成工程）と同時に、第２樹脂層１６を第１樹脂層１５の側面が露出しないように開口させる（開口工程）。 Next, the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 (second resin layer forming step). Opening is performed so that the side surface of the substrate is not exposed (opening step).
　具体的には、本変形例において第２樹脂層１６は、図３Ａ（ｅ）に示すような下に凸の金型Ｄ２を用いてトランスファーモールド法により形成される。 Specifically, in the present modification, the second resin layer 16 is formed by a transfer molding method using a downwardly convex mold D2 as shown in FIG. 3A (e).
　ここで使用する金型Ｄ２の形状は、図３Ａ（ｅ）に示すように、開口部１７に対応する凸形状を備える構成である。凸部の形状は、半導体素子１１の受光部１２の大きさ、位置によって適宜決定すればよい。ただし、第２樹脂層材料Ｒ２の熱硬化後に第２樹脂層１６を金型Ｄ２から精度よく離型させるために、金型Ｄ２の凸部側面が半導体素子１１の表面となす角ψは８０°以下が望ましい。さらに好ましくはなす角ψが４５°以下であればよい。 The shape of the mold D2 used here has a convex shape corresponding to the opening 17 as shown in FIG. 3A (e). The shape of the convex portion may be appropriately determined depending on the size and position of the light receiving portion 12 of the semiconductor element 11. However, in order to release the second resin layer 16 from the mold D2 with high accuracy after the second resin layer material R2 is thermally cured, the angle ψ formed by the convex side surface of the mold D2 with the surface of the semiconductor element 11 is 80 °. The following is desirable. More preferably, the formed angle ψ should be 45 ° or less.
　このような金型Ｄ２を用いて、第１樹脂層１５を覆うように第２樹脂層材料Ｒ２を形成すると同時に、第２樹脂層材料Ｒ２を第１樹脂層１５の側面が露出しないように開口させる。具体的には、図３Ａ（ｅ）に示すように、下に凸の金型Ｄ２を用いて、ウエハの横方向から第２樹脂層材料Ｒ２を注入する。その後、第２樹脂層材料Ｒ２を熱硬化させた後、図３Ｂ（ｆ）に示すように金型Ｄ２を取り外すことで、第２樹脂層１６を形成する。 Using such a mold D2, the second resin layer material R2 is formed so as to cover the first resin layer 15, and at the same time, the second resin layer material R2 is opened so that the side surface of the first resin layer 15 is not exposed. Let Specifically, as shown in FIG. 3A (e), the second resin layer material R2 is injected from the lateral direction of the wafer using a downwardly convex mold D2. Thereafter, after the second resin layer material R2 is thermally cured, the second resin layer 16 is formed by removing the mold D2 as shown in FIG. 3B (f).
　このとき、第２樹脂層１６には開口部１７が形成されている。つまり、本変形例の半導体装置１０の製造方法は、実施の形態１の半導体装置１０の製造方法と比較して、下に凸の金型Ｄ２を用いることで、第２樹脂層形成工程と開口工程とが同時に行われることが異なる。 At this time, an opening 17 is formed in the second resin layer 16. That is, the manufacturing method of the semiconductor device 10 according to the present modified example uses the downwardly projecting mold D2 as compared with the manufacturing method of the semiconductor device 10 of the first embodiment, so that the second resin layer forming step and the opening are performed. The difference is that the process is performed simultaneously.
　これにより、本変形例の半導体装置１０の製造方法は、実施の形態１の半導体装置１０の製造方法と比較して、作業工数を削減することができる。 Thereby, the manufacturing method of the semiconductor device 10 according to the present modification can reduce the number of work steps as compared with the manufacturing method of the semiconductor device 10 according to the first embodiment.
　その後、図３Ｂ（ｇ）～（ｉ）に示すように、貫通孔１８、貫通電極１９、充填層２０、絶縁層２１及び外部電極２２を形成する。なお、これらを形成する工程は、図２Ｂ（ｇ）、図２Ｂ（ｈ）及び図２Ｃ（ｌ）で説明した工程と同様であるので、詳細な説明は省略する。 Thereafter, as shown in FIGS. 3B (g) to (i), the through hole 18, the through electrode 19, the filling layer 20, the insulating layer 21, and the external electrode 22 are formed. The process for forming these is the same as the process described in FIG. 2B (g), FIG. 2B (h), and FIG. 2C (l), and thus detailed description thereof is omitted.
　以上の工程により、複数の半導体装置１０を有するウエハが形成される。 Through the above process, a wafer having a plurality of semiconductor devices 10 is formed.
　最後に、例えばダイシングソー等のダイシングブレード４０を用い、複数半導体の半導体装置１０を含むウエハを切削し、複数の半導体装置１０を個片化する（ダイシング工程）。なお、ダイシング工程は、実施の形態１と同様であるので、詳細な説明は省略する。 Finally, a wafer including a plurality of semiconductor devices 10 is cut using a dicing blade 40 such as a dicing saw to separate the plurality of semiconductor devices 10 into individual pieces (dicing step). Since the dicing process is the same as that of the first embodiment, detailed description thereof is omitted.
　以上の工程により、半導体装置１０が製造される。 The semiconductor device 10 is manufactured through the above steps.
　このように、本変形例の製造方法は、下に凸の金型Ｄ２を用いることで、半導体素子１１の表面上に、第１樹脂層１５を覆うように第２樹脂層１６を形成する（第２樹脂層形成工程）と同時に、第２樹脂層１６を第１樹脂層１５の側面が露出しないように開口させる（開口工程）。これにより、実施の形態１の製造方法と比較して、作業工数を削減することができる。 Thus, in the manufacturing method of the present modification, the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 15 by using the downwardly projecting mold D2. Simultaneously with the second resin layer forming step, the second resin layer 16 is opened so that the side surfaces of the first resin layer 15 are not exposed (opening step). Thereby, compared with the manufacturing method of Embodiment 1, work man-hours can be reduced.
　ところで、図３Ａ（ｅ）に示すように、金型Ｄ２の凸部と受光部１２との間には第１樹脂層１５が形成されている。よって、受光部１２は、第１樹脂層１５により保護されるので、金型Ｄ２により傷つくことがなく、受光特性を維持できる。つまり、本変形例の製造方法は、第１樹脂層１５により受光部１２を保護しつつ、第２樹脂層形成工程と開口工程とを同時に行う。 Incidentally, as shown in FIG. 3A (e), a first resin layer 15 is formed between the convex portion of the mold D2 and the light receiving portion 12. Therefore, since the light receiving part 12 is protected by the first resin layer 15, the light receiving characteristic can be maintained without being damaged by the mold D2. That is, in the manufacturing method of this modification, the second resin layer forming step and the opening step are simultaneously performed while protecting the light receiving unit 12 with the first resin layer 15.
　（実施の形態２）
　本実施の形態に係る半導体装置は、実施の形態１に係る半導体装置とほぼ同じであるが、第１樹脂層の表面が曲率を有する点が異なる。これにより、本実施の形態に係る半導体装置は、半導体装置に入射するコリメートされてない光束が、受光部１２に効率よく集光される。よって、半導体装置の受光特性が向上する。さらに、入射するコリメートされていない光束が集光することにより、第１樹脂層よりも厚く形成されている領域の第２樹脂層１６の内壁で反射される迷光の、受光部１２への入射を一層防止できる。よって、半導体装置の受光特性が一層向上する。 (Embodiment 2)
The semiconductor device according to the present embodiment is substantially the same as the semiconductor device according to the first embodiment, except that the surface of the first resin layer has a curvature. Thereby, in the semiconductor device according to the present embodiment, the uncollimated light beam incident on the semiconductor device is efficiently condensed on the light receiving unit 12. Therefore, the light receiving characteristics of the semiconductor device are improved. Further, the incident uncollimated light flux collects, so that the stray light reflected by the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer is incident on the light receiving unit 12. This can be further prevented. Therefore, the light receiving characteristics of the semiconductor device are further improved.
　以下、本実施の形態に係る半導体装置について、実施の形態１に係る半導体装置と異なる点を中心に説明する。 Hereinafter, the semiconductor device according to the present embodiment will be described focusing on differences from the semiconductor device according to the first embodiment.
　図４Ａは、本実施の形態に係る半導体装置の構造の一例を示す断面図であり、図４Ｂは、本実施の形態に係る半導体装置の構造の一例を示す斜視図である。 4A is a cross-sectional view illustrating an example of the structure of the semiconductor device according to the present embodiment, and FIG. 4B is a perspective view illustrating an example of the structure of the semiconductor device according to the present embodiment.
　図４Ａに示す本実施の形態に係る半導体装置３０は、実施の形態１に係る半導体装置１０と比較して、第１樹脂層１５に代わり第１樹脂層２５を備える。 The semiconductor device 30 according to the present embodiment shown in FIG. 4A includes a first resin layer 25 instead of the first resin layer 15 as compared with the semiconductor device 10 according to the first embodiment.
　図４Ａに示すように、第１樹脂層２５は表面に曲率を有する。第１樹脂層２５の曲率半径は、入射光が受光部１２に効率よく集光するように、入射光の広がり角、光束径、及び受光部１２の領域の大きさ、位置によって適宜選択すればよい。 As shown in FIG. 4A, the first resin layer 25 has a curvature on the surface. The radius of curvature of the first resin layer 25 may be appropriately selected depending on the spread angle of incident light, the beam diameter, and the size and position of the region of the light receiving unit 12 so that the incident light is efficiently collected on the light receiving unit 12. Good.
　このように、表面に曲率を有する第１樹脂層２５により、入射光を受光部１２に効率よく集光することができるため、半導体装置３０に入射するコリメートされてない光束が、受光部１２に効率よく集光される。よって、半導体装置３０の受光特性が向上する。 As described above, since the first resin layer 25 having a curvature on the surface can efficiently collect incident light on the light receiving unit 12, an uncollimated light beam incident on the semiconductor device 30 is incident on the light receiving unit 12. Condensed efficiently. Therefore, the light receiving characteristics of the semiconductor device 30 are improved.
　また、第２樹脂層１６の開口部１７の側面で反射される迷光を、受光部１２への入射を防止し半導体装置３０の受光特性の劣化を軽減することができる。言い換えると、入射するコリメートされていない光束が集光することにより、第１樹脂層２５よりも厚く形成されている領域の第２樹脂層１６の内壁で反射される迷光の、受光部１２への入射を一層防止できる。よって、半導体装置３０の受光特性が一層向上する。 Further, stray light reflected from the side surface of the opening 17 of the second resin layer 16 can be prevented from entering the light receiving unit 12 and deterioration of the light receiving characteristics of the semiconductor device 30 can be reduced. In other words, stray light reflected on the inner wall of the second resin layer 16 in the region formed thicker than the first resin layer 25 is condensed on the incident uncollimated light flux to the light receiving unit 12. Incident can be further prevented. Therefore, the light receiving characteristics of the semiconductor device 30 are further improved.
　なお、開口部１７は、図４Ｃに示すように、半導体素子１１の表面から第２樹脂層１６の表面にかけて、第２樹脂層１６の一部分が、例えば円柱型にくり抜かれたように形成されてもよい。第２樹脂層１６が図４Ｂに示すように箱型に開口している構造より、図４Ｃに示すように円柱型に開口している構造の方が、第１樹脂層２５の表面の曲率を、第１樹脂層２５へ入射した光を受光部１２へ精度良く集光できるような曲率とできる。 4C, the opening 17 is formed from the surface of the semiconductor element 11 to the surface of the second resin layer 16 so that a part of the second resin layer 16 is hollowed out into, for example, a cylindrical shape. Also good. The structure in which the second resin layer 16 is opened in a cylindrical shape as shown in FIG. 4C has a curvature of the surface of the first resin layer 25 as compared with the structure in which the second resin layer 16 is opened in a box shape as shown in FIG. 4B. The curvature of the light incident on the first resin layer 25 can be accurately collected on the light receiving unit 12.
　（半導体装置の製造方法）
　次に、本実施の形態に係る半導体装置３０の製造方法について説明する。 (Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device 30 according to the present embodiment will be described.
　図５Ａ～５Ｃは、本実施の形態に係る半導体装置３０の製造方法を説明するための図である。なお、図５Ｃは半導体装置３０をダイシングによって個片化する工程を説明するための模式図であり、複数の半導体装置１０が示されている。 5A to 5C are diagrams for explaining a method of manufacturing the semiconductor device 30 according to the present embodiment. FIG. 5C is a schematic diagram for explaining a process of dividing the semiconductor device 30 into pieces by dicing, and shows a plurality of semiconductor devices 10.
　はじめに、図５Ａ（ａ）に示すように、複数の半導体素子１１を含むウエハを準備する（半導体素子準備工程）。この工程は、図２Ａ（ａ）に示した半導体素子準備工程と同様であるので、詳細な説明を省略する。 First, as shown in FIG. 5A (a), a wafer including a plurality of semiconductor elements 11 is prepared (semiconductor element preparation step). Since this step is the same as the semiconductor element preparation step shown in FIG. 2A (a), detailed description thereof is omitted.
　次に、半導体素子１１の表面に例えばドライフィルム貼り付け又はスピンコート法を用いて感光性の液状のレジスト３１を塗布した後、フォトリソグラフィ技術を用いて、露光及び現像により受光部１２のみを開口するようにレジスト３１をパターニングする（図５Ａ（ｂ））。ここで、レジスト３１の厚さは、最終的に形成したい第１樹脂層２５の側面の厚さに応じて決定すればよい。第１樹脂層２５の側面の厚さは、一般的には１０～４００μｍで、好ましくは３０μｍである。 Next, after a photosensitive liquid resist 31 is applied to the surface of the semiconductor element 11 using, for example, a dry film bonding or spin coating method, only the light receiving portion 12 is opened by exposure and development using a photolithography technique. Then, the resist 31 is patterned in such a manner (FIG. 5A (b)). Here, the thickness of the resist 31 may be determined according to the thickness of the side surface of the first resin layer 25 to be finally formed. The thickness of the side surface of the first resin layer 25 is generally 10 to 400 μm, preferably 30 μm.
　次に、半導体素子１１の表面上に、第１樹脂層２５を覆うような第２樹脂層１６を形成する（第２樹脂層形成工程）と同時に、第２樹脂層１６を第１樹脂層２５の側面が露出しないように開口させる（開口工程）。言い換えると、レジスト３１を覆うような第２樹脂層１６を形成すると同時に、第２樹脂層１６をレジスト３１の側面が露出しないように開口させる。 Next, the second resin layer 16 is formed on the surface of the semiconductor element 11 so as to cover the first resin layer 25 (second resin layer forming step). Opening is performed so that the side surface of the substrate is not exposed (opening step). In other words, the second resin layer 16 that covers the resist 31 is formed, and at the same time, the second resin layer 16 is opened so that the side surfaces of the resist 31 are not exposed.
　具体的には、第２樹脂層１６は、実施の形態１の変形例で説明したような下に凸の金型Ｄ２を用いてトランスファーモールド法により形成される。 Specifically, the second resin layer 16 is formed by the transfer molding method using the downward convex mold D2 as described in the modification of the first embodiment.
　このような金型Ｄ２を用いて、レジスト３１を覆うように第２樹脂層材料Ｒ２を注入すると同時に、第２樹脂層材料Ｒ２をレジスト３１の側面が露出しないように開口させる。具体的には、図５Ａ（ｃ）に示すように、下に凸の金型Ｄ２を用いて、ウエハの横方向から第２樹脂層材料Ｒ２を注入する。その後、第２樹脂層材料Ｒ２を熱硬化させた後、図５Ａ（ｄ）に示すように金型Ｄ２を取り外すことで第２樹脂層１６を形成し、さらにレジスト３１を専用リムーバーで除去する。 Using such a mold D2, the second resin layer material R2 is injected so as to cover the resist 31, and at the same time, the second resin layer material R2 is opened so that the side surface of the resist 31 is not exposed. Specifically, as shown in FIG. 5A (c), the second resin layer material R2 is injected from the lateral direction of the wafer using a downwardly convex mold D2. Thereafter, the second resin layer material R2 is thermally cured, and then the second resin layer 16 is formed by removing the mold D2 as shown in FIG. 5A (d), and the resist 31 is removed with a dedicated remover.
　次に、半導体素子１１の表面上に、受光部１２を覆うように、半導体素子１１の表面よりも小さい領域に第１樹脂層２５を形成する（第１樹脂層形成工程）。 Next, the first resin layer 25 is formed on the surface of the semiconductor element 11 in a region smaller than the surface of the semiconductor element 11 so as to cover the light receiving portion 12 (first resin layer forming step).
　具体的には、図５Ａ（ｅ）に示すように、ディスペンス法により表面に曲率を有する第１樹脂層２５を形成する。つまり、第２樹脂層１６が開口された開口部に対して第１樹脂層材料Ｒ１を滴下することにより充填する。このとき、第１樹脂層２５の上面の曲率半径は、第１樹脂層材料Ｒ１の滴下量と、第２樹脂層１６が開口された開口部の高さ及び開口面積とで決定される。言い換えると、第１樹脂層２５の上面の曲率半径は、第１樹脂層材料Ｒ１の滴下量と、第２樹脂層１６の開口部の容積とで決定される。 Specifically, as shown in FIG. 5A (e), a first resin layer 25 having a curvature on the surface is formed by a dispensing method. That is, it fills by dripping 1st resin layer material R1 with respect to the opening part by which the 2nd resin layer 16 was opened. At this time, the curvature radius of the upper surface of the first resin layer 25 is determined by the dropping amount of the first resin layer material R1 and the height and area of the opening where the second resin layer 16 is opened. In other words, the curvature radius of the upper surface of the first resin layer 25 is determined by the dropping amount of the first resin layer material R1 and the volume of the opening of the second resin layer 16.
　その後、第１樹脂層材料Ｒ１を例えば熱硬化することにより、表面に曲率を有する第１樹脂層２５を形成する。 Thereafter, the first resin layer material R1 having a curvature on the surface is formed by, for example, thermosetting the first resin layer material R1.
　次に、図５Ｂ（ｆ）～（ｈ）に示すように、貫通孔１８、貫通電極１９、充填層２０、絶縁層２１及び外部電極２２を形成する。なお、これらを形成する工程は、図２Ｂ（ｇ）、図２Ｂ（ｈ）及び図２Ｃ（ｌ）で説明した工程と同様であるので、詳細な説明は省略する。 Next, as shown in FIGS. 5B (f) to (h), a through hole 18, a through electrode 19, a filling layer 20, an insulating layer 21, and an external electrode 22 are formed. The process for forming these is the same as the process described in FIG. 2B (g), FIG. 2B (h), and FIG. 2C (l), and thus detailed description thereof is omitted.
　以上の工程により、複数の半導体装置３０を有するウエハが形成される。 Through the above steps, a wafer having a plurality of semiconductor devices 30 is formed.
　最後に、図５Ｃ（ｉ）に示すように、例えばダイシングソー等のダイシングブレード４０を用い、複数の半導体装置３０を有するウエハを切削し、複数の半導体装置３０を個片化する（ダイシング工程）。なお、ダイシング工程は、図２Ｄ（ｍ）で説明した工程と同様であるので、詳細な説明は省略する。 Finally, as shown in FIG. 5C (i), for example, a dicing blade 40 such as a dicing saw is used to cut a wafer having a plurality of semiconductor devices 30 and separate the plurality of semiconductor devices 30 (dicing step). . Note that the dicing process is the same as the process described in FIG.
　以上のように、本実施の形態に係る半導体装置３０の製造方法は、半導体素子１１の表面上に、第２樹脂層形成工程及び開口工程を同時に行い、その後、第１樹脂層形成工程を行う。 As described above, in the method for manufacturing the semiconductor device 30 according to the present embodiment, the second resin layer forming step and the opening step are simultaneously performed on the surface of the semiconductor element 11, and then the first resin layer forming step is performed. .
　これにより、表面に曲率を有する第１樹脂層２５を形成できる。よって、半導体装置３０に入射するコリメートされてない光束が、受光部１２に効率よく集光される。したがって、半導体装置３０の受光特性が向上する。 Thereby, the first resin layer 25 having a curvature on the surface can be formed. Therefore, the uncollimated light beam incident on the semiconductor device 30 is efficiently condensed on the light receiving unit 12. Therefore, the light receiving characteristics of the semiconductor device 30 are improved.
　さらに、第１樹脂層２５に入射するコリメートされていない光束が集光することにより、第１樹脂層２５よりも厚く形成されている領域の第２樹脂層１６の内壁で反射される迷光の、受光部１２への入射を一層防止できる。よって、半導体装置３０の受光特性が一層向上する。言い換えると、開口部１７の側面で反射される迷光の受光部１２への入射を防止できるので、半導体装置３０の受光特性が向上する。 Furthermore, stray light reflected on the inner wall of the second resin layer 16 in a region formed thicker than the first resin layer 25 is collected by collecting the uncollimated light beam incident on the first resin layer 25. Incidence to the light receiving unit 12 can be further prevented. Therefore, the light receiving characteristics of the semiconductor device 30 are further improved. In other words, since the stray light reflected from the side surface of the opening 17 can be prevented from entering the light receiving portion 12, the light receiving characteristics of the semiconductor device 30 are improved.
　また、複数の半導体装置３０の集合体であるウエハの、各半導体装置３０に含まれる第１樹脂層２５を、任意の厚さで製造できる。 Further, the first resin layer 25 included in each semiconductor device 30 of a wafer that is an aggregate of a plurality of semiconductor devices 30 can be manufactured with an arbitrary thickness.
　また、本実施の形態に係る半導体装置３０の製造方法も、実施の形態１に係る半導体装置１０の製造方法と同様に、ダイシング工程で、ダイシングブレード４０は、第１樹脂層２５を切削せず、第１樹脂層２５の側面を覆うように設けられている第２樹脂層１６を切削する。 Also, the manufacturing method of the semiconductor device 30 according to the present embodiment is the same as the manufacturing method of the semiconductor device 10 according to the first embodiment, and the dicing blade 40 does not cut the first resin layer 25 in the dicing process. Then, the second resin layer 16 provided so as to cover the side surface of the first resin layer 25 is cut.
　よって、本実施の形態に係る半導体装置３０の製造方法は、実施の形態１に係る半導体装置１０の製造方法と同様に、個片チップのチッピング及び、ダイシングブレード４０の過度の破損を防止でき、高歩留まりな半導体装置３０を製造できる。 Therefore, the manufacturing method of the semiconductor device 30 according to the present embodiment can prevent chipping of individual chips and excessive damage of the dicing blade 40, as in the manufacturing method of the semiconductor device 10 according to the first embodiment. A semiconductor device 30 with a high yield can be manufactured.
　なお、本実施の形態では、第２樹脂層１６を形成した後に第１樹脂層２５を形成したが、表面に曲率を有する第１樹脂層２５を形成する方法はこれに限らず、レジストを用いて第１樹脂層２５を形成した後に第２樹脂層１６を形成してもよい。具体的には、受光部１２を開口するようにレジストをパターニングした後、第１樹脂層材料Ｒ１をレジストの開口部に対してディスペンス法を用いて充填することにより第１樹脂層２５を形成してもよい。その後の第２樹脂形成工程においては、図５Ａ（ｃ）に示すような金型Ｄ２を用いる場合は、金型Ｄ２の凸部により第１樹脂層２５の曲率が圧縮変形する。よって、図２Ａ（ｅ）に示すようなフラット形状の金型Ｄ１を用いることが好ましい。 In the present embodiment, the first resin layer 25 is formed after the second resin layer 16 is formed. However, the method for forming the first resin layer 25 having a curvature on the surface is not limited to this, and a resist is used. The second resin layer 16 may be formed after the first resin layer 25 is formed. Specifically, after patterning the resist so as to open the light receiving portion 12, the first resin layer 25 is formed by filling the first resin layer material R <b> 1 into the opening portion of the resist using a dispensing method. May be. In the subsequent second resin formation step, when the mold D2 as shown in FIG. 5A (c) is used, the curvature of the first resin layer 25 is compressively deformed by the convex portion of the mold D2. Therefore, it is preferable to use a flat mold D1 as shown in FIG. 2A (e).
　以上、図面を参照してこの発明の実施の形態及び変形例を説明したが、この発明は、図示した実施の形態のものに限定されない。図示した実施の形態に対して、この発明と同一の範囲内において、あるいは均等の範囲内において、種々の修正や変形を加えることが可能である。言い換えると、発明の趣旨を逸脱しない限り、異なる実施の形態及び変形例の組み合わせや、当業者が思いつく各種変形を本実施の形態及び変形例に施したものも、本発明の範囲内に含まれる。 As mentioned above, although embodiment and modification of this invention were described with reference to drawings, this invention is not limited to the thing of embodiment shown in figure. Various modifications and variations can be made to the illustrated embodiment within the same range or equivalent range as the present invention. In other words, a combination of different embodiments and modifications, and various modifications conceived by those skilled in the art in the embodiments and modifications are also included in the scope of the present invention without departing from the spirit of the invention. .
　例えば、上記実施の形態１では、第２樹脂層１６は第１樹脂層１５の上面端部を覆っていたが、図６に示すように、第２樹脂層１６は第１樹脂層１５の側面のみを多い、上面端部を覆わないような構成でもよい。 For example, in the first embodiment, the second resin layer 16 covers the upper surface end of the first resin layer 15, but the second resin layer 16 is a side surface of the first resin layer 15 as shown in FIG. 6. A configuration in which the upper end portion is not covered may be employed.
　また、上記各実施の形態では、第２樹脂層１６は第１樹脂層より厚く形成されていたが、図７に示すように、第２樹脂層１６の厚さと、第１樹脂層１５の厚さとは、同じであってもよい。言い換えると、第１樹脂層１５の上面と、第２樹脂層１６の上面とは実質的に面一であってもよい。 In each of the above embodiments, the second resin layer 16 is formed thicker than the first resin layer. However, as shown in FIG. 7, the thickness of the second resin layer 16 and the thickness of the first resin layer 15 are formed. May be the same. In other words, the upper surface of the first resin layer 15 and the upper surface of the second resin layer 16 may be substantially flush.
　また、半導体装置はさらに、第２樹脂層１６の内壁を覆い、可視光の反射を防止する反射防止膜を備えてもよい。 The semiconductor device may further include an antireflection film that covers the inner wall of the second resin layer 16 and prevents reflection of visible light.
　図８は、反射防止膜を有する半導体装置の構造の一例を示す断面図である。 FIG. 8 is a cross-sectional view showing an example of the structure of a semiconductor device having an antireflection film.
　同図に示す半導体装置は、図１Ａに示す実施の形態１に係る半導体装置１０と比較して、さらに、第２樹脂層１６の内壁を覆い、可視光の反射を防止する反射防止膜３５を備える。このように、第２樹脂層１６の内壁を覆う反射防止膜３５により、第２樹脂層１６の内壁で反射される迷光を防止し、半導体装置の受光特性の劣化を軽減することができる。この反射防止膜３５は、例えば、スパッタ法又はシート貼り付け工程を用いて形成すればよい。 Compared with the semiconductor device 10 according to the first embodiment shown in FIG. 1A, the semiconductor device shown in FIG. 1A further includes an antireflection film 35 that covers the inner wall of the second resin layer 16 and prevents reflection of visible light. Prepare. As described above, the antireflection film 35 covering the inner wall of the second resin layer 16 can prevent stray light reflected on the inner wall of the second resin layer 16 and reduce deterioration of the light receiving characteristics of the semiconductor device. The antireflection film 35 may be formed using, for example, a sputtering method or a sheet attaching process.
　また、図９に示すように、半導体装置は、半導体素子１１と、半導体素子１１の表面に設けられた複数の受光部１２と、半導体素子１１の表面に、複数の受光部１２を覆うように、半導体素子１１よりも小さい領域に設けられた第１樹脂層１５と、半導体素子１１の表面上に、第１樹脂層１５の側面を覆うように設けられた第２樹脂層１６とを備えてもよい。 As shown in FIG. 9, the semiconductor device includes a semiconductor element 11, a plurality of light receiving parts 12 provided on the surface of the semiconductor element 11, and a plurality of light receiving parts 12 covered on the surface of the semiconductor element 11. A first resin layer 15 provided in a region smaller than the semiconductor element 11, and a second resin layer 16 provided on the surface of the semiconductor element 11 so as to cover the side surface of the first resin layer 15. Also good.
　また、上記実施の形態１では、半導体装置１０の第１樹脂層１５をエッチングにより形成したが、実施の形態２に係る半導体装置１０の第１樹脂層２５と同様に、ディスペンスにより形成してもよい。 In the first embodiment, the first resin layer 15 of the semiconductor device 10 is formed by etching. However, similarly to the first resin layer 25 of the semiconductor device 10 according to the second embodiment, the first resin layer 15 may be formed by dispensing. Good.
　第１樹脂層１５をディスペンス法により形成するには、スピンコート法と同様に、まずレジスト３１をパターニングする。そして、ディスペンス法を用いて、第１樹脂層材料Ｒ１をレジスト３１の開口部に対して充填すればよい。このとき、第１樹脂層材料Ｒ１の充填量はレジスト３１の開口部の容積で適宜決定すればよい。第１樹脂層材料Ｒ１は、レジスト３１により支えられるので熱硬化前の第１樹脂層材料Ｒ１の形状を精度よく形成することが出来る。つまり、第１樹脂層１５の形状を、高い精度で形成できる。以降の工法はスピンコート法と同様である。なお、このようにレジスト３１を形成せず、第１樹脂層材料Ｒ１を受光部１２上にディスペンス法を用いて形成しても良いが硬化前の第１樹脂層材料Ｒ１の形状を精度よく保つのは困難である。つまり、第１樹脂層１５の形状を、高い精度で形成することは困難である。 In order to form the first resin layer 15 by the dispensing method, the resist 31 is first patterned similarly to the spin coating method. And what is necessary is just to fill 1st resin layer material R1 with respect to the opening part of the resist 31 using the dispensing method. At this time, the filling amount of the first resin layer material R <b> 1 may be appropriately determined by the volume of the opening of the resist 31. Since the first resin layer material R1 is supported by the resist 31, the shape of the first resin layer material R1 before thermosetting can be accurately formed. That is, the shape of the first resin layer 15 can be formed with high accuracy. The subsequent construction method is the same as the spin coating method. Although the resist 31 is not formed in this way, the first resin layer material R1 may be formed on the light receiving portion 12 by using a dispensing method, but the shape of the first resin layer material R1 before curing is accurately maintained. It is difficult. That is, it is difficult to form the first resin layer 15 with high accuracy.
　また、上記実施の形態では、第２樹脂層１６のガラス転移温度Ｔｇ２は、７０℃≦Ｔｇ２≦２００℃であるとしたが、第２樹脂層１６のガラス転移温度Ｔｇ２はこれに限らず、第１樹脂層１５のガラス転移温度Ｔｇ１より高ければよい。言い換えると、第２樹脂層１６の硬度は第１樹脂層１５の硬度より高ければよい。 In the above embodiment, the glass transition temperature Tg2 of the second resin layer 16 is 70 ° C. ≦ Tg2 ≦ 200 ° C. However, the glass transition temperature Tg2 of the second resin layer 16 is not limited to this. What is necessary is just to be higher than the glass transition temperature Tg1 of 1 resin layer 15. In other words, the hardness of the second resin layer 16 only needs to be higher than the hardness of the first resin layer 15.
　また、上記実施の形態において、半導体装置１０は、受光部１２を有したが、受光部１２に代わり自発光する発光部を有しても良い。 In the above-described embodiment, the semiconductor device 10 includes the light receiving unit 12, but may include a light emitting unit that emits light instead of the light receiving unit 12.
　また、上記実施の形態では、貫通孔１８及び貫通電極１９は、第１樹脂層が形成された後に形成されていたが、第１樹脂層が形成される前に形成されてもよいし、第２樹脂層が形成される前に形成されてもよい。 Moreover, in the said embodiment, although the through-hole 18 and the through-electrode 19 were formed after the 1st resin layer was formed, they may be formed before the 1st resin layer is formed, It may be formed before the two resin layers are formed.
　本発明の半導体装置は、光ピックアップ装置及び固体撮像素子をはじめ、フォトダイオード、レーザーモジュール等の各種半導体装置や各種モジュールに特に好適である。 The semiconductor device of the present invention is particularly suitable for various semiconductor devices and various modules such as an optical pickup device and a solid-state imaging device, as well as a photodiode and a laser module.
１０、３０　　半導体装置
１１、１０１　　半導体素子
１２　　受光部
１３、１０４Ａ　　周辺回路領域
１４　　電極領域
１５、２５　　第１樹脂層
１６　　第２樹脂層
１７　　開口部
１８　　貫通孔
１９、１０７　　貫通電極
２０　　充填層
２１、１０９　　絶縁層
２２、１１０　　外部電極
３１、３２　　レジスト
３５　　反射防止膜
４０　　ダイシングブレード
１００　　固体撮像素子
１００Ａ　固体撮像装置
１０２　　撮像素子
１０３　　マイクロレンズ
１０４Ｂ　　電極配線
１０５　　接着層
１０６　　透光板
１０８　　金属配線
Ｄ１、Ｄ２　　金型
Ｒ１　　第１樹脂層材料
Ｒ２　　第２樹脂層材料 DESCRIPTION OF SYMBOLS 10, 30 Semiconductor device 11, 101 Semiconductor element 12 Light-receiving part 13, 104A Peripheral circuit area | region 14 Electrode area | region 15, 25 1st resin layer 16 2nd resin layer 17 Opening part 18 Through- hole 19, 107 Through-electrode 20 Filling layer 21, 109 Insulating layers 22 and 110 External electrodes 31 and 32 Resist 35 Antireflection film 40 Dicing blade 100 Solid-state imaging device 100A Solid-state imaging device 102 Imaging device 103 Microlens 104B Electrode wiring 105 Adhesive layer 106 Translucent plate 108 Metal wiring D1 and D2 Gold Mold R1 First resin layer material R2 Second resin layer material

Claims (30)

  1. 　半導体基板と、
    　前記半導体基板の表面に設けられた光学素子と、
    　前記半導体基板の表面上に、前記光学素子を覆うように、前記半導体基板の表面よりも小さい領域に設けられた第１樹脂層と、
    　前記半導体基板の表面上に、前記第１樹脂層の側面を覆うように設けられた第２樹脂層とを備える
    　半導体装置。     A semiconductor substrate;
    An optical element provided on the surface of the semiconductor substrate;
    On the surface of the semiconductor substrate, a first resin layer provided in a region smaller than the surface of the semiconductor substrate so as to cover the optical element;
    A semiconductor device comprising: a second resin layer provided on a surface of the semiconductor substrate so as to cover a side surface of the first resin layer.
  2. 　前記第２樹脂層の硬度は、前記第１樹脂層の硬度より高い
    　請求項１に記載の半導体装置。     The semiconductor device according to claim 1, wherein the hardness of the second resin layer is higher than the hardness of the first resin layer.
  3. 　前記第１樹脂層は、可視光に対して透明なシリコーン樹脂である
    　請求項１又は２に記載の半導体装置。     The semiconductor device according to claim 1, wherein the first resin layer is a silicone resin that is transparent to visible light.
  4. 　前記第１樹脂層の表面から前記第２樹脂層の上面へ広がるように開口部を有し、
    　前記第１樹脂層の表面の一部が露出している
    　請求項１～３のいずれか１項に記載の半導体装置。     An opening extending from the surface of the first resin layer to the upper surface of the second resin layer;
    The semiconductor device according to any one of claims 1 to 3, wherein a part of a surface of the first resin layer is exposed.
  5. 　前記第２樹脂層のガラス転移温度Ｔｇは、７０℃≦Ｔｇ≦２００℃である
    　請求項１～４のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 4, wherein a glass transition temperature Tg of the second resin layer is 70 ° C ≤ Tg ≤ 200 ° C.
  6. 　前記第２樹脂層はさらに、前記第１樹脂層の表面端部を覆う
    　請求項１～５のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 5, wherein the second resin layer further covers a surface end portion of the first resin layer.
  7. 　前記第２樹脂層は、前記第１樹脂層よりも前記半導体基板の厚さ方向に厚く形成され、
    　前記第２樹脂層のうち前記第１樹脂層よりも厚く形成されている領域の前記第２樹脂層の内壁と、前記半導体基板の表面とがなす角は、８０°以下である
    　請求項１～６のいずれか１項に記載の半導体装置。     The second resin layer is formed thicker in the thickness direction of the semiconductor substrate than the first resin layer,
    The angle formed by the inner wall of the second resin layer in a region formed thicker than the first resin layer in the second resin layer and the surface of the semiconductor substrate is 80 ° or less. 7. The semiconductor device according to claim 6.
  8. 　前記第２樹脂層のうち前記第１樹脂層よりも厚く形成されている領域の前記第２樹脂層の内壁と、前記半導体基板の表面とがなす角は、４５°以下である
    　請求項７に記載の半導体装置。     The angle formed by the inner wall of the second resin layer in a region formed thicker than the first resin layer in the second resin layer and the surface of the semiconductor substrate is 45 ° or less. The semiconductor device described.
  9. 　前記第１樹脂層の表面は曲率を有する
    　請求項１～８のいずれか１項に記載の半導体装置。     The semiconductor device according to claim 1, wherein a surface of the first resin layer has a curvature.
  10. 　前記第２樹脂層は、可視光に対して不透明である
    　請求項１～９のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 9, wherein the second resin layer is opaque to visible light.
  11. 　前記半導体基板の端面と前記第２樹脂層の端面とは実質的に面一である
    　請求項１～１０のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 10, wherein an end surface of the semiconductor substrate and an end surface of the second resin layer are substantially flush with each other.
  12. 　さらに、前記第２樹脂層の内壁を覆い、可視光の反射を防止する反射防止膜を備える
    　請求項１～１１のいずれか１項に記載の半導体装置。     The semiconductor device according to claim 1, further comprising an antireflection film that covers an inner wall of the second resin layer and prevents reflection of visible light.
  13. 　前記第２樹脂層の表面は平坦である
    　請求項１～１２のいずれか１項に記載の半導体装置。     The semiconductor device according to claim 1, wherein a surface of the second resin layer is flat.
  14. 　さらに、
    　前記半導体基板の表面に設けられ、前記光学素子からの信号を伝達する、又は、前記光学素子に信号を伝達する電極領域と、
    　前記半導体基板を厚さ方向に貫通する貫通孔と、
    　前記貫通孔の内壁上に設けられ、前記電極領域の裏面に接し、前記半導体基板の裏面まで延びる貫通電極とを備える
    　請求項１～１３のいずれか１項に記載の半導体装置。     further,
    An electrode region provided on the surface of the semiconductor substrate for transmitting a signal from the optical element, or transmitting a signal to the optical element;
    A through hole penetrating the semiconductor substrate in the thickness direction;
    The semiconductor device according to claim 1, further comprising a through electrode provided on an inner wall of the through hole and in contact with a back surface of the electrode region and extending to the back surface of the semiconductor substrate.
  15. 　さらに、前記貫通孔の内部に充填された充填層を備える
    　請求項１２～１４のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 12 to 14, further comprising a filling layer filled in the through hole.
  16. 　さらに、前記貫通電極上の一部を除外して、前記半導体基板の裏面を覆う絶縁層を備える
    　請求項１４又は１５に記載の半導体装置。     Furthermore, the semiconductor device of Claim 14 or 15 provided with the insulating layer which excludes a part on the said penetration electrode and covers the back surface of the said semiconductor substrate.
  17. 　さらに、前記貫通電極上の前記絶縁層が覆われていない部分に設けられ、前記貫通電極と電気的に接続された外部電極を備える
    　請求項１６に記載の半導体装置。     The semiconductor device according to claim 16, further comprising an external electrode that is provided in a portion of the through electrode that is not covered with the insulating layer and is electrically connected to the through electrode.
  18. 　半導体基板と、
    　前記半導体基板の表面に設けられた複数の光学素子と、
    　前記半導体基板の表面に、前記複数の光学素子を覆うように、前記半導体基板の表面よりも小さい領域に設けられた第１樹脂層と、
    　前記半導体基板の表面上に、前記第１樹脂層の側面を覆うように設けられた第２樹脂層とを備える
    　半導体装置。     A semiconductor substrate;
    A plurality of optical elements provided on the surface of the semiconductor substrate;
    A first resin layer provided in a region smaller than the surface of the semiconductor substrate so as to cover the plurality of optical elements on the surface of the semiconductor substrate;
    A semiconductor device comprising: a second resin layer provided on a surface of the semiconductor substrate so as to cover a side surface of the first resin layer.
  19. 　表面に光学素子を備える半導体基板を準備する工程と、
    　前記半導体基板の表面上に、前記光学素子を覆うように、前記半導体基板の表面よりも小さい領域に第１樹脂層を形成する工程（ａ）と、
    　前記半導体基板の表面上に、前記第１樹脂層を覆うように第２樹脂層を形成する工程（ｂ）と、
    　前記第２樹脂層を前記第１樹脂層の側面が露出しないように開口させる工程（ｃ）とを含む
    　半導体装置の製造方法。     Preparing a semiconductor substrate having an optical element on the surface;
    Forming a first resin layer in a region smaller than the surface of the semiconductor substrate so as to cover the optical element on the surface of the semiconductor substrate; and
    A step (b) of forming a second resin layer on the surface of the semiconductor substrate so as to cover the first resin layer;
    And a step (c) of opening the second resin layer so that a side surface of the first resin layer is not exposed.
  20. 　前記工程（ｃ）では、前記第２樹脂層の内壁と前記半導体基板の表面とのなす角が８０°以下となるように前記第２樹脂層を開口させる
    　請求項１９に記載の半導体装置の製造方法。     The manufacturing method of a semiconductor device according to claim 19, wherein in the step (c), the second resin layer is opened so that an angle formed by an inner wall of the second resin layer and a surface of the semiconductor substrate is 80 ° or less. Method.
  21. 　前記工程（ｃ）では、前記第２樹脂層の内壁と前記半導体基板の表面とのなす角が４５°以下となるように前記第２樹脂層を開口させる
    　請求項１９に記載の半導体装置の製造方法。     20. The semiconductor device according to claim 19, wherein in the step (c), the second resin layer is opened so that an angle formed by an inner wall of the second resin layer and a surface of the semiconductor substrate is 45 ° or less. Method.
  22. 　さらに、前記第２樹脂層を、可視光に対して不透明とする工程を含む
    　請求項１９～２１のいずれか１項に記載の半導体装置の製造方法。     The method for manufacturing a semiconductor device according to any one of claims 19 to 21, further comprising a step of making the second resin layer opaque to visible light.
  23. 　前記半導体基板は表面に、前記光学素子からの信号を伝達する、又は、前記光学素子に信号を伝達する電極領域を有し、
    　前記半導体装置の製造方法は、さらに、
    　前記半導体基板を厚さ方向に貫通する貫通孔を形成する工程と、
    　形成された前記貫通孔の内壁上に、前記電極領域の裏面に接し、前記半導体基板の裏面まで延びる貫通電極を形成する工程とを含む
    　請求項１９～２２のいずれか１項に記載の半導体装置の製造方法。     The semiconductor substrate has an electrode region on the surface for transmitting a signal from the optical element, or transmitting a signal to the optical element,
    The method for manufacturing the semiconductor device further includes:
    Forming a through-hole penetrating the semiconductor substrate in the thickness direction;
    The semiconductor device according to any one of claims 19 to 22, further comprising: forming a through electrode on the inner wall of the formed through hole so as to contact the back surface of the electrode region and extend to the back surface of the semiconductor substrate. Manufacturing method.
  24. 　前記貫通電極を形成する工程では、さらに、前記貫通孔の内部に充填層を充填する
    　請求項２３に記載の半導体装置の製造方法。     The method for manufacturing a semiconductor device according to claim 23, wherein in the step of forming the through electrode, a filling layer is further filled in the through hole.
  25. 　さらに、前記貫通電極上の一部を除外して、前記半導体基板の裏面を覆う絶縁層を形成する工程（ｄ）を含む
    　請求項２３又は請求項２４に記載の半導体装置の製造方法。     The method for manufacturing a semiconductor device according to claim 23, further comprising a step (d) of forming an insulating layer that covers a back surface of the semiconductor substrate, excluding a part on the through electrode.
  26. 　さらに、前記貫通電極上の前記絶縁層が覆われていない部分に、前記貫通電極と電気的に接続される外部電極を形成する工程（ｅ）を含む
    　請求項２５に記載の半導体装置の製造方法。     26. The method of manufacturing a semiconductor device according to claim 25, further comprising a step (e) of forming an external electrode electrically connected to the through electrode in a portion where the insulating layer on the through electrode is not covered. .
  27. 　前記工程（ａ）の後に、前記工程（ｂ）と前記工程（ｄ）と前記工程（ｃ）と前記工程（ｅ）とをこの順で行う
    　請求項２６に記載の半導体装置の製造方法。     27. The method for manufacturing a semiconductor device according to claim 26, wherein the step (b), the step (d), the step (c), and the step (e) are performed in this order after the step (a).
  28. 　前記工程（ａ）の後に、前記工程（ｂ）と前記工程（ｃ）とを同時に行う
    　請求項１９～２６のいずれか１項に記載の半導体装置の製造方法。     The method for manufacturing a semiconductor device according to any one of claims 19 to 26, wherein the step (b) and the step (c) are simultaneously performed after the step (a).
  29. 　前記工程（ｂ）及び前記工程（ｃ）の後に、前記工程（ａ）を行う
    　請求項１９～２６のいずれか１項に記載の半導体装置の製造方法。     The method for manufacturing a semiconductor device according to any one of claims 19 to 26, wherein the step (a) is performed after the step (b) and the step (c).
  30. 　前記第２樹脂層のガラス転移温度Ｔｇは、７０℃≦Ｔｇ≦２００℃であり、
    　前記半導体装置の製造方法は、さらに、
    　前記工程（ｂ）で形成された前記第２樹脂層にダイシングブレードを当接することによりダイシングする工程を含む
    　請求項１９～２９のいずれか１項に記載の半導体装置の製造方法。     The glass transition temperature Tg of the second resin layer is 70 ° C. ≦ Tg ≦ 200 ° C.
    The method for manufacturing the semiconductor device further includes:
    The method for manufacturing a semiconductor device according to any one of claims 19 to 29, further comprising a step of dicing by bringing a dicing blade into contact with the second resin layer formed in the step (b).
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