JPS63269528A - Charged particle beam generation device - Google Patents

Abstract

PURPOSE:To realize a miniaturized and highly accurate device by a method wherein a vacuum isolation wall is installed at a charged particle beam generation source and a means to control a charged particle beam is installed at the isolation wall and/or a charged particle is detected so that plural electron sources or the like can be formed integrally on a single substrate. CONSTITUTION:While each EB source is deflected by its X-direction deflecting electrodes X11, X22 in an X-direction and a drawing operation is executed in the X- direction within a range to be covered by a deflection on the basis of the drawing information from memories MU, M1, a wafer WF and head MB are continuously shifted relatively in a Y-direction. By this setup, all picture elements in the Y-direction in a 1/2 region are drawn. An EB emission head where two or more EB generation sources ES1, ES2 are installed as a unit EB generation source constitutes a number of chambers by using parts V1-V3 or the like; a degree of vacuum is lowered in order of a first chamber-a third third chamber; a vacuum chuck VC for suction of the wafer WF can be used. During this process, sensors S11, S12 are attached to the rear surface of the part V1 or the like. If a part to mount a focusing lens FC and a deflecting electrode AD is constituted to be of multiple chamber structure and the degree of vacuum is lowered in regular order, an EP exposure operation can be executed in the air.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a charged beam generator, and particularly to a device that emits an electron beam from a thin substrate to directly draw an actual element pattern on a surface such as a sea urchin. The present invention relates to a charged beam generator suitable for use.

[Prior Art] Conventionally, as an electron generation source in a charged beam device, etc.
Those that utilize thermionic emission from a hot cathode were used. Electron emission using such a hot cathode has the disadvantages that there is a large energy loss due to heating, that it is necessary to form a heating means, that it takes a considerable amount of time for preheating, and that the system is easily destabilized by heat. There was a problem with that.

Therefore, research into electron-emitting devices that do not rely on heating is progressing, and several types of devices have been proposed.

For example, a type in which a reverse bias voltage is applied to a PN junction to cause an electron avalanche breakdown phenomenon and emit electrons to the outside of the device (Japanese Unexamined Patent Publication No. 111272/1983, U.S. Patent No. 425
9678) or has a metal-insulator layer-metal layer structure, and by applying a voltage between the two metals, the electrons that have passed through the insulator layer are transferred from the metal layer to the outside of the element due to the tunnel effect. There are surface conduction type types that emit electrons from the surface of the thin film to the outside of the element by applying a voltage to a high-resistance thin film in a direction perpendicular to the film thickness direction. A field-effect type (FE type) in which a voltage is applied to a metal whose shape tends to cause electric field concentration to generate a locally high-density electric field and emit electrons from the metal to the outside of the element;
Others have been proposed.

As an application example of these electron-emitting devices, an electron-emitting device is constructed by arranging a plurality of electron-emitting sources, and electrons are emitted in a desired pattern by controlling ON/OFF of electron emission from each electron-emitting source. It is conceivable that the medium is collided with a medium, for example, the surface of a workpiece, and surface processing or surface modification is performed by electron beam exposure. A conceivable example of such an electron-emitting device is one in which a large number of electron-emitting elements are densely arranged. With such an electron emitting device, the surface of the workpiece can be exposed to electron beams in a two-dimensional pattern by placing the workpiece facing the car and controlling each electron-emitting element on and off. can.

[Problems to be Solved by the Invention] However, at present, it is difficult to mass-produce such an electron-emitting device in which a large number of electron-emitting sources are densely arranged with a high yield. In addition, there are problems such as heat generation and interference between adjacent electron beams.

Furthermore, in the conventional example described above, the device is larger or more complicated due to the need for a vacuum chamber, and the individual parts are separated, so that no improvement in accuracy can be expected.

On the other hand, for example, in electron beam lithography on semiconductors, etc., there is a demand for an electron beam device that can perform beam irradiation more efficiently and accurately in order to cope with the increasing integration of circuits.

Based on this viewpoint, an object of the present invention is to provide a simple and compact charged beam generator that does not necessarily require a vacuum chamber.

[Means and operations for solving the problems] In order to achieve the above object, the present invention provides a charged beam generation device that drives a charged beam generation source to emit a charged beam.
A vacuum shielding wall is provided at the charged beam generation source, and means for controlling the charged beam and/or means for detecting charged particles are disposed on the shielding wall.

Therefore, even if the apparatus is placed in the atmosphere, the beam emitting part can be kept in a vacuum, so that, for example, an object to be irradiated with a charged beam can be held by a vacuum chuck. In addition, if the barrier wall has a multi-chamber structure and the degree of vacuum is increased in stages, problems due to contamination can be avoided by providing the above-mentioned detection means in the inner high-vacuum section.

[Example] The present invention will be explained below with reference to the drawings.

FIG. 1 is a schematic diagram showing a configuration when a charged beam device according to an embodiment of the present invention is applied to exposure of a semiconductor pattern. In the figure, WF is a wafer made of a semiconductor such as silicon or gallium, and is coated with a resist that is sensitive to (exposure to) an electron beam. CPI to CPn indicate a plurality of exposure areas, which are cut out into one chip after completion of drawing. M1 to M8 are pre-alignment or fine alignment marks provided on the wafer WF. MB is a head for generating an electron beam (hereinafter referred to as EB), and is mounted on and attracted to the stage MS. The alignment marks M1 to M8 are drawn by the EB of this head during the first drawing process. The stage MS is a piezoelectric element Px such as a piezo.

Py and pθ allow slight B movements in the x, y, and θ (rotational) directions, respectively. Each element Px, Py.

Pθ is used for alignment with the wafer WF. Head M
B is provided with an EB generation source ESOP-ES15.

EB sources ESO and E S 15 are for positioning only, and E
The B generation sources ESI to E S 14 are used exclusively for exposure or for alignment. Here, the exposure EB generation source ES
Two of I to E S 14 are allocated for drawing each chip row in the X direction of the wafer WF.

That is, for example, the upper half region CPILI of the chip (exposure region) CPI is drawn by the EB generation source E-3l, and the lower half region CPIL is drawn by the EB generation source ES2. Similarly, the upper half of each of the exposure regions CP2 to CP5 is drawn by the EB generation source ES1, and the lower half is drawn by the EB generation source ES2. Each EB source ESO ~ ES15km is X and Y respectively.
direction (D E B (7) (m inner electrodes Xi, X2.
Yl and Y2 prepare and prepare. Additionally, sensors S1 to S39, etc. are provided. These sensors may be photosensitive or electronically sensitive.

KB is a keyboard, DP is a display, and CAD is a controller. When a circuit pattern for one chip is designed by these and the information is sent to the one-chip pattern generator PG, the pattern generator PG divides the drawing information for one chip into upper half and lower half drawing information for each station chip. Send to memory MU, ML. Each memory MU
.

ML sends this drawing information to EB source E, which is in charge of the upper half of the chip.
SI, ES3. ES5 to ES13 and EB source ES2 in charge of the lower half. ES4. It is sent to each of ES6 to ES14 at the same time. However, the memory MU and ML are each 2
By using them alternately, data transfer time loss from the pattern generator PG is substantially eliminated.

Based on the writing information from the memories MLI and ML, each EB source is deflected in the X direction by its X direction deflection electrodes Xi and X2, thereby performing writing in the X direction within the range that can be covered by the deflection. By continuously moving MB six times in the Y direction, all pixels in the Y direction of the % area are drawn. However, since the movement in the Y direction is continuous, a shift in the Y direction occurs when drawing in the X direction for each pixel in the Y direction, so the deflection electrode Yl in the Y direction,
This is corrected using Y2. Then, one chip row in the Y direction is drawn by repeating this drawing while intermittently moving the wafer WF and head MB relatively in the X direction.

In this way, each EB source substantially simultaneously targets one chip row in the Y direction of the wafer WF, for example DP6°CPI3. C.P.
2O, DP27. Since the DP34 is used for drawing, high-speed drawing is possible.

The deflection electrodes Xi, X2. Yl and Y2 are commonly used for initial alignment of the axis of the EB and alignment with the wafer or chip. For example, alignment mark M4 of chip CPI
．． The position of M5 is determined by sensor S4. S5 reads, and based on the read information, X, Y of each of EB source ESI and ES2.
Deflection electrodes Xi, X2. EB by correction drive of Yl and Y2
Correct the irradiation position. This chip alignment mark is, for example, mark M6, between chip CP6 and CP.
It is also possible to share I3.

On the other hand, marks Ml,
M2. M7. M8 etc. are provided.

Then, for example, the position of the mark M1 is read by a sensor S1, and the position of the mark M2 is read by a sensor (not shown), and based on this, the initial positioning of the head MB is performed by the piezoelectric elements Px, Py, and Pθ. Then, in this state, the amount of deviation is measured using the chip alignment mark M3, sensor S3, etc., and based on the measurement result, the deflection electrode
i.

X2. Drawing is performed with the position corrected by Yl and Y2. Also, stop once in the middle of drawing and mark M7. Realignment may be performed using M8.

Although various mark detection methods are possible in these cases, for example, a well-known reflection or secondary electron detection method can be used. That is, for example, the position of the mark M7 can be known by emitting EB from the EB source ESO toward the mark M7 and detecting its reflection or secondary electrons by the sensor S7. As the sensor 7, for example, a semiconductor PN junction is used.

However, in the case of mark detection using such EB, E
The intensity and irradiation time of B need to be set to values that do not interfere with mark reading.

Furthermore, when detecting multiple marks at once, it is preferable to perform EB heat irradiation on each mark at different timings and detect them at different timings.
B thermal irradiation can be easily differentiated and detected by a single signal processing means.

Furthermore, when a photosensitive element such as a COD is used as a sensor, it is obvious that a light source may be provided instead of the EB source.

FIG. 2(a) is a partial bottom view showing an example of the EB emission head MB, and shows one EB emission source. Figure 2 (
b) and FIG. 2(c) are a BB sectional view and a CC sectional view, respectively.

In FIG. 2, GL is an insulating substrate, and the substrate is made of, for example, glass, ceramics, crystal, or the like. The substrate GL
On the bottom surface of the B-
A large number of them are arranged in one row in the B direction. This EB emission source consists of a high resistance thin film R3 attached to the lower surface of the substrate GL and an electrode D.
It has I and D2. High resistance thin 111R5 is, for example, P
Metal thin films such as t%Au%μ0, C, Pd, SnO,, I
It is formed by applying high temperature current to a metal oxide thin film such as n2O3 or TiO to cause the film to break. The thickness of the high resistance thin film R3 is, for example, about 100 to 10,000,
The resistance is, for example, on the order of several Ω to several hundred MΩ. As shown in the figure, electrodes Di and D2 are connected to both ends of the high-resistance thin film R3 in the CC direction. The electrode is, for example, PL,
This is a general thin film electrode made of metal such as Au or Ag.

An insulating layer IS is formed on the lower surface of the substrate GL so as to cover the electrodes Di and D2, except for the portion below the high-resistance thin film [R3]. The insulating layer is made of, for example, 5i02, SiN%
513N4%AIN%BN etc. Insulation IIs
A pair of deflection electrodes X1-X2 and Yl-Y2 are provided on the lower surface of the high-resistance thin film R3 in parallel to each of the B-B and C-C directions.
is located. The deflection electrode is also made of the same material as the electrodes DI and D2.

S9. SIO is the aforementioned optical sensor or electronic sensor. These sensors may be further provided one pair in the Y direction, or may be provided in an annular shape. When the EB generation source and the sensor are integrally formed in this manner, the positional relationship between the sensor and the EB generation source is fixed, thereby improving detection accuracy. When using an optical sensor, it is preferable that an alignment light source LP is also built into the head MB, as shown in FIG. 2(C).

When using a solid state device such as a light emitting diode as the light source LP, semiconductor manufacturing technology, thick film
They can be molded simultaneously using thin film manufacturing technology.

Further, when an ultraviolet or even far ultraviolet light source is used as the light source LP, it can also be used for stimulating the resist WR on the wafer WF. If this is done before the EB exposure, a thin, hard-to-dissolve layer will be formed on the surface of the resist WR, which is
B It becomes even more difficult to dissolve due to the dew point. According to this, the ratio of the film thickness to the drawn line width can be increased, which improves sensitivity or resolution (aspect ratio), which is preferable. As a resist, for example, the product name r RD
200ON J (manufactured by Hitachi Chemical) can be used. In addition, when the light source LP is built into the head MB, preliminary exposure can be performed at six times relative to the wafer WF, which has the advantage that the entire apparatus can be made smaller.

Furthermore, the thin film RS (electron emitting part) may be irradiated with this far ultraviolet light source LP during exposure. This is preferable because the number of emitted electrons increases. Further, when the light source LP is a visible light source, the same effect can be obtained if the thin film RS is made of a so-called light shade rod material. Examples of photocathode materials include alkali metals, Ag, Bi, and Sb.
A material that exhibits semiconducting properties as a composite material with silver-cesium material,
Various antimony-cesium materials, bismuth-cesium materials, and multi-alkali materials can be used.

In addition, as an EB source, there are also
A semiconductor made of a semiconductor disclosed in Japanese Patent No. 1272 (USP No. 4259678) may also be used. Alternatively, the thin film RS may be irradiated with the light source LP only when drawing a thick line width.

Figure 3 shows multiple EB generation sources ESI and ES2 as one unit of E
FIG. 3 is a partial cross-sectional view showing an example of an EB emission head set as a B generation source. According to this example, a large amount of electrons can be emitted even when driven at a low voltage, which is preferable.

Also here, if light irradiation is added as before, the efficiency will be even better. Also, the thin line indicates a single EB source, and the thick line indicates multiple EB sources.
By drawing with the B source, the drawing speed can be improved.

Further, a focusing lens FC, a deflection electrode AD, etc. may be attached. Furthermore, if the member to which the lens FC and the electrode AD are attached has a multi-chamber structure and the degree of vacuum is gradually lowered, EB exposure in the atmosphere becomes possible. That is, as shown in the figure, member V1. V2. Forming multiple chambers with V3 etc., 1 st.

The degree of vacuum may be lowered in the order of 2nd and 3rd. In this way, the vacuum chuck V can be used for suctioning the wafer WF.
C can also be used. Also, at this time, the sensor Sl
1 and S12 may be attached to the lower surface of the member vl or the like.

FIG. 4 is a partial sectional view showing yet another example of an EB emission head. In the figure, BG is the EB emission source explained above, but as mentioned above, when the electron beam EB is irradiated from here to the wafer mark WM, secondary electrons and reflected electrons 2E are generated from the wafer WF. do. and,
A sensor, for example P/
Wafer mark WM is detected by receiving at N junction PN. However, here, in order to detect electrons efficiently, annular electrodes C1 and C2 are attached to the substrate MB side. Further, a voltage VeX is applied between the electrode C1 and the EB generation source BG, and a voltage Vd% is applied to the electrode C2.
A voltage Vc is connected between G and wafer WF as shown.

Therefore, for example, Vex=10-100V.

V c = 1 ~ IOK V and V d = 100 V
If both are applied, the secondary electrons and reflected electrons 2E will be P/
They can be efficiently collected at the N junction portion PN.

FIG. 5 is a schematic diagram showing a modification of the device shown in FIG. 1.

In the figure, the head MBI has four EBs per chip.
Sources ESI to ES4 were made to correspond to each other. Each E
The B source is equipped with X and Y deflection electrodes similar to the apparatus of FIG. In this case, for all chips, each 4
Since the two divided areas can be drawn simultaneously by the X and Y deflection electrodes using the same principle as in the case of FIG. 1, the drawing speed is further improved. Further, the head MBI is provided with an alignment mark MM, and alignment between this mark and the wafer alignment mark WMR is performed by light irradiation.

After this alignment, drawing is first performed on all the chips in the Y-direction chip row located below the head MBI at this time. Then, the other chip rows are also intermittent (
Step by step) and repeat the same positioning and drawing.

Since the wafer WF is usually circular, the wafer alignment mark WMR may not be provided for all the chip rows in the Y direction. At this time, alignment may be performed for only one row at the center of the wafer, and then exposure may be performed without feedback. Or first wafer WF
After alignment using the mark WMR in the center of
Exposure is advanced in the right direction, and when the right half is completed, it is reversed to the left, and the mark WMR is used again, or alignment is performed again using the alignment mark WML in the unexposed area, and then the exposure is performed in the left direction. It's okay.

In order to show still another alignment exposure method, a head MB2 is shown in FIG.

In this case, the head MB2 is initially located at the left end portion of the wafer WF, and first, the mark SM provided on the wafer stage is detected by the sensor S1 to perform pre-alignment. Next, in this state, mark Ml, M2 and sensor S
2. The amount of deviation is measured in S3. Then, during exposure, the exposure is performed while correcting the amount of deviation using both or either of the X and Y deflection electrodes. In the next column, the amount of deviation is measured using the mark M3 in the same manner as before, and exposure is performed based on the result. Further, the displacement amount measurement and exposure are performed in the same manner in the next column, but before that, re-prealignment may be performed using the mark WML.

In addition, the amount of deviation of the head positioned in that row is measured using mark M4, and after exposing the area covered by each EB source ES and electrodes Xi and X2 at that position, the head or wafer is continuously moved. When the chip row is completed, move the head or wafer to mark M.
It is also possible to stop at position 5 and perform the same operation as before. This can be said to be an intermediate type between the so-called step-and-repeat and step-and-scan exposure methods.

FIG. 6 shows another modification of the device shown in FIG.

FIG. 2A shows an example in which a plurality of heads MBI and MB2 are provided and are assigned to handle the right half and left half of the wafer WF, respectively. According to this, the throughput can be further improved.

FIG. 2B shows an example in which small-diameter wafers WFI and WF2 are exposed with a single head MB, and the throughput can also be improved.

The figure (c) is suitable for cases where it is difficult to manufacture a long head or for large diameter wafers WF of 8 inches or more.
Short head MBI, MB2. This is an example in which MB3s are arranged in the Y direction. At this time, since each end usually requires an alignment mark detection part, a strength reinforcement part, etc. as described above, it is preferable to arrange them in a staggered manner as shown in the figure.

In the same figure (d), multiple EB sources are provided in a single head MB,
In addition, the caliber of the emitted EB is made different. In other words, the EB sources ESI and ES2 are large diameter, and the EB source E
S3. ES4 is a medium diameter EB source, and EB sources ES5 to ES8... are small diameter EB sources. Usually, the EB sources ES5 to ES8 are used first.
. . is used to expose the medium and large line width portions for the time being, and then the medium and large line width portions are exposed using an EB source ES4. Expose using ES2 or the like. At this time,
The head or wafer is moved so that the corresponding line width portion of each chip can be exposed.

FIG. 7 is a schematic diagram showing still another modification. This E
The B emission head detects the wafer mark based on the magnitude of the current absorbed by the wafer WF, rather than using a sensor provided on the head side.

In the figure, WF is a wafer containing a semiconductor. GL
is a single substrate provided with respective generation sources BGI to BG7 of a plurality of electron beams EBI to EB7.
The substrates made of glass, semiconductor, etc. described in the above publication can be used. BS is a selection drive circuit for the electron beam generation sources BGI to BG7, CC is an overall control section, and AS is an electron beam absorption current detection circuit for detecting alignment marks WMI to WM7 on the sea urchin AWF. Also, if necessary, a second
and an electron lens, a deflection electrode, or a blanking electrode (not shown) as explained using FIG.

In this configuration, the alignment mark on the sea urchin AWF is now the solid line WM2. At the position of WM6, the actual circuit element pattern is inside it. Therefore, in this case, first,
Electron beam EB3. for drawing actual circuit element patterns. E
B4. EB5 is an electron beam EB2. for alignment mark detection. EB6 is selected by selection circuit BS. Next, electron beam EB2. Emits EBB and wafer WF
By detecting the magnitude of the current by a well-known method, mark WM2. Detects the position of WM6.

However, as mentioned above, the electron beams EB2 and EB6 are
They are emitted and detected at different timings so that they can be distinguished.

Based on this, the wafer WF is aligned, and then the electron beam EB3. EB4. By EB5, a circuit pattern is exposed as shown in FIG. 1 or FIG.

On the other hand, when the alignment mark is the broken line WM3°WM5, the electron beam EB3. EB5 is used, electron beam EB4 and/or EBI, EB2
．． EB6. EB7 is used for exposure. Also, the broken line WM
When I and WM7 are alignment marks, electron beam EBI.

EB7 is used for alignment, and electron beams EB2 to EB6 are used for exposure.

[Scope of Application of the Invention] The present invention is applicable not only to exposure (drawing) of a semiconductor circuit pattern using an electron beam as explained in the above embodiments, but also to data writing to a recording medium using a charged beam sensitive medium. , it can be applied to reading such data in combination with a charged particle sensor.

Specifically, it can be used for writing and reading purposes, for example, in recording and tracking of magneto-optical recording media such as optical disks and optical cards, or microfilm.

Further, it can be used as an electron beam probe tester for testing semiconductor functions by selecting an electron beam generation source depending on the chip size and measurement point. At this time, it is sufficient to prohibit the output of all electron beam sources other than the measurement electron beam source.

In addition, when the present invention is used for a plurality of applications, it is easy to make the output energy different for each application or even for each electron beam source, and this is suitable for use in the previous embodiment.

[Effect of the invention] As explained above, the present invention has the following effects.

(1) Exposure, etc. can be performed using a plurality of charged beam sources, so processing is quick.

(2) By appropriately arranging a plurality of charged beam generation sources, problems of heat generation and interference between beams can be avoided. Furthermore, since heat generation can be minimized, the durability of the device is excellent.

(3) Since a plurality of electron sources etc. can be integrally molded on a single substrate, it is possible to realize miniaturization and high precision of the device.

(4) Processing speed can be further improved by alternately using a plurality of buffers for writing (irradiation) pattern data and transferring the data to each charged beam generation source without interruption.

(5) Processing speed can be further improved by arranging a plurality of single substrates having a plurality of charged beam generation sources in parallel.

(6) By arranging a plurality of single substrates having a plurality of charged beam generation sources in series, it is possible to further improve the processing speed for large media.

(7) By irradiating the sensitive medium with ultraviolet rays or the like in advance, the aspect ratio of drawn or written information can be increased.

(8) When emitting an electron beam, by irradiating the electron beam emitting part of the electron beam source with ultraviolet rays, etc.
The efficiency of electron beam generation can be increased. Moreover, the beam intensity can also be adjusted by this.

(9) By configuring one charged beam generation source with a plurality of charged beam emission parts, it can be driven at low voltage.

It can emit large amounts of electrons. Furthermore, the beam intensity can be easily adjusted, and for example, the drawing speed can be improved by making it compatible with drawing thin lines and thick lines.

(10) By providing a vacuum barrier at the charged beam source, the device can be placed in the atmosphere, and therefore, for example, a vacuum chuck can be used for adsorbing the medium. Further, problems caused by contamination can be avoided by providing a sensor or the like in the high vacuum section.

(11) By providing a plurality of types of charged beam generating sources with different sizes of emitted beams, each charged beam generating source can be selectively used depending on the required beam size.

(12) By providing each charged beam generation source with a deflection means, a wide range can be irradiated with the charged beam even in a stationary state, and fine adjustment of the beam direction can be performed accurately and easily.

(13) By detecting alignment marks and the like using charged beams emitted in a time-series manner, alignment can be achieved without interference between charged beams, and detection beams can be easily distinguished.

(14) By providing a means for detecting the charged beam or the secondary or reflected electrons of the charged beam, alignment can be performed without providing a special light source and its detection means, making the device more compact and simple. can be converted into

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing the configuration of a charged beam device according to an embodiment of the present invention applied to exposure of semiconductor sea urchins, and FIG. 2 is a specific example of a head that can be used in the device shown in FIG. , where (a) is a bottom view and (b) is a partial view of (
BB sectional view of a), the same figure (C) is CC of the same figure (a)
3 and 4 are partial sectional views showing other examples of heads that can be used in the device shown in FIG. 1; FIG. 5 is a schematic view showing a modified example of the device shown in FIG. 1; This figure is a schematic diagram showing another modification of the device shown in FIG. 1, and FIG. 7 is a schematic diagram showing still another modification of the device shown in FIG. MB, MBI, MB2. MB, 3: Electron beam emission head, ES, ESONES15: Electron beam generation source, W
F, WFl, WF2: wafer, M1 to M8. W
M, WMI ~ WM7. WMR: alignment mark, S1-S12: sensor, Xi, X2. Yl, Y
2. AD: Deflection electrode, CP 1 to CP34. CPn:
Exposure area corresponding to 1 chip, MS: stage, Px
, Py. PG: piezoelectric element, CPIU: upper half region, CPIL: lower half region, PG: 1 chip pattern generator, Mυ
, ML: memory, GL two substrates, R5: high resistance thin film, DI
, D2: electrode, IS: insulating layer, LP: light source, WR resist, FC: focusing lens, PN: P/
N junction, EB, EBI to EB7: electron beam, CC: control section, AS: detection circuit.

Claims (1)

[Claims] 1. A charged beam generation source having a vacuum blocking wall, a drive control means for driving and controlling the charged beam generating source, and secondary charged particles or reflected charged particles provided on the vacuum blocking wall. A charged beam generator comprising: a detection means for detecting particles; and/or a beam control means for controlling a charged beam. 2. The charged beam generator according to claim 1, wherein the vacuum shielding wall has a multi-chamber structure in which the degree of vacuum is gradually increased, and the detection means is arranged in the innermost high vacuum part. . 3. The charged beam generation source has a plurality of charged beam emission parts, and the beam control means includes an electron lens and/or an electrode that unifies and/or deflects the plurality of charged beams emitted by the charged beam emission parts. A charged beam generator according to claim 1, which comprises: 4. The charged beam generator according to claim 1, wherein the detection means has a PN junction. 5. The charged beam generating device according to claim 1, wherein the detection means and/or the beam control means comprises one or more of a coil, a sensor, or an electrode. 6. The charged beam generating device according to claim 1, wherein a plurality of said charged beam generating sources are arranged on a single substrate.