JPH0722111B2 - Charged beam generator - Google Patents

Description

The present invention relates to a charged beam generator, and more particularly to an apparatus for emitting an electron beam from a thin substrate to directly write an actual element pattern on a wafer or the like. The present invention relates to a suitable charged beam generator.

[Prior Art] Conventionally, as an electron generation source in a charged beam apparatus or the like,
Those that utilize thermionic emission from the hot cathode have been used. Electron emission using such a hot cathode is said to have a large energy loss due to heating, the need to form a heating means, the time required for preheating to a considerable extent, and the system being easily destabilized by heat. There was a problem in terms.

Therefore, research on an electron-emitting device that does not rely on heating has been advanced, and several types of devices have been proposed.

For example, a type in which a reverse bias voltage is applied to a PN junction to cause an electron avalanche breakdown phenomenon and electrons are emitted to the outside of the element (see Japanese Patent Publication No. 54-111272 and US Pat. No. 4259678).
Or a type that has a structure of metal-insulator layer-metal layer and emits electrons that have passed through the insulator layer by tunnel effect from the metal layer to the outside of the element by applying a voltage between the two metals. (MIM type) type, surface conduction type that applies a voltage to the high resistance thin film in the direction orthogonal to the film thickness direction and emits electrons from the thin film surface to the outside of the element, shape that easily causes electric field concentration A field effect type (FE type) type in which a voltage is applied to the metal to locally generate a high-density electric field to emit electrons from the metal to the outside of the element, and other types have been proposed.

As an application example of these electron-emitting devices, an electron-emitting device is configured by arranging a plurality of electron-emitting sources, and the ON-OFF of the electron emission from each electron-emitting source is controlled to perform electron emission in a desired pattern. Then, it is conceivable to collide with a medium, for example, the surface of an object to be processed to perform surface processing or surface alteration by electron beam exposure. As such an electron emitting device, a device in which a large number of electron emitting elements are densely arranged can be considered. According to such an electron emitting device, the workpieces are simply arranged to face each other, and then each electron emitting element is turned on.
By controlling the OFF, it is possible to perform electron beam exposure on the surface of the workpiece in a two-dimensional pattern.

[Problems to be Solved by the Invention] However, at present, it is difficult to mass-produce an electron-emitting device in which a large number of such electron-emitting sources are densely arranged with high yield. In addition, there are problems such as heat generation and interference between adjacent electron beams.

Further, in the above-mentioned conventional example, the accuracy cannot be expected to improve due to the size and complexity of the apparatus such as the need for a vacuum chamber and the separation of individual parts.

On the other hand, for example, in electron beam drawing on a semiconductor wafer, an electron beam apparatus or the like that can perform beam irradiation or the like more efficiently and accurately in order to cope with high integration of circuits is desired.

Based on such a point of view, an object of the present invention is to provide a simple and compact charged beam generator which does not necessarily require a vacuum chamber.

[Means and Actions for Solving Problems] In order to achieve the above object, according to the present invention, in a charged particle beam generator for driving a charged particle beam source to emit a charged particle beam, a vacuum blocking wall for the charged particle beam source. And a means for controlling the charged beam and / or a means for detecting charged particles are arranged on the blocking wall.

Therefore, since the beam emitting portion can be kept in a vacuum even when the present apparatus is placed in the atmosphere, for example, an object to be irradiated with the charged beam can be held by the vacuum chuck. Further, if the blocking wall has a multi-chamber structure and the degree of vacuum is increased stepwise, it is good to provide the above-mentioned detection means or the like in the high vacuum portion inside, and the problem due to contamination can be avoided.

[Example] The present invention will be described below with reference to the drawings.

FIG. 1 is a schematic diagram showing a configuration when a charged particle beam system according to an embodiment of the present invention is applied to exposure of a semiconductor wafer. In the figure, WF is a wafer made of a semiconductor such as silicon or gallium, to which a resist sensitive (exposed) to an electron beam is applied. CP1 to CPn indicate a plurality of exposure areas, which are cut out into one chip after drawing is completed. M1 to M8 are marks for pre-alignment or fine alignment provided on the wafer WF. MB is a head for generating an electron beam (hereinafter referred to as EB), which is mounted and adsorbed on the stage MS. Alignment marks M1 to M8 above
Is drawn by the EB of this head during the first drawing process. The stage MS can be finely moved in the x, y, θ (rotation) directions by piezoelectric elements Px, Py, Pθ such as a piezo. Each element Px, Py, Pθ is used for alignment with the wafer WF.
The head MB is provided with EB sources ES0 to ES15.

EB sources ES0 and ES15 are for alignment only, EB sources ES1 to ES
14 is commonly used for exposure or alignment. Here, the exposure EB generation sources ES1 to ES14 are two wafers WF each.
Are assigned for drawing each chip row in the X direction. That is, for example, the upper half area CP1 of the chip (exposure area) CP1
U is the EB source ES1 and the lower half area CP1L is the EB source ES
Rendered by 2. Similarly, in the exposure areas CP2 to CP5, the upper half is drawn by the EB generation source ES1 and the lower half is drawn by the EB generation source ES2. Each EB source ES0 to ES15
EB deflection electrodes X1, X2, Y1, Y2 are provided. Further, sensors S1 to S9 and the like are provided. These sensors may be light sensitive or electronically sensitive.

KB is a keyboard, DP is a display, and CAD is a controller. A circuit pattern of one chip is designed by these, and when the information is sent to the one-chip pattern generator PG, the pattern generator PG divides the drawing information of one chip into the upper half and the lower half of the drawing information, and halves each. Send to chip memory MU, ML. Each memory MU, ML sends this drawing information simultaneously to the EB sources ES1, ES3, ES5 to ES13 corresponding to the upper half of the chip and the EB sources ES2, ES4, ES6 to ES14 in charge of the lower half respectively. However, two memories MU and two MLs are provided, respectively, and by using them alternately, the loss of the data transfer time from the pattern generator PG is substantially eliminated.

Each EB source has its X based on the drawing information from the memories MU and ML.
By moving the wafer WF and the head MB relatively continuously in the Y direction while drawing in the X direction within a range that can be covered by the deflection by deflecting in the X direction by the direction deflection electrodes X1 and X2, All pixels in the Y direction of the area are drawn. However, since the movement in the Y direction is continuous, a deviation in the Y direction occurs when drawing in the X direction for each pixel in the Y direction. Therefore, this is corrected using the deflection electrodes Y1 and Y2 in the Y direction. Then, this drawing is performed on the wafer WF and the head.
One chip row in the Y direction is drawn by repeating MB and intermittently moving in the X direction.

In this way, each EB source writes one chip row in the Y direction of the wafer WF substantially simultaneously, for example, CP6, CP13, CP20, CP27, CP34, thereby enabling high-speed writing.

The deflection electrodes X1, X2, Y1 and Y2 are shared for initial alignment of the axis of the EB and alignment with the wafer or chip. For example, the position of alignment marks M4, M5 on chip CP1
S4, S5 read, EB source ES based on the read information
The irradiation position of EB is corrected by correction driving of X, Y deflection electrodes X1, X2, Y1, Y2 of 1 and ES2. This chip alignment mark is used for chips CP6 and CP13, such as mark M6.
It is good to share it.

On the other hand, the marks for pre-alignment are marks M1, M2,
M7, M8 etc. are provided. Then, for example, the sensor S1 reads the position of the mark M1 and the sensor (not shown) reads the position of the mark M2. Based on this, the initial alignment of the head MB is performed by the piezoelectric elements Px, Py, and Pθ. Then, in that state, the amount of deviation is measured using the chip alignment mark M3, the sensor S3, and the like, and drawing is performed in a state where the position is corrected by the deflection electrodes X1, X2, Y1, and Y2 based on the measurement result. It is also possible to temporarily stop during drawing and perform realignment using the marks M7 and M8.

Although various mark detection methods are possible in these cases, for example, a well-known reflection or secondary electron detection method can be used. Ie from the EB source ES0 to the mark M7
The position of the mark M7 can be known by irradiating EB toward the EB and detecting the reflected or secondary electron by the sensor S7. As the sensor 7, for example, a semiconductor PN junction is used.

However, in the case of such mark detection by EB, it is necessary to set the EB intensity and irradiation time to values that do not interfere with mark reading.

Further, when detecting a plurality of marks at a time, it is preferable to perform EB irradiation to each mark at different timings, and to detect at different timings.
EB irradiation can be easily differentiated and detected by a single signal processing means.

Further, when a light sensitive element such as CCD is used as the sensor, it is clear that a light source may be prepared instead of the EB source.

FIG. 2A is a partial bottom view showing an example of the EB emitting head MB and shows one EB emitting source. 2 (b) and 2 (c) are a BB sectional view and a CC sectional view, respectively.

In FIG. 2, GL is an insulating substrate, which is made of glass, ceramics, crystals, or the like. On the lower surface of the substrate GL, a large number of surface conduction type EB emission sources shown in the same figure are arranged in one line in the BB direction. This EB emission source is the substrate GL
Has a high resistance thin film RS and electrodes D1 and D2 attached to the lower surface of the. The high resistance thin film RS is formed, for example, by applying a high temperature to a metal thin film of Pt, Au, Mo, C, Pd or the like or a metal oxide thin film of SnO ₂ , In ₂ O ₃ , TiO or the like to cause film breakdown. . The high resistance thin film RS has a thickness of, for example, about 100 to 10,000 Å, and its resistance is, for example, about several KΩ to several hundred MΩ. As shown in the figure, electrodes D are provided at both ends in the CC direction of the high resistance thin film RS.
1, D2 are connected. The electrode is a general thin film electrode made of a metal such as Pt, Au, Ag or the like.

An insulating layer IS is formed on the lower surface of the substrate GL so as to cover the electrodes D1 and D2 except for the portion below the high resistance thin film RS. The insulating layer is made of, for example, SiO ₂ , SiN, Si ₃ N ₄ , AlN, BN or the like. On the bottom surface of the insulating layer IS, BB of the high resistance thin film RS
And a pair of deflection electrodes X1-X2 and Y1-Y2 are arranged in parallel with each other in the C-C direction. The deflection electrodes are also the electrodes D1 and D
Made of the same material as 2.

S9 and S10 are the above-mentioned optical sensor or electronic sensor. This sensor may be further provided in the 1-to-Y direction, or may be provided in an annular shape. When the EB generation source and the sensor are integrally formed in this way, the positional accuracy between the sensor and the EB generation source is fixed, so that the detection accuracy is improved. When the optical sensor is used, it is preferable that the alignment light source LP is also incorporated in the head MB as shown in FIG. 2 (c). When a solid state element such as a light emitting diode is used as the light source LP, an EB source,
It can be molded at the same time as the sensor and the like by semiconductor manufacturing technology or thick film / thin film manufacturing technology.

Further, when an ultraviolet light source or a far ultraviolet light source is used as the light source LP, it can also be used for stimulating the resist WR on the wafer WF. If this is done before EB exposure, a thin hardly soluble layer is formed on the surface of the resist WR, which becomes even more difficult to dissolve by EB exposure. According to this, since the ratio of the film thickness to the drawn line width can be increased, the sensitivity or resolution (aspect ratio) is improved, which is preferable. As the resist, for example, a trade name “RD2000N” (manufactured by Hitachi Chemical Co., Ltd.) can be used. Further, when the light source LP is built in the head MB, there is an advantage that the entire apparatus can be downsized because pre-exposure can be performed when moving relative to the wafer WF.

Furthermore, the thin-film RS (electron emitting portion) may be irradiated with this far-ultraviolet light source LP during exposure. If you do this,
The number of emitted electrons is increased, which is preferable. Also, the light source LP
When is a visible light source, the same effect can be obtained by using the thin film RS as a so-called photocathode material. As the photocathode material, for example, a material exhibiting semiconductor properties with a composite material of alkali metal and Ag, Bi, Sb, silver-cesium material, antimony-cesium material, bismuth-cesium material, multi-alkali material, and the like can be used. .

Further, as the EB generation source, in addition to this, a semiconductor source shown in JP-A-54-111272 (USP 4259678) or the like may be used. Further, the thin film RS may be irradiated with the light source LP only when drawing a thick line width.

FIG. 3 is a partial sectional view showing an example of an EB emission head in which a plurality of EB sources ES1 and ES2 are set as one unit of EB sources. According to this example, a large amount of electrons can be emitted even at low voltage driving, which is preferable. Also here, if the light irradiation is added as in the previous case, the efficiency is further improved. If the thin line is drawn by a single EB source and the thick line is drawn by a plurality of EB sources, the drawing speed can be improved.

Further, a focusing lens FC, a deflection electrode AD, etc. may be attached. Furthermore, if the members to which the lens FC and the electrodes AD are attached have a multi-chamber structure and the degree of vacuum is lowered in sequence, EB exposure in the atmosphere becomes possible. That is, as shown in the figure, multiple chambers are formed by members V1, V2, V3, etc., and the 1st, 2nd, 3rd
The vacuum degree may be lowered in the order of. In this way, the vacuum chuck VC can be used for attracting the wafer WF. At this time, the sensors S11, S12 may be attached to the lower surface of the member V1 or the like.

FIG. 4 is a partial cross-sectional view showing another example of the EB emitting head. In the figure, BG is EB as described above.
Although it is an emission source, as described above, when the electron beam EB is irradiated from here to the wafer mark WM, secondary electrons and reflected electrons 2E are generated from the wafer WF. Then, a sensor integrally formed on the board MB side, for example, a P / N junction PN
The wafer mark WM is detected by receiving the wafer mark WM. However, here, in order to detect electrons efficiently, annular electrodes C1 and C2 are attached to the substrate MB side. Also electrodes
Electrode Vex between C1 and EB source BG, voltage Vd and EB at electrode C2
A voltage Vc is connected between the source BG and the wafer WF as shown.

Therefore, for example, Vex = 10 to 100V, Vc = 1 to 10KV and V
By applying d = 100V respectively, secondary electrons and backscattered electrons 2E
Can be efficiently assembled at the P / N junction section PN.

FIG. 5 is a schematic view showing a modification of the apparatus shown in FIG.

In the figure, the head MB1 has four EB sources ES1 for each chip.
~ ES4 is made to correspond. First for each EB source
Similar to the device shown, X, Y deflection electrodes are provided. In this case, the four divided regions of all the chips can be simultaneously drawn by the X and Y deflection electrodes on the same principle as in the case of FIG. 1, so that the drawing speed is further improved. Further, the head MB1 is provided with an alignment mark MM, and this mark and the wafer alignment mark WMR are aligned by light irradiation.

After this alignment, drawing is first performed on all the chips in the Y-direction chip row located under the head MB1 at this time. Then, the other chip rows are also moved intermittently (step by step) after this, and similar alignment and drawing are repeated.

However, since the wafer WF is usually circular, the wafer alignment mark WMR may not be provided for all the chip rows in the Y direction. At this time, the alignment may be performed for only one column at the center of the wafer first, and then the exposure may be performed without feedback. Alternatively, first use the mark WMR at the center of the wafer WF to perform alignment, then advance the exposure to the right, and at the stage when the right half is completed, reverse to the left and either use the mark WMR again or align the unexposed portion. After re-aligning with Mark WML,
You may make it expose to the left.

A head is shown in FIG. 5 to show still another alignment exposure method.
Indicates MB2.

In this case, the head MB2 is initially located at the left end portion of the wafer WF, and first, the mark SM provided on the wafer stage is
Is detected by the sensor S1 and pre-alignment is performed.
Next, in this state, the amount of deviation is measured by the marks M1 and M2 and the sensors S2 and S3. Then, at the time of exposure, both or either of the X and Y deflection electrodes are used to perform the exposure while correcting the displacement amount. In the next column, the mark M3 is used to measure the amount of deviation as in the previous case, and the exposure is performed based on the result.
Similarly, the shift amount measurement and the exposure are performed in the next row, but the re-prealignment may be performed using the mark WML before that.

Also, using the mark M4, the displacement amount of the head positioned in that row is measured, and each EB source ES and electrodes X1, X2 are measured at that position.
After the area covered by is exposed, the exposure is performed while continuously moving the head or the wafer, and when the chip row is completed, the head or the wafer is stopped at the position of the mark M5 and the same operation as above is performed. You can also do so. This can be said to be an intermediate type between the so-called step-and-repeat and step-and-scan exposure methods.

FIG. 6 shows another modification of the apparatus shown in FIG.

In the figure (a), a plurality of heads MB1 and MB2 are provided, and the wafer WF
The right half and the left half of the column are respectively in charge of the columns, which can further improve the throughput.

In the same figure (b), the small-diameter wafers WF1 and WF2 are used as a single head MB.
In the example in which the exposure is performed by, the throughput can be improved.

FIG. 11C shows an example in which short heads MB1, MB2, MB3 are arranged in the Y direction so that it is possible to suitably cope with a large diameter wafer WF of 8 inches or more when it is difficult to manufacture a long head. At this time, since it is usual that each end portion needs the alignment mark detecting portion and the portion for strengthening the strength as described above, it is preferable to arrange them in a zigzag shape as shown in FIG.

In the same figure (d), a plurality of EB sources are provided in a single head MB, and the diameters of the emitted EBs are made different. That is, EB sources ES1 and ES2 have a large diameter, EB sources ES3 and ES4 have a medium diameter, and EB
Sources ES5 to ES8 ... are small-diameter EB sources, and usually EB source ES5
-ES8 ... is used to perform the exposure for the time being with the middle and large line widths left, and then the medium or large line width is exposed using the EB sources ES4, ES2. At this time, the head or wafer is moved so that the corresponding line width portion of each chip can be exposed.

FIG. 7 is a schematic view showing still another modified example. This EB
The emission head is configured to detect the wafer mark by the magnitude of the current absorbed by the wafer WF, not by the sensor provided on the head side.

In the figure, WF is a wafer containing a semiconductor. GL is a single substrate provided with the respective sources BG1 to BG7 of a plurality of electron beams EB1 to EB7, for example, the glass described in JP-A-54-111272 and JP-A-56-15529, A substrate such as a semiconductor can be used. BS is the electron beam source BG
Selective drive circuit from 1 to BG7, CC is overall control unit, AS is wafer
This is an electron beam absorption current detection circuit for detecting the alignment marks WM1 to WM7 on the WF. Also, if necessary, the second
And an electron lens, a deflection electrode or a blanking electrode (not shown) as described with reference to FIGS.

In this configuration, when the alignment mark on the wafer WF is at the positions of the solid lines WM2 and WM6, the actual circuit element pattern is inside thereof. Therefore, in this case, first, the electron beams EB3, EB4, EB5 for writing the actual circuit element pattern and the electron beams EB2, EB6 for detecting the alignment mark are selected by the selection circuit BS. Next, the positions of the marks WM2, WM6 are detected by emitting the electron beams EB2, EB6 and absorbing them by the wafer WF and detecting the magnitude of the current by a known method. However, as mentioned above, electron beams EB2 and EB6
Are emitted and detected at different timings so that they can be distinguished. Then, the wafer WF is aligned based on this, and then the circuit pattern is exposed by the electron beams EB3, EB4, and EB5 as shown in FIG. 1 or FIG.

On the other hand, when the alignment marks are broken lines WM3, WM5, the electron beams EB3, EB5 are used for alignment, and the electron beams EB4 and / or EB1, EB2, EB6, EB7 are used for exposure. When the broken lines WM1 and WM7 are alignment marks, the electron beams EB1 and EB7 are for alignment and the electron beams E
B2 to EB6 are for exposure.

[Applicable Range of the Invention] The present invention is applicable not only to the exposure (drawing) of the semiconductor circuit pattern by the electron beam described in the above embodiments, but also to the data writing to the recording medium using the charged beam sensitive medium. It is also possible to apply to the reading of such data by combining with a charged particle sensor.

Specifically, for example, in the recording and tracking of a magneto-optical recording medium such as an optical disk and an optical card or microfilm, it can be selectively used for writing and reading.

Further, the electron beam probe tester for semiconductor function inspection can also be used by selecting the electron beam generation source according to the chip size and the measurement point. At this time, output may be prohibited except for the electron beam generator for measurement.

Further, when used for a plurality of purposes, it is easy to make the output energy different for each application and also for each electron beam source, which is suitable for use in the previous embodiment.

[Effects of the Invention] As described above, the present invention has the following effects.

(1) Since the exposure can be performed by a plurality of charged beam sources, the processing is quick.

(2) By properly arranging a plurality of charged beam generation sources, problems of heat generation and interference between beams can be avoided. Further, since the heat generation can be minimized, the durability of the device is excellent.

(3) Since a plurality of electron sources and the like can be integrally formed on a single substrate, the device can be downsized and highly accurate.

(4) The processing speed can be further improved by transferring the drawing (irradiation) pattern data to each of the charged beam generation sources without interruption by alternately using a plurality of buffers.

(5) The processing speed can be further improved by arranging a plurality of single substrates having a plurality of charged beam generation sources arranged in parallel.

(6) By arranging a plurality of single substrates having a plurality of charged beam generation sources arranged in series, it is possible to further improve the processing speed for a large medium.

(7) By previously irradiating the sensitive medium with ultraviolet rays or the like, the aspect ratio of the drawn or written information can be increased.

(8) When the electron beam is emitted, by irradiating the electron beam emitting portion of the electron beam generating source with ultraviolet rays or the like,
The generation efficiency of the electron beam can be improved. Also, the beam intensity can be adjusted by this.

(9) By constructing one charged beam generation source by a plurality of charged beam emission units, a large amount of electrons can be emitted even at low voltage driving. In addition, the beam intensity can be easily adjusted. For example, the drawing speed can be improved by making it possible to draw thin lines and thick lines.

(10) The apparatus can be placed in the atmosphere by providing the charged beam generation source with a vacuum blocking wall. Therefore, for example, a vacuum chuck can be used for medium adsorption. Further, by providing a sensor or the like in the high vacuum portion, it is possible to avoid the problem due to contamination.

(11) By providing a plurality of types of charged beam generators having different emission beam sizes, each charged beam generator can be selectively used according to the required beam size.

(12) By providing the deflecting means in each charged beam generating source, it is possible to irradiate the charged beam over a wide range even in a stationary state, and it is possible to precisely and easily perform fine adjustment of the beam direction.

(13) By detecting alignment marks and the like with time-sequentially-charged charged beams, alignment can be performed without the influence of interference between charged beams, and detection beams can be easily distinguished.

(14) By providing a means for detecting the charged beam or secondary or reflected electrons of the charged beam, alignment can be performed without providing a special light source and its detecting means, and the apparatus can be made smaller and simpler. Can be converted.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a configuration when a charged particle beam system according to an embodiment of the present invention is applied to exposure of a semiconductor wafer, and FIG. 2 is a specific example of a head that can be used in the system of FIG. In the partial view shown in the figure, (a) is a bottom view, (b) is a sectional view taken along line BB in (a), and (c) is C- in FIG.
C sectional view, FIGS. 3 and 4 are partial sectional views showing another example of the head that can be used in the apparatus of FIG. 1, FIG. 5 is a schematic view showing a modified example of the apparatus of FIG. FIG. 6 is a schematic view showing another modification of the apparatus shown in FIG. 1, and FIG. 7 is a schematic view showing still another modification of the apparatus shown in FIG. MB, MB1, MB2, MB3: Electron beam emission head, ES, ES0 to ES15:
Electron beam source, WF, WF1, WF2: Wafer, M1 to M8, WM, WM1
~ WM7, WMR: Alignment mark, S1 ~ S12: Sensor, X1, X
2, Y1, Y2, AD: Deflection electrodes, CP1 to CP34, CPn: Exposure area corresponding to one chip, MS: Stage, Px, Py, Pθ: Piezoelectric element, CP1
U: upper half area, CP1L: lower half area, PG: 1 chip pattern generator, MU, ML: memory, GL: substrate, RS: high resistance thin film, D1, D2: electrode, IS: insulating layer, LP: light source, WR: Resist, F
C: Focusing lens, PN: P / N junction, E
B, EB1 to EB7: electron beam, CC: control unit, AS: detection circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H01J 37/305 9172-5E (72) Inventor Takeo Tsukamoto 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Akira Suzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Tetsuya Kaneko 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Toshihiko Takeda 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Mitsuaki Seki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) References JP-A-59-93249 (JP, A) JP-A-57-76837 (JP, A) JP-A-54-111272 (JP, A) JP-A-55-63823 (JP, A)

Claims (6)

[Claims] 1. A charged beam source having a vacuum barrier,
Drive control means for driving and controlling the charged beam generation source;
A charged beam generator comprising: a detection means for detecting secondary charged particles or reflected charged particles, and / or a beam control means for controlling a charged beam, which are provided on the vacuum blocking wall portion. 2. The charging according to claim 1, wherein the vacuum blocking wall has a multi-chamber structure in which the degree of vacuum is gradually increased, and the detecting means is arranged in the innermost high vacuum portion. Beam generator. 3. An electron lens and / or said charge beam generating source having a plurality of charged beam emitting portions, wherein said beam control means unifies and / or deflects a plurality of charged beam emitted from said charged beam emitting portions. Alternatively, the charged beam generator according to claim 1, which has an electrode. 4. The charged particle beam generator according to claim 1, wherein said detecting means has a PN junction. 5. The charged particle beam generator according to claim 1, wherein said detection means and / or beam control means comprises at least one of a coil, a sensor or an electrode. 6. The charged beam generator according to claim 1, wherein a plurality of the charged beam generators are arranged on a single substrate.