JPS63253709A - Compander circuit - Google Patents

Abstract

PURPOSE:To attain miniaturization and low power consumption by using a rectifier, a voltage controlled oscillator and a switched capacitor filter so as to constitute a compander circuit. CONSTITUTION:An input signal wave VIN is fed to a rectifier 1 and a prefilter 3 and the rectifier 1 outputs a DC voltage VRE in response to the amplitude of the input signal wave VIN and the voltage controlled oscillator 2 uses the DC voltage VRE as its control voltage and the oscillated frequency fs is varied with its amplitude. The cut-off characteristic of the switched capacitor filter 4 (SCF) is changed in response to the amplitude of the input signal wave VIN and the gain when the input signal waveform VIN passes through the SCF4 is changed in response to the amplitude. An equalizing filter 5 having an inverse slope as the SCF4 is inserted after the SCF4 to restore the characteristic to the flat characteristic and an output wave VOT is extracted from the post filter 6. Thus, the compander circuit comprising a digital circuit with less power consumption and small size is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a compander circuit that reduces noise by compressing and expanding signal waves in a communication path.

[Conventional technology]

Conventionally, this type of compander circuit consists of a rectifier made of bipolar transistors and a variable gain amplifier, and the amplitude is controlled by controlling the gain t of the variable gain amplifier using a voltage or current that completely controls the input or output signal wave. The compression and expansion operations were performed.

[Problem that the invention seeks to solve]

The conventional compander circuit described above has a circuit configuration that can be easily realized only with bipolar transistors, so it operates in an analog manner, consumes a large amount of power, and is difficult to miniaturize.

SUMMARY OF THE INVENTION An object of the present invention is to solve these problems and provide a compander circuit made of a digital circuit that is compact and consumes less power.

[Means for solving problems]

The configuration of the compander circuit of the present invention includes a rectifier circuit that rectifies an input signal wave, a voltage controlled oscillator that uses the output voltage of the rectifier circuit as a control voltage and outputs an oscillation frequency signal corresponding to this voltage, and a voltage controlled oscillator that outputs an oscillation frequency signal corresponding to this voltage. a first switched capacitor filter whose switching circuit is controlled by a clock having an output frequency of the voltage controlled oscillator; and an output of the first switched capacitor filter which is controlled by a constant frequency. It is characterized by including a second switched capacitor filter having frequency characteristics opposite to that of the first switched capacitor filter.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a compander circuit according to an embodiment of the present invention. The input signal wave vIN is input to the rectifier 1 and the filter 3. The rectifier l is connected to the input signal wave VIN
A DC voltage VR1 corresponding to the amplitude of is output. The voltage controlled oscillator 2 (hereinafter referred to as VCO) uses this DC voltage vRI.
! The oscillation frequency f is changed according to the amplitude of the control voltage. When the switched capacitor filter 4 (hereinafter referred to as SCF) is switched at this oscillation frequency of 9, the cutoff characteristic of 80F4 changes according to the amplitude of the input signal wave VIN, and as a result, the input signal wave IN becomes 8CF.
The gain when passing through 4 will change depending on the amplitude.

Here, the output voltage of 80F4 is as follows with respect to the signal wave frequency:
Since it has a certain slope, this 5 after 8CF4
Inserting an equalization filter 5 with a slope opposite to that of CF4,
It has returned to a flat characteristic. In addition, in order to reduce aliasing noise and clock components due to sampling, a burry filter 3 consisting of a normal RC active filter and a post filter 6t are provided at the first and last stages of the signal path, and the output from this post filter 6 is provided. Wave V.

? It's being taken out.

All of the circuits 1 to 6 mentioned above can be constructed with MO8 transistors, and it becomes possible to convert the compander circuit into an MO8 type integrated circuit.

Specific examples of each of these blocks are shown in FIGS. 2 to 5.

FIG. 2 is a circuit diagram of an example of the rectifier 1 shown in FIG. 1. This circuit consists of an operational amplifier 7, a comparator 8°, and an inverter 9.
and transistors 't',,'r,,i anti-R1 to R3
and a capacitor C1, and a DC output voltage V in response to an input signal V. Output T.

Figure 3 (al, fbl are voltage controlled oscillators 3 in Figure 1)
FIG. 2 is a circuit diagram of an example and an example of a constant current circuit thereof. This circuit 3 includes constant current sources 10, 11 . Operational amplifier 12° inverter 13. Transistors T3, T4, resistors R,,
R, and a capacitor C, and an output with an oscillation frequency f corresponding to the control voltage OT from the output of the rectifier l is obtained.In this case, the constant current source 10.11 is ), as in op amp 14.transistor T
s, the control voltage ■ by the circuit of resistor R6. A current I is output for the current I.

FIG. 4 is a circuit diagram of an example of the bris filter 3 and the bost filter 6 shown in FIG. 1. This circuit is an op amp 15
, resistors R, , R, and capacitors C, , C, and the resistors R1, , R1, and capacitor C1*c4 are set to appropriate values to obtain a filter with predetermined characteristics.

FIG. 5 (al, bl) is a circuit diagram of the 5CF4.5 shown in FIG. 1 and an example of a transfer gate used therein.

As shown in FIG. 5(a), this 8CF includes four stages of operational amplifiers 16-19 and transfer gates G1-12. G21 to G32, and capacitors Cl0 to C22 which are hidden by these transfer gates. In addition, trans-edge gates G1 to G12.
G21 to G32 are N-MO as shown in FIG. 5(b).
S) It is composed of a transistor and a P-MOS transistor, and a clock and its inverted signal are input to the gates of these transistors.
and transfer gates 021 to 32 are -either -
Next, the operation of this embodiment will be explained using a specific example.

FIG. 6 is a frequency characteristic diagram showing the amplitude expansion operation as a specific example of this embodiment, and these are the conditions A to C in Table 1 below.
The characteristics are all talked about.

Chapter 1 Table Now, set the input voltage level of the reference signal wave to VXN.

(dB), then the rectified output vR8o (V) VCO
3 output frequency f8o (Hz), SCF cutoff layer wave number f0° (Hz) and signal wave output voltage level vOTO
(dB). Furthermore, if 8CF4 is LPIi'' which has a cut-off wave number below the signal band and has a slope of -24 dB10CT, its cut-off gonad will be as shown in A in Fig. 6. In this case, the equivalent filter 5 is: An HPF whose cutoff layer wavenumber is above the signal band and has a slope of +24 dB10CT is used.

Here, the input wave VxN is the reference level (5), 910 dB.
If it is lowered, it will look like characteristic line B. Assuming that as a characteristic of VC (J3), when the input wave vXN drops by α (dB) from the reference level, the oscillation frequency increases by 2- times.
The output frequency fS becomes 224-.fso.

Generally, in SCF, the cutoff wave number fc is the oscillation frequency f,
Since it is proportional to , this cutoff wave number f0 is 2-fathom・f
Therefore, when the gonads are shut off, as shown in B in Figure 6O, the signal wave band is uniformly 1 OdB.
Lower Cal. Follow output wave v. T h v. To-20 (dB)
becomes. Furthermore, one theory is to lower the human power wave INk by 10 (dB), and the oscillation frequency fs is 224., f, o, and the cut-off frequency af is also 2 gen/f, so the gonad during cut-off is As shown in C in Fig. 6], the signal wave band is further uniformly lowered by 1QdB. Therefore, the output wave VoT is V.T.
o-40 (df3) and n.

From the above, input wave V and output wave ■. Looking at the relationship between T and N, it can be seen that the level difference from the reference voltage at the input of the signal wave is doubled at 1 decibel at the output, indicating that the amplitude is expanded. .

Please note that the dynamic range of the input wave VIN is determined by the characteristics of the VCO and the characteristics of the 8CF.
The frequency variable range is 0.1f. ~f,. If this is the case, the dynamic range of the input wave V will be approximately 80 dB.

FIG. 7 is a frequency characteristic diagram showing the amplitude compression operation as a concrete example of this embodiment, and these are the following second
The characteristics of states DF in the table are shown.

Now, set the input voltage level of the reference signal wave to V(d)
B) and L, each v0 f8 fo and ■ at the time of sono. Value of T'r: Vff and V. Let T□. Also, RB2
$2 02 Assuming that SCF4 has a +12 dB 10 CT range in HPF, then 18? The characteristic lines are shown in Table 2, as shown in D in Figure 7. At this time, the equalization filter 5 is -12dB
It is assumed that an HPFfC with a slope of 10 CT is used and the characteristics of the VCO are the same as those shown in FIG.

fsz, the fault wave number f0 is also 2fc2, so the cutoff time is 9 as shown in E in Figure 7, and K is uniform in the signal wave band.
Increases by 5dB. Therefore, the output wave■. Line 7 is F in Figure 7.
As in, in the signal wave band, 1c5d is even more uniform.
B goes up. Therefore, the output wave■. .

becomes voT2-ro(as>).

From the above, the input wave V and the output wave V. , it can be seen that the level difference between the signal wave input and the reference voltage is divided into 1/2 by decibel filtering, and that the width of the section is tightened.

Seriously, in this example, the frequency variable range of vCO is 0.1f.
-f, the dynamics of the input wave V 82
The s2 clean can be approximately 80 dB as in the case of FIG.

〔Effect of the invention〕

As explained above, the present invention uses a rectifier consisting of a 10S transistor, a voltage controlled oscillator, an actia' filter, and a switched capacitor filter to configure a compander circuit, which is small and has low power consumption. M
A compander circuit that can be integrated into a US integrated circuit is obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a compander circuit according to an embodiment of the present invention, and FIGS. 2, 3, 4, and 5 are the rectifier circuit, voltage-controlled oscillator, preamplifier, post filter, and switch shown in FIG. 6 and 7 are frequency characteristic diagrams illustrating the amplitude expansion and compression operations of this embodiment. 1... Rectifier, 2... Voltage controlled oscillator (with VCO) 3... Buri filter, 4... Switched capacitor filter (8CF), 5...・
...Equivalent filter, 6...Post filter, 7
, 12.14-19... operational amplifier, 8...
... Comparator, 9.13 ... Inverter, 10.11 ... Constant current source, C1 to C3, CI
O~C22... Content, G1-12゜G2
1-32...Transfugate, Tl5T5
...MOS transistor, R1 to R8...
··resistance. (cLノ (InoC3 g squad)

Claims (1)

[Claims] a rectifier circuit that rectifies an input signal wave; a voltage controlled oscillator that uses the output voltage of the rectifier circuit as a control voltage and outputs an oscillation frequency signal corresponding to this voltage; and an output of the voltage controlled oscillator that receives the input signal wave. a first switched capacitor filter whose switching circuit is controlled by a frequency clock; and a first switched capacitor filter which is controlled by a constant frequency and receives the output of the first switched capacitor filter and has frequency characteristics opposite to that of the first switched capacitor filter. a second switched capacitor filter.