JPS6324840U - - Google Patents

Info

Publication number
JPS6324840U
JPS6324840U JP11910986U JP11910986U JPS6324840U JP S6324840 U JPS6324840 U JP S6324840U JP 11910986 U JP11910986 U JP 11910986U JP 11910986 U JP11910986 U JP 11910986U JP S6324840 U JPS6324840 U JP S6324840U
Authority
JP
Japan
Prior art keywords
film carrier
ics
mounting
finger leads
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11910986U
Other languages
Japanese (ja)
Other versions
JPH0631723Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986119109U priority Critical patent/JPH0631723Y2/en
Publication of JPS6324840U publication Critical patent/JPS6324840U/ja
Application granted granted Critical
Publication of JPH0631723Y2 publication Critical patent/JPH0631723Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の第1実施例の分解斜視図、
第2図は第1図の組立状態の一部破断側面図、第
3図は第2図の平面図、第4図は本考案の第2実
施例の分解斜視図、第5図は第4図の組立状態に
おける平面図、第6図は従来例の一部破断側面図
である。 1,2……IC、1a,1b……電極、3……
フイルムキヤリア、3a……ベースフイルム、4
……取付孔、5,6……フインガーリード、5a
,6a……内端部。
FIG. 1 is an exploded perspective view of the first embodiment of the present invention;
2 is a partially cutaway side view of the assembled state shown in FIG. 1, FIG. 3 is a plan view of FIG. 2, FIG. 4 is an exploded perspective view of the second embodiment of the present invention, and FIG. FIG. 6 is a plan view in an assembled state, and FIG. 6 is a partially cutaway side view of the conventional example. 1, 2...IC, 1a, 1b...electrode, 3...
Film carrier, 3a...Base film, 4
...Mounting hole, 5,6...Finger lead, 5a
, 6a... Inner end.

Claims (1)

【実用新案登録請求の範囲】 1枚のフイルムキヤリアに複数のICを取り付
けた取付け構造において、 前記フイルムキヤリアの単一の取付孔内に、表
側および裏側の各ICに対応するフインガーリー
ドを延出させ、フイルムキヤリアの表裏から前記
各フインガーリードに対応するICの電極をそれ
ぞれ接着固定したことを特徴とするフイルムキヤ
リアへのICの取付け構造。
[Claims for Utility Model Registration] In a mounting structure in which a plurality of ICs are mounted on one film carrier, finger leads corresponding to each of the front and back ICs are extended into a single mounting hole of the film carrier. A structure for mounting an IC on a film carrier, characterized in that electrodes of the IC corresponding to each of the finger leads are adhesively fixed from the front and back sides of the film carrier.
JP1986119109U 1986-08-01 1986-08-01 Semiconductor device Expired - Lifetime JPH0631723Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986119109U JPH0631723Y2 (en) 1986-08-01 1986-08-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986119109U JPH0631723Y2 (en) 1986-08-01 1986-08-01 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6324840U true JPS6324840U (en) 1988-02-18
JPH0631723Y2 JPH0631723Y2 (en) 1994-08-22

Family

ID=31006180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986119109U Expired - Lifetime JPH0631723Y2 (en) 1986-08-01 1986-08-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0631723Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030057184A (en) * 2001-12-28 2003-07-04 동부전자 주식회사 semiconductor package and its manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58106951U (en) * 1982-01-13 1983-07-21 セイコーエプソン株式会社 Semiconductor integrated circuit mounting structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58106951U (en) * 1982-01-13 1983-07-21 セイコーエプソン株式会社 Semiconductor integrated circuit mounting structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030057184A (en) * 2001-12-28 2003-07-04 동부전자 주식회사 semiconductor package and its manufacturing method

Also Published As

Publication number Publication date
JPH0631723Y2 (en) 1994-08-22

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