JPS63248198A - Manufacture of printed circuit board - Google Patents
Manufacture of printed circuit boardInfo
- Publication number
- JPS63248198A JPS63248198A JP8248987A JP8248987A JPS63248198A JP S63248198 A JPS63248198 A JP S63248198A JP 8248987 A JP8248987 A JP 8248987A JP 8248987 A JP8248987 A JP 8248987A JP S63248198 A JPS63248198 A JP S63248198A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- printed circuit
- insulating layer
- circuit board
- metal substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000000034 method Methods 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 16
- 238000007598 dipping method Methods 0.000 claims description 6
- 238000004070 electrodeposition Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 229910000838 Al alloy Inorganic materials 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005238 degreasing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000010407 anodic oxide Substances 0.000 description 1
- 238000002048 anodisation reaction Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野］
本発明は、スルーホールを有するプリント回路基板の製
造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a printed circuit board having through holes.
紙フェノール樹脂等の電気的絶縁特性を有する基板に対
して、主にＮ械的強度や放熱特性の改良を図ったプリン
ト回路基板が知られている。2. Description of the Related Art Printed circuit boards are known that are designed to improve mainly N mechanical strength and heat dissipation properties compared to boards having electrically insulating properties such as paper phenolic resin.
従来、かかるプリント回路基板の製造方法の１つの実施
例は第２図に示すような方法で製造されていた。Conventionally, one embodiment of a method for manufacturing such a printed circuit board has been manufactured by a method as shown in FIG.
第２１Ａにおいて、表面２に電気的ＭＡ縁層１１が形成
された金属基板ｌに所定寸法の穴４を設け、次いでハリ
取り後にエンチングによって金属基板１に設けられた穴
４を拡径し、その後に熱硬化性１２！１′１を電着によ
り塗布して電気的絶縁層１１である電着塗膜１４を形成
していた。また、金属基板ｌがアルミニウムの場合には
その前に陽極酸化処理を施し塗料の密着性を向上させる
とともに陽１項酸化１１り１３自体をも電気的絶縁層と
して利用していた。かくして一定寸法のスルーホール３
１を形成しつつ図示省略の銅板（銅箔）を設はプリント
回路基板を製造していた。In step 21A, a hole 4 of a predetermined size is provided in the metal substrate 1 on which the electrical MA edge layer 11 is formed on the surface 2, and then the diameter of the hole 4 provided in the metal substrate 1 is enlarged by etching after sharpening, and then Thermosetting 12!1'1 was applied by electrodeposition to form an electrodeposited coating film 14, which is an electrically insulating layer 11. Furthermore, when the metal substrate 1 is made of aluminum, it is anodized beforehand to improve the adhesion of the paint, and the anodic oxidation 11 and 13 itself is also used as an electrical insulating layer. Thus, a through hole 3 of a certain size
1, and a copper plate (copper foil) (not shown) was installed to manufacture printed circuit boards.
また、他の１つの実施例は第３図に示すような方法によ
っていた。Further, another embodiment employed a method as shown in FIG.
第３図において、スルーホール３１の最終寸法より大き
めの穴４が設けられるとともに前処理された金属基板ｌ
を挟み、その両側から接着剤を含有した絶縁材２１と導
電体である銅薄板４１ （または箔）を重ねて熱圧着し
、穴４内に絶縁材２１を充填しつつ金属基板ｌに導電体
４１を一体的に形成し、かつ所定寸法の穴を穿設するこ
とによってスルーホール３１を形成していた。In FIG. 3, a metal substrate l is provided with a hole 4 larger than the final size of the through hole 31 and is pretreated.
An insulating material 21 containing an adhesive and a thin copper plate 41 (or foil) as a conductor are stacked and thermocompressed from both sides, and the conductor is placed on the metal substrate l while filling the hole 4 with the insulating material 21. The through hole 31 was formed by integrally forming the hole 41 and drilling a hole of a predetermined size.
しかしながら、上記従来のいずれのプリント回路１□１
板の製造方法にも次のような問題点を有していた。However, none of the above conventional printed circuits 1□1
The method of manufacturing the plate also had the following problems.
まず、第２図に示した電着法によれば、狭小な穴４内で
あって電気的絶縁層１１より引き込んだ箇所に陽極酸化
処理や電着処理を施さな＆Ｊればならないのでそれらの
電気的特性からも均一的かつ強固に一定の膜厚を形成す
ることができずその信頼性に欠けていた。また絶縁耐圧
の観点から最小膜厚を規定しなければならないから全体
として必゛ツ以１の膜ｊ７形成をすることになり時間的
、経済的に不利であるばかりかスルーホール３Ｉの寸法
精度を劣悪化させてしまうという欠点があった。First, according to the electrodeposition method shown in FIG. 2, it is necessary to perform anodization treatment and electrodeposition treatment on the part inside the narrow hole 4 and drawn in from the electrically insulating layer 11. Due to its electrical characteristics, it was not possible to form a uniform and strong film with a constant thickness, and its reliability was lacking. In addition, since the minimum film thickness must be specified from the viewpoint of dielectric strength, it is necessary to form one film J7 as a whole, which is not only disadvantageous in terms of time and economy, but also reduces the dimensional accuracy of the through hole 3I. The drawback was that it worsened the quality.
さらに、エンチング、陽極酸化、電着処理の如く多工程
から形成されているためにコスト亮となりかつ生産能率
が低いという問題があった。Furthermore, since it is formed through multiple steps such as etching, anodic oxidation, and electrodeposition, there are problems in that the cost is high and the production efficiency is low.
一方、第３図に示した熱圧着法によれば、穴４内の電気
的絶縁層１１の形成は比較的容易であるが銅板ないし銅
箔から形成された導電体４１を金属基板１に電気的絶縁
層の形成と同時的に接着固定するために回路構成は必要
以外の部分（平面上の大部分）をエツチング除去するサ
ブトラクティブ法によらなければならずセミディティブ
あるいはアディティブ法を採用で゛きないという基本的
制糸勺があった。On the other hand, according to the thermocompression bonding method shown in FIG. In order to bond and fix the circuit at the same time as forming an insulating layer, the circuit structure must be constructed using a subtractive method in which unnecessary parts (most of the plane surface) are removed by etching, and semi- or additive methods can be used. There was a basic thread control that could not be done.
かくして本発明は上記問題点を除去すべく ｋ’ｆＡみ
なされたもので、その目的とするところは経済的で高品
質なプリント回路基板を製造することのできるプリント
回路基板の製造方法を提供することにある。Thus, the present invention was conceived to eliminate the above-mentioned problems, and its purpose is to provide a method for manufacturing printed circuit boards that is economical and capable of manufacturing high-quality printed circuit boards. There is a particular thing.
（問題点を解決するための手段）
これがため、本発明は金属基板に大きめの穴を設け、そ
の後に該金属基板およびその穴の表面に電気的絶縁層を
形成し、次いで前記穴内に形成された電気的絶縁層に孔
明は加工して所定寸法のスルーホールを設ける構成とし
前記目的を達成するのである。(Means for Solving the Problem) Therefore, the present invention provides a method of forming a larger hole in a metal substrate, then forming an electrically insulating layer on the surface of the metal substrate and the hole, and then forming an electrically insulating layer in the hole. The above object is achieved by processing the electrically insulating layer to form through holes of a predetermined size.
以上のように構成された本発明においては、金胛基板に
大きめの穴を設け、この穴内に例えば流＋ｈ浸漬法によ
って電気的絶縁層を形成する。In the present invention configured as described above, a large hole is provided in the metal substrate, and an electrically insulating layer is formed in the hole by, for example, a flow+h dipping method.
そして、その後に孔明は加工すれば所定寸法精度のスル
ーホールを形成することができる。Then, by processing the hole after that, a through hole with a predetermined dimensional accuracy can be formed.
本発明に係るプリント回路基板の製造方法を図面を参照
しながら詳細に説明する。なお、萌出第２図、第３閃に
示された従来のプリント回路基板と同一の部分について
は同一の符号を付するとともに説明を簡略化または省略
する。A method for manufacturing a printed circuit board according to the present invention will be explained in detail with reference to the drawings. The same parts as those of the conventional printed circuit board shown in FIGS. 2 and 3 are designated by the same reference numerals, and the explanation will be simplified or omitted.
本発明は第１図に示すように、アルミニウム合金から形
成された薄板状（厚さ１ｆｆｌｆｆＩ）の金属基板ｌに
比較的大きな寸法である直径０．７＋ｎＩ６の穴４を１
リルで穿設する（この実施例では説明便宜のため穴４は
１個を示している。）そして、素材としての特性成立の
ため前処理として脱脂、パリ取り、レヘリング、粗面化
の加工をする。脱脂は溶剤中に浸漬し、パリ取りはブラ
シ法により行い、ローうでレヘリングした後にブラスト
またはリン酸系薬剤によりエツチングすることによって
粗面化している。As shown in FIG. 1, the present invention provides a hole 4 having a relatively large diameter of 0.7+nI6 in a thin plate-like (thickness 1fflffI) metal substrate l made of an aluminum alloy.
(In this example, one hole 4 is shown for convenience of explanation.) Then, in order to establish the characteristics as a material, degreasing, deburring, leveling, and surface roughening are performed as pre-treatments. do. Degreasing is done by dipping in a solvent, deburring is done by a brush method, and after leveling with a wax, the surface is roughened by blasting or etching with a phosphoric acid chemical.
次に、本発明では後記の電気的ｔＩＡ縁層１１を流ｆＪ
＋ ’ｔ：Ｊ清法で行うために金属基板１を２８０°Ｃ
の雲間気中で６分間予熱する（第１図（Ａ）参照ノ。Next, in the present invention, the electric tIA edge layer 11 to be described later is
+'t: Heat the metal substrate 1 at 280°C to perform J cleaning method.
Preheat for 6 minutes in the cloudy air (see Figure 1 (A)).
次に、同（Ｂ）に示したように流動浸漬法により穴４の
内面５を含む金属基板１の全表面２に電気的重縁１５
ｔ ｔを形成する。この電気的絶縁ｒＦｊｌｌはエポキ
シ系樹脂（この実施例では住人ヘークニノイトａｔｌ製
のスミライトレジンＰＫ−５２１４１を採用した）中に
０．５秒間浸漬し引き上げて行う。穴４が大径のため２
００〜３００μｍの厚い絶縁膜を迅速かつ容易に形成す
ることができる。Next, as shown in (B), the entire surface 2 of the metal substrate 1 including the inner surface 5 of the hole 4 is coated with an electrically overlapping edge 15 by a fluidized dipping method.
Form t t. This electrical insulation rFjll is performed by immersing it in an epoxy resin (in this example, Sumilite Resin PK-52141 manufactured by Jubilee Hekuninoite ATL was used) for 0.5 seconds and then pulling it out. 2 because hole 4 is large diameter.
A thick insulating film of 00 to 300 μm can be formed quickly and easily.
その後、２００±１０°Ｃに温度調整された電気が内で
灼７０分乾燥させ硬化させる。硬化した電気的絶縁層１
１に所定寸法（直径０．４５＋＋ｕｎ）の孔をトリルで
穿設し、所定寸法のスルーホール３１を完成させる（同
（Ｃ）参照）。Thereafter, it is dried and cured for 70 minutes in an electric oven whose temperature is adjusted to 200±10°C. Cured electrical insulation layer 1
A hole with a predetermined size (diameter 0.45++un) is drilled in 1 to complete a through hole 31 with a predetermined size (see (C)).
なお、引き続き図示省略したが電気的絶縁層１１の表面
をプラストあるいは例えばクロム酸系薬品を用いたエツ
チングによって表面調整を行った１＆銅箔等の導電体を
形成する。、導電体はアディティブ法で直接回路を形成
する等その方法は任意にｍ１尺できるものである。Although not shown, the surface of the electrically insulating layer 11 is then coated with a conductive material such as 1&copper foil, which has been surface-conditioned by etching using a plastic or, for example, a chromic acid-based chemical. , the conductor can be used to form a circuit directly using an additive method, etc., and the length of the conductor can be arbitrarily reduced to 1 m.
しかして、この実施例によれば、金属基板ｌにスルーホ
ール形成用の比較的大きな穴４を形成し、その人４を含
む表面に電気的絶縁層１１を形成し、しかる後に所定寸
法の孔明は加工をすることによっ一ζ形成されたスルー
ホール３１を有するプリント回路基板を完成することが
できる。したがって、前記従来の方法の如く必要以上の
膜厚形成等による不利はなく高品質で信頼性の高いプリ
ント回路凸版を能率よく経済的に生産することができる
。According to this embodiment, a relatively large hole 4 for forming a through hole is formed in the metal substrate l, an electrically insulating layer 11 is formed on the surface including the person 4, and then a hole of a predetermined size is formed. By processing, it is possible to complete a printed circuit board having a through hole 31 formed with a diameter of 1ζ. Therefore, unlike the conventional method, there is no disadvantage due to the formation of a film thicker than necessary, and a high quality and reliable printed circuit letterpress can be efficiently and economically produced.
また、電気的絶縁層１１の形成は流動浸漬）火により形
成されるから、多工程を有する従来例に比較してシンプ
ルであり生産能率が高く経済的である。また、大径の穴
４内に３００μｍの如き厚い膜を形成できるからスルー
ホール３１の絶縁性を飛ｙ１°ｄ的に向」二でき信頼性
を高めることができる七ともに電気的絶縁層１１は一種
類の材料から形成されているのでヒートサイクルテスト
、実用に亘り複故種の材料から形成したときに生ずる熱
膨張率の差５′シに基づくコーナ一部分等にクラックを
発生ずることがない。この点からも高品質が保障される
。Furthermore, since the electrical insulating layer 11 is formed by fluidized immersion, it is simpler, more efficient and more economical than conventional methods that require multiple steps. In addition, since a thick film such as 300 μm can be formed inside the large-diameter hole 4, the insulation properties of the through-hole 31 can be improved across the board, increasing reliability. Since it is made of one type of material, cracks do not occur at corners due to the difference in thermal expansion coefficient 5' which occurs when it is made from materials of multiple failure types in heat cycle tests and in practical use. High quality is guaranteed from this point as well.
さらに、スル−ホール３１は金属基（反ｌ自体に孔明け
せずに電気的絶縁Ｎ １１に孔明けすればよいから例え
ば直径を０．４５ｍｍ以下とすることができ、かつ所定
位置に高精度でスルーホール３１を設けることができる
。このことはプリント回路Ｂ ＋Ｈの一番重要な部分の
信頼性を高めることになるから全体として一層の高品質
を保障することができることをα味するものである。ま
た、たちかえって、金属基板１へ穿設する穴４はスルー
ホール３１の小径にかかわらず大径としてよいから孔明
は作業が容易となり小径作業の場合のカエリやハリが発
生せず、またドリルの破ｔｉ等を防止することができる
。Furthermore, the through-hole 31 can be made with a diameter of 0.45 mm or less, for example, since it is sufficient to make a hole in the electrically insulating N11 without making a hole in the metal base (reverse l itself), and it can be placed in a predetermined position with high precision. Through holes 31 can be provided in the printed circuit B+H.This increases the reliability of the most important part of the printed circuit B+H, so it is possible to guarantee even higher quality as a whole. In addition, since the hole 4 to be drilled into the metal substrate 1 can be made large in diameter regardless of the small diameter of the through hole 31, the drilling process becomes easier, and burrs and burrs do not occur when working with a small diameter. It is possible to prevent the drill from breaking.
なお、以上の実施例では、金属基板１をアルミニウム合
金から形成したが、本発明では金属材料であればこれに
限定されない。同様に温度条件、時間、膜厚、さらには
塗料、薬剤等もその目的により任意に選択することがで
きる。In addition, in the above embodiment, the metal substrate 1 was formed from an aluminum alloy, but the present invention is not limited to this as long as it is a metal material. Similarly, temperature conditions, time, film thickness, paint, chemicals, etc. can be arbitrarily selected depending on the purpose.
また、電気的絶縁層１１は流動浸漬法により形成するよ
うしたが、電着法等信の方法でも実施することができる
。ただし、流動浸漬法とすれば迅速かつ経済的に大きな
膜厚を生成できるという効果が大きい。また、金ｇ４’
Ｊ ｕｉｌがアルミニウム合金等であるときは先立って
陽極酸化皮膜を形成することもできる。Further, although the electrical insulating layer 11 is formed by a fluidized dipping method, it can also be formed by a method such as an electrodeposition method. However, the fluidized dipping method has the great effect of producing a large film thickness quickly and economically. Also, gold g4'
When the juil is made of aluminum alloy or the like, an anodic oxide film can be formed in advance.
以上説明したように、本発明は大径の穴を設けた後に電
気的絶縁層を形成し、それに所定寸法の孔を再度穿設す
る構成としているから、作業能率が高く経済的に高品質
のプリント回路基板を製造するとかできるという優れた
効果を有する。As explained above, the present invention has a structure in which a large-diameter hole is formed, an electrically insulating layer is formed, and a hole of a predetermined size is then drilled again in the electrically insulating layer, so that it is highly efficient, economical, and of high quality. It has excellent effects such as being able to manufacture printed circuit boards.
第１図は本発明に係るプリント回路基板の製造方法の一
実施例を示す工程図および第２図、第３図は従来のプリ
ン）−回路基板の製造方法の工程図であって、第２図は
電着法、第３図は熱圧着法を示す。
■・・・金属基板、４・・・穴、１１・・・電気的ＩＨ
ｉ層、３１・・・スルーホール。FIG. 1 is a process diagram showing an embodiment of the printed circuit board manufacturing method according to the present invention, and FIGS. 2 and 3 are process diagrams of a conventional printed circuit board manufacturing method. The figure shows the electrodeposition method, and FIG. 3 shows the thermocompression bonding method. ■...Metal board, 4...hole, 11...electrical IH
i layer, 31... through hole.
Claims (2)
を形成し、次いで前記穴内に形成された電気的絶縁層に
孔明け加工して所定寸法のスルーホールを設けることを
特徴としたプリント回路基板の製造方法。(1) A large hole is formed in a metal substrate, an electrically insulating layer is formed on the surface of the metal substrate and the hole, and then a hole is formed in the electrically insulating layer formed in the hole to a predetermined size. A method of manufacturing a printed circuit board, characterized by providing a through hole.
絶縁層を流動浸漬法によって形成するプリント回路基板
の製造方法。(2) The method for manufacturing a printed circuit board according to claim 1, wherein the electrically insulating layer is formed by a fluidized dipping method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8248987A JPS63248198A (en) | 1987-04-02 | 1987-04-02 | Manufacture of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8248987A JPS63248198A (en) | 1987-04-02 | 1987-04-02 | Manufacture of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63248198A true JPS63248198A (en) | 1988-10-14 |
Family
ID=13775913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8248987A Pending JPS63248198A (en) | 1987-04-02 | 1987-04-02 | Manufacture of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63248198A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006222216A (en) * | 2005-02-09 | 2006-08-24 | Fujitsu Ltd | Wiring board and its manufacturing method |
| JP2011522395A (en) * | 2008-01-11 | 2011-07-28 | ピーピージー インダストリーズ オハイオ， インコーポレイテッド | Circuit board having electrodeposition coating on conductive core in via and method of making the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132376A (en) * | 1976-04-30 | 1977-11-07 | Hitachi Chemical Co Ltd | Method of producing printed circuit substrate with metallic core |
| JPS5472462A (en) * | 1977-11-22 | 1979-06-09 | Hitachi Chemical Co Ltd | Preparation of substrate for metallic core print plug board |
| JPS5789297A (en) * | 1980-11-26 | 1982-06-03 | Fujitsu Ltd | Method of producing metallic core printed board |
-
1987
- 1987-04-02 JP JP8248987A patent/JPS63248198A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132376A (en) * | 1976-04-30 | 1977-11-07 | Hitachi Chemical Co Ltd | Method of producing printed circuit substrate with metallic core |
| JPS5472462A (en) * | 1977-11-22 | 1979-06-09 | Hitachi Chemical Co Ltd | Preparation of substrate for metallic core print plug board |
| JPS5789297A (en) * | 1980-11-26 | 1982-06-03 | Fujitsu Ltd | Method of producing metallic core printed board |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006222216A (en) * | 2005-02-09 | 2006-08-24 | Fujitsu Ltd | Wiring board and its manufacturing method |
| JP2011522395A (en) * | 2008-01-11 | 2011-07-28 | ピーピージー インダストリーズ オハイオ， インコーポレイテッド | Circuit board having electrodeposition coating on conductive core in via and method of making the same |
| JP2013211585A (en) * | 2008-01-11 | 2013-10-10 | Ppg Industries Ohio Inc | Circuit board having electrodeposited coating on conductive core in via and method for manufacturing the same |
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