JPS6323651B2 - - Google Patents

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Publication number
JPS6323651B2
JPS6323651B2 JP53119623A JP11962378A JPS6323651B2 JP S6323651 B2 JPS6323651 B2 JP S6323651B2 JP 53119623 A JP53119623 A JP 53119623A JP 11962378 A JP11962378 A JP 11962378A JP S6323651 B2 JPS6323651 B2 JP S6323651B2
Authority
JP
Japan
Prior art keywords
layer
growth
substrate
gaas
epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53119623A
Other languages
Japanese (ja)
Other versions
JPS5546536A (en
Inventor
Yoshinari Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP11962378A priority Critical patent/JPS5546536A/en
Publication of JPS5546536A publication Critical patent/JPS5546536A/en
Publication of JPS6323651B2 publication Critical patent/JPS6323651B2/ja
Granted legal-status Critical Current

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  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Lasers (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

【発明の詳細な説明】 この発明はエピタキシヤル結晶成長方法、特に
エピタキシヤル結晶成長過程でエピタキシヤル結
晶成長基板の表面除去を行なうことを特徴とした
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention is an epitaxial crystal growth method, and is characterized in that the surface of an epitaxial crystal growth substrate is removed during the epitaxial crystal growth process.

固体材料表面付近を除去あるいは選択的に除去
することはあらゆる固体材料を扱う工業分野で使
われるといつても過言でない。その最も洗練され
た技術は電子工業とりわけ半導体技術分野におい
て見ることが出来る。特に最近、エピタキシヤル
結晶成長に先立つて基板表面に凹凸構造をつくる
必要性が半導体レーザや光回路素子のためのエピ
タキシヤル結晶成長において要求されるようにな
つた。しかし凹凸構造そのものをデバイスの動作
領域に利用するために特に−化合物半導体か
ら作られるこれら半導体レーザではエピタキシヤ
ル成長前の基板加熱過程で凹凸構造をもつた表面
の熱劣化がおこるため従来の方法で作られたこれ
ら半導体レーザの信頼性をおとすことになる。即
ち従来のこうした凹凸構造を有する基板上へのエ
ピタキシヤル成長方法の問題点を明らかにするた
めに2種類の半導体レーザの製造プロセスを例に
とつて説明する。
It is no exaggeration to say that removing or selectively removing near the surface of a solid material is used in all industrial fields that handle solid materials. Its most sophisticated technology can be found in the electronic industry, especially in the field of semiconductor technology. Particularly recently, it has become necessary to create an uneven structure on the surface of a substrate prior to epitaxial crystal growth in epitaxial crystal growth for semiconductor lasers and optical circuit elements. However, in order to utilize the uneven structure itself in the operating region of the device, especially in these semiconductor lasers made from compound semiconductors, the surface with the uneven structure undergoes thermal deterioration during the substrate heating process before epitaxial growth, so conventional methods cannot be used. This will reduce the reliability of these semiconductor lasers. That is, in order to clarify the problems of the conventional method of epitaxial growth on a substrate having an uneven structure, two types of semiconductor laser manufacturing processes will be explained as examples.

第1図は発明者による水平横モード、しいては
縦モード制御にも有効な特許願昭51−6226号の半
導体レーザ素子の構造説明のために描かれたフア
ブリ・ペロ共振器断面からみた半導体レーザ素子
の図である。第1図の構造を得るには先の特許願
昭51−6226号の明細書中に詳しく説明したように
まずn形GaAs基板11にストライプ状の溝2を
作る。
Figure 1 shows a semiconductor seen from the cross section of a Fabry-Perot resonator, which was drawn by the inventor to explain the structure of the semiconductor laser device of Patent Application No. 51-6226, which is effective for horizontal transverse mode control and also for longitudinal mode control. FIG. 2 is a diagram of a laser element. To obtain the structure shown in FIG. 1, stripe-shaped grooves 2 are first formed in the n-type GaAs substrate 11, as explained in detail in the specification of the earlier patent application No. 51-6226.

この溝にはまずn形GaAs基板11の基板表面
上にフオトレジスト技術を用いほぼ溝12を作る
位置に表面露出した窓をあけ、次にフオトレジス
トをそのままマスクとして例えばCH3OH:
H3PO4:H2O2=50:3:3(容量比)の液で30秒
間エツチングし約1.5μm程の深さをもつた溝12
を堀る。この後フオトレジストをn形GaAs基板
11の表面より除去し、該基板11表面の清浄を
はかつた後、液相エピタキシヤル(LPE)炉中
に入れ、n−Al0.3Ga0.7As層13、n−GaAs活
性層14、p−Al0.3Ga0.7As層15、次にn−
GaAs層16を作り後にZu拡散部17を選択拡散
法により作り、さらに電極18および19を作る
ことにより第1図に示した半導体レーザ素子が得
られる。第1図においてはGaAs基板11に溝1
2を作る工程はLPF成長前、しかもLPE反応炉
の外で成される。従つてプロセスの連続性に欠け
るものであり、また同時に溝12を作られたn形
GaAs基板11はLPE工程に先立つてLPE反応炉
中で高温にさらされる結果、基板表面の熱劣化が
生じ、この熱劣化層の上にLPE成長することに
より作られたウエハアから作られた素子の信頼性
は低いものとなる。
In this groove, first, a window is made on the surface of the n-type GaAs substrate 11 using photoresist technology to expose the surface at approximately the position where the groove 12 will be formed, and then the photoresist is used as a mask to form a window, for example, CH 3 OH:
Grooves 12 with a depth of approximately 1.5 μm were etched for 30 seconds with a solution of H 3 PO 4 :H 2 O 2 = 50:3:3 (volume ratio).
dig. Thereafter, the photoresist is removed from the surface of the n-type GaAs substrate 11, and after cleaning the surface of the substrate 11, it is placed in a liquid phase epitaxial (LPE) furnace, and the n-Al 0.3 Ga 0.7 As layer 13, n-GaAs active layer 14, p-Al 0.3 Ga 0.7 As layer 15, then n-
After forming the GaAs layer 16, a Zu diffusion section 17 is formed by a selective diffusion method, and electrodes 18 and 19 are formed, thereby obtaining the semiconductor laser device shown in FIG. In Fig. 1, a groove 1 is formed in a GaAs substrate 11.
The process for making 2 is performed before LPF growth and outside the LPE reactor. Therefore, the process lacks continuity, and the n-type groove 12 is made at the same time.
The GaAs substrate 11 is exposed to high temperatures in an LPE reactor prior to the LPE process, resulting in thermal deterioration of the substrate surface, and devices made from wafers made by LPE growth on this thermally degraded layer. Reliability will be low.

従来例の他の一つはいわゆる埋め込みヘテロ接
合(BH)レーザと呼ばれる半導体レーザの製造
工程での例をあげることにする。第2図はBHレ
ーザの共振器断面より見た概念図である。このレ
ーザを作るにはまずn形GaAs基板11上にn−
Al0.3Ga0.7As層13、次にn−GaAs活性層14
を形成する第1のLPE成長を行なう。次にLPE
反応炉より結晶をとり出し、フオトレジストによ
り選択エツチングマスクを形成し、ストライプ状
の活性領域2aを残して、ストライプ両側の活性
領域2bをエツチングで取り除く。次にこの上か
らp−Al0.3Ga0.7As層15を形成し、次にn−
GaAs層16を形成する第2のLPE成長を行な
い、さらにp形拡散領域17を作り、電極18,
19を作ることによりBHレーザが作られる。以
上がBHレーザの標準的製造プロセスである。第
2図において説明したBHレーザの製造プロセス
においてストライプ状活性領域2aを選択エツチ
ングで形成する場合、活性層14の表面には直接
フオトレジストをつけられたりしてよごされるば
かりか、ストライプ状活性領域2aは第2の
LPE成長前、反応炉中で高温下にさらされ熱劣
化するという難点を持つている。従つてこのよう
に熱劣化した活性領域2aを有したBHレーザの
素子寿命はきわめて短い。BHレーザの製造法に
おける熱劣化されず活性領域2aを作る方法は多
く工夫された。第3図は熱劣化の少ない活性領域
2aを作るために考えられたBHレーザの製造方
法により得られたBHレーザの一例で特願昭50−
66267号に示された実施例の一つを示すウエフア
断面図である。第3図のウエフアはまずn形
GaAs基板11上に均一な厚みを持つたn形Al0.3
Ga0.7As層13、n−GaAs活性層14およびp
−Al0.3Ga0.7As層15p−GaAs層316を形成する
第1のLPE成長を行なう。
Another conventional example is the manufacturing process of a semiconductor laser called a so-called buried heterojunction (BH) laser. Figure 2 is a conceptual diagram of a BH laser cavity viewed from a cross section. To make this laser, first place an n-
Al 0.3 Ga 0.7 As layer 13, then n-GaAs active layer 14
A first LPE growth is performed to form a . Then LPE
The crystal is taken out from the reactor, a selective etching mask is formed using photoresist, and the active regions 2b on both sides of the stripe are removed by etching, leaving the striped active region 2a. Next, a p-Al 0.3 Ga 0.7 As layer 15 is formed on this, and then an n-Al 0.3 Ga 0.7 As layer 15 is formed.
A second LPE growth is performed to form a GaAs layer 16, a p-type diffusion region 17 is formed, and an electrode 18,
By making 19, a BH laser is made. The above is the standard manufacturing process for BH lasers. When the striped active region 2a is formed by selective etching in the manufacturing process of the BH laser explained in FIG. 2a is the second
It has the disadvantage of being exposed to high temperatures in the reactor before LPE growth, resulting in thermal deterioration. Therefore, the device life of a BH laser having such a thermally degraded active region 2a is extremely short. Many methods have been devised to create the active region 2a without thermal deterioration in the BH laser manufacturing method. Figure 3 shows an example of a BH laser obtained by a BH laser manufacturing method devised to create an active region 2a with little thermal deterioration.
FIG. 66267 is a wafer cross-sectional view showing one of the embodiments shown in No. 66267. The wafer in Figure 3 is first of n-type.
N-type Al 0.3 with uniform thickness on GaAs substrate 11
Ga 0.7 As layer 13, n-GaAs active layer 14 and p
A first LPE growth is performed to form the -Al 0.3 Ga 0.7 As layer 15p -GaAs layer 316.

続いてLPE反応炉より第1のLPE成長を行な
つたウエフアを取り出しウエフア表面にフオトレ
ジスト選択マスクを形成し、ストライプ状領域を
のぞいてn−GaAs活性層14が表われるまで選
択エツチングを行なう。次にフオトレジストをと
りのぞいたウエフアをLPE炉に入れ、BGaAs層
316およびストライプ領域外の表面に露出した
n−GaAs活性層14をすくなくもエツチバツク
してp−Al0.3Ga0.7As層31を形成すると第3図
のBH構造ウエフアが出来上る。しかしこの方法
においてもストライプ領域側面は熱劣化したり露
出したnAl0.3Ga0.7As層13の側面には第2の
LPE成長によるpAl0.3Ga0.7As層31のなじみが
わるいという欠点、およびエツチバツクの制御と
いうきわめて困難な問題に立ちむかわねばならな
い。
Subsequently, the wafer on which the first LPE growth has been performed is taken out of the LPE reactor, a photoresist selective mask is formed on the wafer surface, and selective etching is performed until the n-GaAs active layer 14 appears except for the striped region. Next, the wafer with the photoresist removed is placed in an LPE furnace, and at least the BGaAs layer 316 and the n-GaAs active layer 14 exposed on the surface outside the stripe region are etched back to form the p-Al 0.3 Ga 0.7 As layer 31. Then, the BH structure wafer shown in Figure 3 is completed. However, even with this method, the sides of the stripe region are thermally degraded, and the sides of the exposed nAl 0.3 Ga 0.7 As layer 13 are covered with a second layer.
The disadvantage of poor conformability of the pAl 0.3 Ga 0.7 As layer 31 due to LPE growth and the extremely difficult problem of controlling etchback must be overcome.

この発明の目的は前記3つの半導体レーザ構造
を作る上に端的に現われた選択エツチングと
LPF成長プロセスの不連続性、選択エツチング
面の熱劣化の問題を大幅に改良することを可能と
し素子特性の向上を達成することができ、かつ多
くのデバイス製造のエピタキシヤル結晶成長法と
して応用可能な新しい表面除去の方法を含んだエ
ピタキシヤル成長法を与えるものである。
The purpose of this invention is to improve the selective etching that clearly appeared in the fabrication of the three semiconductor laser structures.
It is possible to significantly improve the problems of discontinuities in the LPF growth process and thermal deterioration of selectively etched surfaces, and it is possible to achieve improvements in device characteristics, and it can be applied as an epitaxial crystal growth method for manufacturing many devices. The present invention provides an epitaxial growth method that includes a novel surface removal method.

この発明の骨子は結晶基板あるいはエピタキシ
ヤル層をすでに有した基板表面に全面ないし局部
的に異種材料を薄膜状に形成し次にエピタキシヤ
ル成長前の加熱処理により、上記薄膜材料付着部
表面と薄膜材料とを反応させ、しかる後エピタキ
シヤル成長することにある。該反応層は液相エピ
タキシヤル法においては反応層をエピタキシヤル
成長用溶液中にとり込み溶融し、気相エピタキシ
ヤル法では反応層を気相反応によりとりのぞけら
れ、しかる後エピタキシヤル成長を行なう。
The gist of this invention is to form a thin film of a different material on the entire surface or locally on the surface of a crystal substrate or a substrate that already has an epitaxial layer, and then heat treatment before epitaxial growth to form a thin film on the surface of the thin film material attachment area. The process involves reacting the materials with each other and then epitaxially growing them. In the liquid phase epitaxial method, the reaction layer is taken into an epitaxial growth solution and melted, and in the vapor phase epitaxial method, the reaction layer is removed by a gas phase reaction, and then epitaxial growth is performed.

以下実施例として、この発明を第1図に示した
構造の半導体レーザ素子の製造方法に応用したと
きの具体例に基ずいて本発明を詳細に説明する。
第4図は本発明の表面除去の方法のうち特に選択
的除去の方法をたくみに利用して本発明者による
前記特許願昭51−6226号の半導体レーザ素子の構
造を製造する場合の重要な工程を示す図であり、
最終的には第1図に示した構造の半導体レーザ素
子が得られる。製造方法を順を追つて説明しよ
う。まず第4図aに示すように(100)面を表面
としてn形GaAs基板11上にZn薄膜41をたと
えば真空蒸着等で形成し、ストライプ領域として
溝12(第1図参照)を堀る位置にのみZn薄膜
41aを残してフオトレジスト、選択エツチング
技術を用いてZn薄膜41をとり除く。Zn薄膜4
1をとり除く段階では本発明の方法が使われてい
ないことを蛇足ながら注意しておく。
As an example, the present invention will be explained in detail based on a specific example in which the present invention is applied to a method of manufacturing a semiconductor laser device having the structure shown in FIG.
FIG. 4 shows the important points when manufacturing the structure of the semiconductor laser device of the above-mentioned patent application No. 51-6226 by the present inventor by effectively utilizing the surface removal method of the present invention, particularly the selective removal method. It is a diagram showing the process,
Finally, a semiconductor laser device having the structure shown in FIG. 1 is obtained. Let's explain the manufacturing method step by step. First, as shown in FIG. 4a, a Zn thin film 41 is formed on an n-type GaAs substrate 11 with the (100) plane as the surface by vacuum evaporation, etc., and grooves 12 (see FIG. 1) are dug as stripe regions at positions. The Zn thin film 41 is removed using a photoresist and selective etching technique, leaving the Zn thin film 41a only on the surface. Zn thin film 4
It should be noted that the method of the present invention is not used in the step of removing 1.

こうしてZn薄膜41aが選択的に形成された
GaAs基板(第4図a)をLPE成長炉中に基板結
晶として用意し、結晶成長開始温度まで上昇する
とGaAs基板11上のZn薄膜41aは接触した
GaAs表面と反応し、Zn薄膜41の厚みに応じて
GaAs基板11の表面を溶融する。
In this way, the Zn thin film 41a was selectively formed.
A GaAs substrate (Fig. 4a) was prepared as a substrate crystal in an LPE growth furnace, and when the temperature rose to the crystal growth start temperature, the Zn thin film 41a on the GaAs substrate 11 came into contact.
Reacts with the GaAs surface, depending on the thickness of the Zn thin film 41.
The surface of the GaAs substrate 11 is melted.

この段階は第4図bに示した。GaAs基板11
表面のZn薄膜41aが付着してあつた部分のみ、
ZnとGaおよびAsよりなる溶液相42が生じる。
結晶成長開始温度を750℃とした場合、750℃での
保持時間を20分以上にとるとGa−As−Zn三元相
図からほぼ予想されるようにGaAs表面はZn薄膜
41aと反応し、Zn薄膜の厚みを1μmとした時、
GaAs表面は約2μm、Zn薄膜に反応して溶融し
た。こうして結晶成長温度750℃で30分間温度保
持した後、良く知られた連続LPE法によりn−
Al0.3Ga0.7As層13、nGaAs活性層14、pAl0.3
Ga0.7As層15続いてnGaAs層16を形成すると
第4図cの構造を有したダブル・ヘテロ接合レー
ザ用ウエフアが得られ、この後選択拡散、電極形
成を行なうことにより第1図に示した半導体レー
ザ素子が得られる。
This stage is shown in Figure 4b. GaAs substrate 11
Only the part where the Zn thin film 41a on the surface was attached,
A solution phase 42 consisting of Zn, Ga and As is formed.
When the crystal growth start temperature is 750°C, if the holding time at 750°C is longer than 20 minutes, the GaAs surface reacts with the Zn thin film 41a, as expected from the Ga-As-Zn ternary phase diagram. When the thickness of the Zn thin film is 1 μm,
The GaAs surface was approximately 2 μm thick and melted in response to the Zn thin film. After maintaining the crystal growth temperature at 750°C for 30 minutes, n-
Al 0.3 Ga 0.7 As layer 13, nGaAs active layer 14, pAl 0.3
By forming the Ga 0.7 As layer 15 and then the nGaAs layer 16, a double heterojunction laser wafer having the structure shown in FIG. A semiconductor laser device is obtained.

n−Al0.3Ga0.7As層13作製用のLPE成長溶液
がn形GaAs基板11に接触するとLPE成長溶液
中に溶液層42は融け込む。このとき溶液相42
中のZnはLPE成長溶液中に取り込まれるが、取
り込まれたZnはLPE成長溶液中から飛散しやす
いこと、またLPE結晶中へのZnの偏析係数が小
さく、ZnがLPE溶液中に入つてもn形Al0.3Ga0.7
As層を成長させることは容易である。
When the LPE growth solution for forming the n-Al 0.3 Ga 0.7 As layer 13 comes into contact with the n-type GaAs substrate 11, the solution layer 42 melts into the LPE growth solution. At this time, the solution phase 42
The Zn inside is taken into the LPE growth solution, but the taken in Zn easily scatters from the LPE growth solution, and the segregation coefficient of Zn into the LPE crystal is small, so even if Zn gets into the LPE growth solution, n-type Al 0.3 Ga 0.7
It is easy to grow an As layer.

この発明の方法で得られる第1図に示した半導
体レーザ素子は結晶成長前にGa、ZnおよびAsを
含んだ溶液相42がストライブ領域の部分となる
n形GaAs基板11の表面をおおつておりLPE成
長に先立つてストライブ領域下に位置するGaAs
基板が熱劣化することはない。
In the semiconductor laser device shown in FIG. 1 obtained by the method of the present invention, a solution phase 42 containing Ga, Zn, and As is applied to the surface of the n-type GaAs substrate 11, which will become the stripe region, before crystal growth. GaAs located under the stripe region prior to LPE growth.
The board will not deteriorate due to heat.

従つてこうして製作した第1図の構造をもつた
半導体レーザ素子の信頼性は高いものとなる。ま
たこの発明では、LPE成長法で通常用いられて
いるエツチバツク手法、すなわちあらかじめ用意
した溶融液で結晶表面を溶かした後LPE成長す
る方法では得られないような微細なパターンを
LPE成長前に作ることができ、複雑な構造の素
子も実現可能となる。このことを第1図に示した
構造の半導体レーザ素子を得る場合について具体
的に説明する。第1図の構造を得るには通常のエ
ツチバツク手法を用いる場合は、たとえばまず未
飽和状態にあるn−Al0.3Ga0.7As層成長溶液を形
成すべき溝と同じ幅で基板に接触させることによ
り所定の溝部のみエツチバツクし、しかる後飽和
状態にあるn−Al0.3Ga0.7As層成長用溶液を基板
全面に接触させてLPE成長を行なう。この場合
溝部の幅は10μmであり、溶液を10μmの幅に限
つてのせることは溶液の表面張力の影響のためき
わめて難しく、エツチバツクの制御はほとんど不
可能である。しかるに本発明によれば実施例で示
したように、あらかじめ基板上に薄膜を形成し、
この薄膜と基板とを反応させた後に反応層を除去
することにより容易に第1図に示した構造の半導
体レーザ素子が得られる。
Therefore, the reliability of the semiconductor laser device manufactured in this way and having the structure shown in FIG. 1 is high. In addition, this invention enables the creation of fine patterns that cannot be obtained using the etchback method normally used in LPE growth, that is, the method of melting the crystal surface with a pre-prepared melt and then performing LPE growth.
It can be made before LPE growth, making it possible to realize devices with complex structures. This will be specifically explained with reference to the case where a semiconductor laser device having the structure shown in FIG. 1 is obtained. The structure shown in Figure 1 can be obtained by using the usual etch-back technique, for example, by first contacting the substrate with an unsaturated n-Al 0.3 Ga 0.7 As layer growth solution with the same width as the groove to be formed. Only the predetermined groove portions are etched back, and then a saturated n-Al 0.3 Ga 0.7 As layer growth solution is brought into contact with the entire surface of the substrate to perform LPE growth. In this case, the width of the groove is 10 μm, and it is extremely difficult to place the solution within a width of 10 μm due to the influence of the surface tension of the solution, making it almost impossible to control the etchback. However, according to the present invention, as shown in the examples, a thin film is formed on the substrate in advance,
By reacting this thin film with the substrate and then removing the reaction layer, a semiconductor laser device having the structure shown in FIG. 1 can be easily obtained.

次に第2図に示したBHレーザの製造に本発明
の方法を適用した実施例について説明する。第5
図は本発明の表面除去の方法をBHレーザ製作プ
ロセスに導入した重要な工程を示すウエフア断面
図である。第5図aは第2図で説明したように第
1のLPE成長により、n形GaAs基板11上にn
−Al0.3Ga0.7As層13、続いてn−GaAs活性層
14をLPE成長し、次にZn薄膜51をn−GaAs
活性層14表面に形成し、その後、ストライプ状
発振領域となる活性領域2aにあたる部分だけ
Zn薄膜51をフオトレジスト技術および選択エ
ツチング技術を用いて取り除いた段階を示す図で
ある。第5図aに示したウエフアをLPE成長炉
に入れLPE成長開始温度まで加熱するとZn薄膜
51、第4図の実施例で示したようにZn薄膜5
1の付着部分のみn−GaAs活性層14を溶融し
(Zn薄膜層が厚い時にはnGaAs活性層14に加え
てその下にn−Al0.3Ga0.7As層13をも溶融す
る)溶液相52が形成されて第5図bの状態にな
る。nGaAs活性層14の厚みが0.2μm程度ならば
100ÅのZnを蒸着することで簡単にnGaAs活性層
2b(第2図参照)を取り除くのに十分な反応層
が得られる。
Next, an example in which the method of the present invention is applied to the manufacture of the BH laser shown in FIG. 2 will be described. Fifth
The figure is a cross-sectional view of a wafer showing important steps in which the surface removal method of the present invention is introduced into the BH laser manufacturing process. FIG. 5a shows an n-type GaAs substrate 11 grown on an n-type GaAs substrate 11 by the first LPE growth as explained in FIG.
- Al 0.3 Ga 0.7 As layer 13 and then n-GaAs active layer 14 are grown by LPE, and then Zn thin film 51 is grown by n-GaAs.
Only the portion corresponding to the active region 2a that is formed on the surface of the active layer 14 and then becomes a striped oscillation region
5 is a diagram showing a stage in which the Zn thin film 51 is removed using a photoresist technique and a selective etching technique. FIG. The wafer shown in FIG.
A solution phase 52 is formed by melting the n-GaAs active layer 14 only at the part where Zn 1 is attached (when the Zn thin film layer is thick, in addition to the n-GaAs active layer 14, the n-Al 0.3 Ga 0.7 As layer 13 underneath is also melted). The state shown in FIG. 5b is reached. If the thickness of the nGaAs active layer 14 is about 0.2 μm,
By depositing 100 Å of Zn, a reaction layer sufficient to easily remove the nGaAs active layer 2b (see FIG. 2) is obtained.

この後pAl0.3Ga0.7As層15を成長するLPE溶
液に第5図bの状態の結晶を接触させると、溶液
相52は該LPE溶液と混合される。次に徐冷す
るとp−Al0.3Ga0.7As層15が成長する。さらに
このp−Al0.3Ga0.7As層15上にz−GaAs層1
6を成長することにより、BEレーザ用LPEウエ
フアが出来上る。(第5図c) こうして出来上がつたBHレーザは第2のLPE
成長時にストライブ部活性層2aをのぞいてGa、
ZnおよびAsからなる溶液相が存在しているため、
高温加熱中においても第1のLPE成長層からの
Asの蒸発量をおさえるため、第1のLPE成長層
を熱的に劣化させることがない。
Thereafter, when the crystal in the state shown in FIG. 5b is brought into contact with the LPE solution in which the pAl 0.3 Ga 0.7 As layer 15 is grown, the solution phase 52 is mixed with the LPE solution. Next, by slow cooling, a p-Al 0.3 Ga 0.7 As layer 15 grows. Furthermore, a z-GaAs layer 1 is formed on this p-Al 0.3 Ga 0.7 As layer 15.
By growing 6, LPE wafer for BE laser is completed. (Fig. 5c) The BH laser thus completed is the second LPE.
During growth, Ga except for the stripe active layer 2a,
Due to the presence of a solution phase consisting of Zn and As,
Even during high-temperature heating, the growth from the first LPE growth layer
Since the amount of evaporation of As is suppressed, the first LPE growth layer is not thermally degraded.

従つてこうして作られたBHレーザは信頼性の
きわめて高いものとなる。
Therefore, the BH laser made in this way has extremely high reliability.

以上、本発明の表面除去の方法を適用した実施
例として第1図及び第2図で示した構造をもつ半
導体レーザ素子およびBHレーザの製造方法を例
にとつて示した。以上の実施例では結晶基板ある
いはすでにエピタキシヤル層を有する基板表面に
異種材料であるZnを薄膜状に形成し次のLPE結
晶成長プロセスで該薄膜と基板表面を反応させ、
後にこの反応層をLPE結晶成長用溶液中に溶融
するという新規な液相エピタキシヤル方法につい
て示した。この発明によれば基板結晶の熱劣化の
問題が大幅に改良でき、信頼性の高いデバイスの
製造が容易にえられる。実施例ではGaAsあるい
はAlxGa1−xAs材料を本発明の結晶基板に用い
薄膜材料としてZnを用い、かつGaAsないし
AlGaAsのエピタキシヤル成長について示した。
しかしこの発明の方法はもちろん基板素材および
薄膜素材を限定するものではないことは明らかで
ある。
The method for manufacturing a semiconductor laser device and BH laser having the structures shown in FIGS. 1 and 2 has been described above as an example to which the surface removal method of the present invention is applied. In the above embodiments, a thin film of Zn, which is a different material, is formed on the surface of a crystal substrate or a substrate that already has an epitaxial layer, and the thin film and the surface of the substrate are reacted in the next LPE crystal growth process.
Later, we demonstrated a new liquid phase epitaxial method in which this reaction layer was melted in a solution for LPE crystal growth. According to the present invention, the problem of thermal deterioration of substrate crystals can be significantly improved, and highly reliable devices can be easily manufactured. In the examples, GaAs or AlxGa 1 -xAs material is used for the crystal substrate of the present invention, Zn is used as the thin film material, and GaAs or AlxGa 1 -xAs material is used for the crystal substrate of the present invention.
The epitaxial growth of AlGaAs is shown.
However, it is clear that the method of the present invention is not limited to substrate materials and thin film materials.

薄膜素材は液層エピタキシヤル層の不純物とし
て好ましくない場合にはあらかじめ液相エピタキ
シヤル成長には用いないエピタキシヤル溶液と類
似した別の溶液を基板上にかぶせ該薄膜との反応
層を溶解し、この溶解溶液をとり除き液相エピタ
キシヤル用溶液を後に基板にのせて成長すれば良
い。また実施例は上記薄膜材料と表面除去を行な
う材料とを高温加熱した段階での反応後の状態は
液相を呈したが、この反応層は液相に限らず固相
状態でも液相の場合と同様の効果が得られる。反
応層が固相となる例としてはZnの代りにNiを用
いる。NiはGaAsと反応し、NiAsを形成する。
GaAsとNiとの反応は固相反応で進行するために
きわめて一様な反応層が得られ、本発明を適用す
るのに都合がよい。AlGaAs表面に本発明を適用
するには薄膜状の異種材料としてAlを用いれば、
GaAsにZn薄膜を用いた本実施例と同様の効果が
得られる。また以上の実施例では2種類の半導体
レーザの製造方法についてLPE成長方法を用い
た場合について示したが、気相エピタキシヤル成
長で行なう場合には反応相をガスエツチングして
後、気相エピタキシヤルすれば良い。気相成長の
場合、例えばGaAsの上にIn薄膜を形成しておき
約500℃に加熱するとInはGaAs表面を溶融し、
次にHClガスを流すと前記溶融成分は容易にエツ
チングされ、清浄なGaAs表面が露呈する。加熱
温度500℃では通常HClによるGaAs表面のエチン
グは進行しないが、本発明の方法を用いる事で気
相エツチングは容易に進行し良好なエピタキシヤ
ル成長が行なわれる。
If the thin film material is undesirable as an impurity in the liquid phase epitaxial layer, cover the substrate with another solution similar to the epitaxial solution not used for liquid phase epitaxial growth in advance to dissolve the layer that reacts with the thin film; This dissolving solution may be removed and a liquid phase epitaxial solution may be placed on the substrate for growth. In addition, in the example, the state after the reaction of the thin film material and the material whose surface is to be removed was heated to a high temperature showed a liquid phase, but this reaction layer is not limited to a liquid phase, but can also be in a solid phase. The same effect can be obtained. In an example where the reaction layer is a solid phase, Ni is used instead of Zn. Ni reacts with GaAs to form NiAs.
Since the reaction between GaAs and Ni proceeds as a solid phase reaction, an extremely uniform reaction layer can be obtained, which is convenient for applying the present invention. To apply the present invention to the AlGaAs surface, if Al is used as a thin film-like dissimilar material,
The same effects as in this example using a Zn thin film on GaAs can be obtained. Furthermore, in the above embodiments, two types of semiconductor lasers were manufactured using the LPE growth method, but when vapor phase epitaxial growth is used, the reaction phase is gas-etched and then vapor phase epitaxial growth is performed. Just do it. In the case of vapor phase growth, for example, if an In thin film is formed on GaAs and heated to about 500°C, the In melts the GaAs surface.
Next, by flowing HCl gas, the molten components are easily etched away, exposing the clean GaAs surface. At a heating temperature of 500° C., etching of the GaAs surface by HCl does not normally proceed, but by using the method of the present invention, vapor phase etching proceeds easily and good epitaxial growth is achieved.

以上本発明のエピタキシヤル法はエピタキシヤ
ル成長に先立ち、エピタキシヤル反応炉中での選
択的表面除去を可能としかつ化合物半導体材料を
基板としたエピタキシヤル成長に際しては成長前
の基板加熱時における表面の熱的劣化の問題を大
幅に軽減することができ多くの分野のエピタキシ
ヤル成長法として有用である。特に−族化合
物等を利用した光デバイスのエピタキシヤル成長
による製作にはきわめて適していることは言うま
でもない。
As described above, the epitaxial method of the present invention enables selective surface removal in an epitaxial reactor prior to epitaxial growth, and during epitaxial growth using a compound semiconductor material as a substrate, surface removal during heating of the substrate before growth is possible. It is useful as an epitaxial growth method in many fields since it can significantly reduce the problem of thermal deterioration. It goes without saying that it is particularly suitable for manufacturing optical devices using - group compounds by epitaxial growth.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は本発明を有効に利用して
作ることのできる、ダブル・ヘテロ半導体レーザ
のヘキ開面より見た断面図、第3図は第2図の半
導体レーザの従来の製法を説明するためにえがか
れたウエフア断面図、第4図および第5図は第1
図および第2図で示したダブル・ヘテロ半導体レ
ーザを形成する場合に本発明を適用して製作する
場合のヘテロ構造ウエフアの製造工程を示すウエ
フア断面図である。 11はn形GaAs基板、13はn形Al0.3Ga0.7
As層、14はn形GaAs活性層、15および31
はp形Al0.3Ga0.7As層、16はn形GaAs層17
および18は電極金属、12はGaAs基板11に
ほられたストライプ状の溝、2aは埋め込まれる
ストライプ状のn−GaAs活性層、2bはとり除か
れるストライプ領域外のnGaAs活性層、316
はp−GaAs層、41および51はZn薄膜、42
および52はZn薄膜41あるいは51とそれぞ
れ反応して生じた反応層である溶液相を示す。
Figures 1 and 2 are cross-sectional views of a double hetero semiconductor laser seen from the hexagonal plane, which can be manufactured by effectively utilizing the present invention, and Figure 3 is a conventional manufacturing method for the semiconductor laser shown in Figure 2. The cross-sectional views of the wafer, Figures 4 and 5, drawn to explain the
FIG. 3 is a wafer cross-sectional view showing a manufacturing process of a heterostructure wafer when the present invention is applied to form the double heterostructure semiconductor laser shown in FIGS. 11 is n-type GaAs substrate, 13 is n-type Al 0.3 Ga 0.7
As layer, 14 is n-type GaAs active layer, 15 and 31
is a p-type Al 0.3 Ga 0.7 As layer, 16 is an n-type GaAs layer 17
and 18 is an electrode metal, 12 is a striped groove formed in the GaAs substrate 11, 2a is a striped n-GaAs active layer to be embedded, 2b is an nGaAs active layer outside the stripe area to be removed, 316
is a p-GaAs layer, 41 and 51 are Zn thin films, 42
and 52 indicate a solution phase which is a reaction layer generated by reacting with the Zn thin film 41 or 51, respectively.

Claims (1)

【特許請求の範囲】[Claims] 1 化合物半導体基板結晶表面に化合物半導体エ
ピタキシヤル結晶を成長する方法において、該基
板結晶表面の全体又はその一部に前記基板結晶構
成材料とは組成あるいは構成元素が異なる材料層
を形成する第1の工程と、エピタキシヤル成長炉
中で加熱して前記基板結晶とその表面に形成した
前記材料層とを反応せしめた反応層を形成し、前
記基板結晶を液相エピタキシヤル成長溶液と接触
させて前記反応層を除去すると共に表面にエピタ
キシヤル結晶成長層を順次連続して形成する第2
の工程を有することを特徴とするエピタキシヤル
結晶成長方法。
1. A method for growing a compound semiconductor epitaxial crystal on a crystal surface of a compound semiconductor substrate, in which a first material layer having a composition or constituent element different from that of the material constituting the substrate crystal is formed on the entire or part of the surface of the substrate crystal. forming a reaction layer by heating in an epitaxial growth furnace to cause the substrate crystal to react with the material layer formed on its surface; and contacting the substrate crystal with a liquid phase epitaxial growth solution to form a reaction layer. A second step in which the reaction layer is removed and epitaxial crystal growth layers are successively formed on the surface.
An epitaxial crystal growth method comprising the steps of:
JP11962378A 1978-09-27 1978-09-27 Method of growing crystal Granted JPS5546536A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11962378A JPS5546536A (en) 1978-09-27 1978-09-27 Method of growing crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11962378A JPS5546536A (en) 1978-09-27 1978-09-27 Method of growing crystal

Publications (2)

Publication Number Publication Date
JPS5546536A JPS5546536A (en) 1980-04-01
JPS6323651B2 true JPS6323651B2 (en) 1988-05-17

Family

ID=14766014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11962378A Granted JPS5546536A (en) 1978-09-27 1978-09-27 Method of growing crystal

Country Status (1)

Country Link
JP (1) JPS5546536A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160700A (en) * 1974-11-22 1976-05-26 Matsushita Electric Ind Co Ltd gaas ekisoepitakisharuseichoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160700A (en) * 1974-11-22 1976-05-26 Matsushita Electric Ind Co Ltd gaas ekisoepitakisharuseichoho

Also Published As

Publication number Publication date
JPS5546536A (en) 1980-04-01

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