JPS63234452A - Drop-out detecting circuit - Google Patents

Abstract

PURPOSE:To surely detect a drop-out with simple circuit constitution by extracting data of the most significant bit from a digitized read signal and detecting the drop-out based on the change pattern of this most significant bit. CONSTITUTION:If a low-frequency component is generated by the drop-out at the time of drop-out occurrence, the logical '0' or '1' of the most significant bit of a digitized video signal continues for a time longer than that for the absence of drop-out. Consequently, data of the most significant bit indicating the polarity of the digital video signal is extracted by a most significant bit extracting circuit 40 and it is monitored by a first or second detecting circuit 41 or 42 whether the logical '0' or '1' of the most significant bit continues a prescribed number of times or not, thereby detecting the drop-out. That is, the drop-out is surely detected with the simple circuit constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a dropout detection circuit, and more particularly to a dropout detection circuit in a recorded information reproducing device that digitizes and processes a high frequency signal read from a recording medium. .

In a recorded information reproducing device, such as a disc player that plays back a video disc on which a video signal has been subjected to FM modulation processing, signal processing of the FM video signal read from the disc has conventionally been performed in an analog manner. was common.

However, when considering the integration of circuits into ICs (integrated circuits), it is extremely advantageous to perform signal processing digitally rather than analogously, and it is also easier to achieve multi-functionality in the signal processing process. Because it is possible to achieve high image quality, the present applicant has already proposed a recorded information reproducing device δ that digitally processes signals read from a disc (see the specification of Japanese Patent Application No. 60-280711).
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By the way, in recorded information reproducing devices such as video disc players, signal loss, or dropout, may occur in the read signal from the recording medium due to scratches or dirt on the recording medium. It is necessary to detect and compensate for it.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned points, and provides a dropout detection circuit that can reliably detect dropouts with a simple circuit configuration in a recorded information reproducing device that performs signal processing digitally. The purpose is to

The dropout detection circuit according to the present invention extracts data of the most significant bit from the digitized read signal in a recorded information reproducing apparatus that digitizes a read signal from a recording medium and processes the signal. The configuration is such that dropout is detected based on the change pattern of ~.

X-5-1 Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a recorded information reproducing apparatus including a dropout detection circuit according to the present invention. At J3 in the figure, an FM video signal read from a recording medium such as a video disc is supplied to an A/D converter 2 via an analog LPF (low pass filter) 1.

LPFI is for removing aliasing distortion in A/D conversion. The digitized FM video signal output from the A/D converter 2 is supplied to a digital BPF (band pass filter) 3 and a dropout detection circuit 4 according to the present invention. Digital [31) F 3 is
Only the components necessary for detecting the video signal are extracted from the A/D conversion output including the FM audio signal and supplied to the FM detection circuit 5 at the next stage. As the FM detection circuit 5, for example, one having the configuration proposed by the present applicant in Japanese Patent Application No. 59-262481 can be used.

From the detection output of the FM detection circuit 5, only the baseband component of the video signal is extracted by a video LPF 6. The digitized video signal that has passed through the video LPF 6 is supplied to a dropout correction circuit 7 and a signal separation circuit 8.

The dropout correction circuit 7 is the dropout detection circuit 4
Dropout correction is performed in response to a dropout detection signal supplied from the dropout detection signal.

The signal separation circuit 8 separates and extracts the horizontal synchronization signal, color burst signal, etc. contained in the digitized video signal, and supplies the separated signals to the clock generation circuit 9. The clock generation circuit 9 is
4fsc (fsc is subcarrier frequency) based on the horizontal synchronization signal or color burst signal from the signal separation circuit 8 and the reference horizontal synchronization signal from the reference signal generation circuit 10
and 4Nfsc (N is an integer greater than or equal to 2, for example, 3).
It has a locked loop) circuit configuration. The 4f'sc and 4Nf'sc clocks generated here are used as clocks for digital signal processing, and the A/D
1 numbering clock of converter 2 and video LPF6
The signal processing clock up to 4Nfsc is used, and the video L
Downsampling is performed from the output of PF6 to a 4fSC clock.

The digitized video signal output from the drop array correction circuit 7 is a 4f signal generated by the clock generation circuit 9 based on the color burst signal extracted from the reproduced video signal.
The data is written into the buffer memory 11 by the 'sc clock. Data is read from the buffer memory 11 using a 4fsc reference clock generated by the reference signal generation circuit 10. In this way, by reading data from the buffer memory 11 using a stable reference clock unrelated to the reproduced video signal, jitter (time axis fluctuation) of the reproduced video signal can be absorbed. The digitized video signal read from the buffer memory 11 is converted into an analog signal by a D/A (digital/analog) converter 12 and becomes a reproduced video output.

FIG. 2 is a block diagram showing one embodiment of the dropout detection circuit 4 according to the present invention. In the figure, the digitized video signal that is the output of the A/D converter 2 is supplied to the most significant bit extraction circuit 40, and the circuit 40 extracts the data of the most significant bit.

be done. The logic of the most significant bit of the digitized video signal (
1, 0) corresponds to the positive and negative polarity of the amplitude. For example, in a 2"S concompliment (two's complement), the logic "0"
'' represents a positive amplitude, and logic ``11n'' represents a negative amplitude, respectively. The extracted most significant bit data is supplied to first and second detection circuits 41 and 42. These first and second detection circuits 41 and 42 are composed of counters and the like,
This is to detect that the logic of the most significant bit is the same logic consecutively a predetermined number of times, the first detection circuit 41 detects the logic "0", and the second detection circuit 42 detects the logic "1". Detection is performed based on the number of consecutive times. These detection circuits 41.4
The detection output of No. 2 is supplied via an OR gate 43 to a dropout correction circuit 7 (FIG. 1) as a dropout detection signal.

In such a configuration, when dropout occurs, one aspect is that the signal read from the disk may contain low frequency components, as shown in FIG. 3(A), and the dropout causes the low frequency components to When generated, the logic 110” of the most significant bit of the digitized video signal
' or '1' continues for a longer time than in the case without dropout as shown in FIG. 3(B). Therefore, the most significant bit extraction circuit 40 extracts the most significant bit data representing the positive or negative polarity of the digitized video signal, and extracts the most significant bit data as logic "O" or 1'.

Dropout can be detected by monitoring with the first or second detection circuits 41, 42 that the number of times that the number of dropouts continues is a predetermined number of times (for example, five times in the embodiment shown in FIG. 3).

FIG. 4 is a block diagram showing another embodiment of the present invention,
The dropout detection circuit according to this embodiment includes a most significant bit extraction circuit 40 that extracts data of the most significant bit from a digitized video signal, and at least one reference pattern. The most significant bit change pattern comparison circuit 44 generates a detection output when the change pattern of the most significant bit matches the reference pattern, and this detection output becomes a dropout detection signal. The most significant bit change pattern comparison circuit 44 includes, for example, the most significant bit extraction circuit 4 as shown in FIG.
A shift register 440 that sequentially stores data of the most significant bit extracted at 0, a reference pattern generation circuit 441 that generates at least one reference pattern, and a match between the output of the shift register 440 and the output of the reference pattern generation circuit 441. and a coincidence detection circuit 442 that detects.

In such a configuration, if dropout occurs, one example of this is that the signal read from the disk may contain high frequency components, as shown in FIG. 6(A). It is assumed that the sampling frequency of the A/D converter 2 in FIG. 1 is set to a high enough frequency to reproduce high frequency components caused by dropout.

When a high frequency component is generated due to dropout, the logic "O" or "1" of the most significant bit of the digitized video signal
Since the change pattern of '' samples high-frequency components due to dropout, the degree of change becomes more severe than the change pattern when there is no dropout, as shown in FIG. 6(B). The most significant bit extraction circuit 40 extracts the most significant bit data representing the positive and negative polarities of the digitized video signal, and the change pattern is monitored by the most significant bit change pattern comparison circuit 44, whereby the most significant bit data is dropped. For example, in the embodiment shown in FIG. 6, dropouts can be detected by setting "10101" as one of the detection reference patterns.

Note that in each of the above embodiments, a dropout detection circuit that detects a low frequency component or a high frequency component independently has been described, but a configuration that detects both a low frequency component and a high frequency component by using both circuits together is also possible. This may further improve dropout detection accuracy.

Further, in each of the above embodiments, a video disk was used as an example of the recording medium, but a video tape may also be used, as long as a predetermined signal is modulated with a high frequency signal and recorded. be.

As described in detail, the dropout detection circuit according to the present invention extracts data at the most significant bit from a read signal read from a recording medium and digitized, and detects a change in this most significant bit. Since the configuration detects dropouts based on patterns, dropouts can be reliably detected with a simple circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a recorded information reproducing apparatus having a dropout detection circuit according to the present invention, and FIG.
FIG. 3 is a block diagram showing an embodiment of the dropout detection circuit according to the present invention, FIG. 3 is a diagram showing input and output waveforms including low frequency components of the A/D converter in FIG. 1, and FIG. 4 is a block diagram showing an embodiment of the dropout detection circuit according to the present invention. FIG. 5 is a block diagram showing an example of the configuration of the most significant bit change pattern comparison circuit in FIG. 4, and FIG. FIG. 3 is a diagram showing input and output waveforms including high frequency components of a D converter. Explanation of symbols of main parts 4...Dropout detection circuit 5...
FM detection circuit

Claims (3)

[Claims] (1) A dropout detection circuit in a recorded information reproducing device that digitizes and processes a read signal from the recording medium when reproducing a signal modulated by a high frequency signal and recorded on the recording medium, the circuit comprising: extraction means for extracting data of the most significant bit from the read signal;
A dropout detection circuit comprising a detection means for detecting a change pattern of the most significant bit extracted by the extraction means, and a detection output of the detection means is used as a dropout detection signal. (2) The detection means generates a detection output when the logic of the most significant bit extracted by the extraction means is the same logic consecutively a predetermined number of times. Dropout detection circuit. (3) The detection means has at least one reference pattern, and generates a detection output when the change pattern of the most significant bit extracted by the extraction means matches the reference pattern. Dropout detection circuit according to range 1.