JPS62250786A - Digital sound data processor - Google Patents

Abstract

PURPOSE:To automatically decide whether NTSC system or PAL/SECAM sys tem to process in accordane ioith NTSC system or PAL/SECAM system by providing a means to record an identification data, a means to detect the identifi cation data at the time of reproduction, and a means to timing generating processing based on a detected identification data. CONSTITUTION:A timing signal generating part 11 outputs timing signals corresponding to the number of blocks to be processed in accordance with the data format system corresponding an NTSC system-detection signal or a PAL/ SECAM system detection signal outputted by a frame synchronziing signal detecting part 10. By using a timing clock generated based on the said timing signals, a modulation circuit 12 cuts an inputted modulated code string into respective codes of fourteen bits, and demodulates each code into data of eight bits. Further, and error correcting part 13 executes an error correction processing corresponding to each system and outputs the data to an output terminal 15. Thus, by employing such a method, whether the data is of NTSC system or PAL/SECAM system is automatically decided at the time of reproducing by one device, and the processings for each system can be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to the recording and playback of digital audio in video tape recorders.

2. Description of the Related Art Conventionally, when recording digital audio data as video and audio for the video, the configuration of the device consists of a deck main body consisting of a video signal processing section and a recording section, and a digital audio data processing section. There is.

The digital audio data processing section also has a processing circuit configured according to a data format compatible with the NTSC system.

Problems to be Solved by the Invention However, with the above configuration, when recording, the data format of digital audio data is different for each method, and the timing and frequency at the time of error correction code generation and error correction are different.

Therefore, the deck part is NTII: PAL/3 even though it is a system! !
: When changing to the CAM system, it is also necessary to change the digital audio processing device from a device compatible with the NTSC system to a device compatible with the PAL/SEC and AM systems.

Therefore, in order to realize the common use of the NTSC system and the PAL/SKCAM system, there is a problem in that it is necessary to easily and reliably identify whether the tape being played back is recorded in the NTSC system or the PAL/SIIAM system. Ta.

Means for Solving the Problems The present invention provides means for recording identification data of NTSC system or PAL/SICCAM system in a part of a frame synchronization signal, means for detecting the identification data during reproduction, and means for detecting the identification data during reproduction. This is a digital audio data processing device having means for performing timing generation processing based on identification data.

NTSC or PA is used as part of the frame synchronization signal during recording.
L/SICCAM format identification data is recorded, and when playing back, the identification data is detected and automatically changed to NTSG format or PA.
It is determined whether it is an L/SKCAM force type or not, and processing corresponding to each type is performed.

Embodiment FIG. 1 is a block diagram showing processing during recording and reproduction of digital audio data in an embodiment of the present invention.

In FIG. 1, 1 is a digital audio data input terminal;
2 is a framing section, 3 is an error correction code generation section, 4 is a modulation section, 6 is a frame synchronization signal addition section, 6 is an NRZI modulation section, 7 is a recording section, 8 is a reproduction section, 9 is an NRZI demodulation section, 1o
1 is a frame synchronization signal detection section, 11 is a demodulation section, 12 is an error code generation section, 13 is a digital audio data output terminal, 1
4 is the NTSC system, PAL system setting signal input terminal, 15
is a timing signal generator.

A digital audio data string inputted from a digital audio data input terminal 1 is inputted to a framing section 2 and an error correction code generating section 3.

The framing unit 2 divides the input digital audio data string, and generates a dummy synchronization signal, address error detection code, and error correction code generation unit for each block of the divided digital data as shown in FIG. 3. An input error correction code is added to form a frame.

The error correction code generation section 3 divides the input digital audio data into blocks in the same way as the above-mentioned framing section 2, generates an error correction code for each block,
Output to the framing unit 2.

At this time, the data formats are different between the NTSC system and the PAL/SECAM system. As shown in Figure 3, if one frame is one block, NTSC system and PAL/SI system
The number of blocks N is different in the CCAM method.

For this reason, the timing of framing and error correction code generation is different between the NTSC system and the PAL/SKCAM system, so when recording, the NTSC system or the PAL/SKCAM system is set from outside the device, and the setting signal is transmitted to the NTSC system and the PAL/SKCAM system. Input from the PAL/SECAM setting signal input terminal 14. The NTSC system and PAL/SICCAM system setting signals are converted into a frame by a frame unit 2. Signal processing corresponding to each method is performed by inputting the signal to the error correction code generation unit 3 and setting the number of blocks to be processed.

The modulating section 4 modulates the framed digital audio data inputted from the framing section 2 using the 8-14 modulation method, which is a DC free modulation method. Each frame is divided into 8 bits and sequentially converted into a 14-bit modulation code.

The 1o pit pattern is a pit pattern that never occurs in the modulation code string obtained by performing the 8-14 modulation.
A 28-pit pattern including "oOoooo10000oOo" is used as a frame synchronization signal.

FIG. 4 is a circuit diagram of the frame synchronization signal adding section. In FIG. 4, 16 is a clock input terminal, 17 to 2o are shift registers, 21 is a modulation data output terminal after replacing the dummy synchronization signal and frame synchronization signal, and 22 is a signal input for replacing the dummy synchronization signal and frame synchronization signal. terminal, 23 is modulation code input terminal, 24 is NTSC system, P
26 is a load signal input terminal, and 26 is a switch section.

A modulation code string obtained by 8-14 modulation of a framed digital audio data string is input from the modulation code input terminal 13, and a dummy synchronization signal consisting of 28 bits after modulation is input according to the timing shown in FIG. Replace with frame synchronization signal.

At this time, to set the frame synchronization signal in TSC system, the setting signal inputted from the NTSG system, FAI, /ICCAM system setting signal input terminal 24 is set to low level. Therefore, the frame synchronization signal is '1000
100010100000001000000010”
becomes.

To set the frame synchronization signal 1pAL/sxcAM system, the above-mentioned iTsc system and PAL/SICCAM system setting signals are set to high level. Therefore, the frame synchronization signal is "101010101010000000100
0000010”.

In the case of the NTSC system and the PAL/SICGAM system, the frame synchronization signal is transferred to the shift registers 17 to 20 by the load signal input from the load signal input terminal.
is set, and when the replacement signal input from the replacement signal input terminal for the dummy synchronization signal and frame synchronization signal is at a low level, the read dummy synchronization signal and the frame synchronization signal are replaced in the switch unit 26.

After replacing it, it is output from the output terminal 21.

The NRZ I modulator 6 converts the input modulation code string into NRZ
The signal is ZI-modulated and output to the recording section 7.

The recording unit 7 records the modulated code string subjected to the NRZI modulation onto a medium.

During playback, it is automatically detected whether the recording is in the NTSC format or the PAL/SKCAM format, and processing is performed depending on each case.

The modulation code string reproduced by the reproduction section 8 is demodulated by the NRZI demodulation section.

The NRZI demodulator demodulates using the 9IITSC method, and also generates a basic clock. The modulated code string is NRZI demodulated using the obtained clock and output to the frame synchronization signal detection section 1o and the demodulation section 11.

FIG. 6 shows a block diagram of the frame synchronization signal detection section 10. In FIG. 6, 27 is a modulation code input terminal, 28
is a 24-pit shift register, 29 is a comparator, 30 is a frame synchronization signal hit pattern, 31 is an NTSC system,
PAL/3KCAM system judgment signal output terminal, 32 is frame synchronization signal detection signal output terminal, 33.34 is 3-man power H
AND gate, 36 is NTSC system or PAL/SICC
The AM system determining unit 36 and 37 is an inverter.

100, which is a pattern consisting of 16 bits in the frame synchronization signal of the NTSC system and PAL/SRCAM system.
0000010000000- is a pattern that does not appear in the modulation code string, and in detecting the frame synchronization signal, the above 16 bits may be detected.

Regarding the determination of NTSC system or PAL/SICCAM system, when all frame synchronization signals are detected, when the 1st bit and 6th pit of the shift register 28 are "0", it is the NTSC system, and when it is "1°", it is the NTSC system. PAL/SICCA
This is the M method.

Therefore, the frame synchronization signal detection signal from the comparator 29 and the outputs of the first and sixth bits of the shift register 28 are input to the three-man power HAND gate 33, and the frame synchronization signal detection signal and the first bit and the signal obtained by inverting the output of the 6th pit using inverters 36 and 37.
The human power is inputted to the ND gate 34.

If the frame synchronization signal is set to NTSC,
Since the outputs of the first bit and the sixth pit are both '0', the output of the three-way NAND gate 33 becomes high level, and the output of the three-way NAND gate 34 becomes low level.

Furthermore, when the frame synchronization signal is set to the PAL system, the outputs of the first bit and the sixth pit are both “1°”.
Therefore, the output of the three-man power NAND gate 33 becomes a low level, and the output of the three-man power HAND gate 34 becomes a high level.

Therefore, in the determination section 36, the three-man power HAND gate 33
output is at a high level and the three-man power HAND gate 3
When the output of 4 is low level, it is determined that the NTSC system is used, and the NTSCi system is used.

PAL/Sl! :The CAM method determination signal is outputted from the output terminal 31 as an irregular signal. In addition, the three-person HA
The output of the HD gate 33 is low level and the three-man power H
When the output of the AND gate 34 is at the NO level, the PA
It is determined that the L system is used, and the NTSC system, PAL/SI
With the CCAM system determination signal set to low level, output terminal 3
Output from 1.

Further, the frame synchronization signal detection signal is outputted from the output terminal 32.

In FIG. 1, the timing signal generator 11 uses the NTSC system output from the frame synchronization signal detector 10,
According to the data format of the system corresponding to the PAL/SIIAM system detection signal, a timing signal matching the number of blocks to be processed is output.

The demodulator 12 divides the input modulation code string into 14-pit codes using a timing clock generated based on the frame sync signal detection signal output from the frame sync signal detector 10, and converts each code into 14-pit codes. 8
Demodulates to bit data.

The error correction section 13 performs error correction processing compatible with the NTSC system or the PAL/SECAM system based on the timing signal output from the timing signal generation section 11. The digital audio data subjected to the error correction process is outputted from the output terminal 16.

As described above, according to this embodiment, when recording digital audio data, NTS is included in a part of the frame synchronization signal.
C system or PAL/SECAM system can be added and recorded, and the processing system can be determined by detecting the identification data during playback, and automatically selects NTSC system during playback using the same device. It is possible to determine whether the system is PAL or SECAM, and to perform the respective processing.

As described in detail, according to the present invention, the 11
It is now possible to detect whether the recording is in the TSC format or the PAL/SIIAM format and perform processing in each format, allowing a single device to be compatible with both formats and configured at low cost. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing recording and playback processing of a digital audio processing device according to an embodiment of the present invention, FIG. 2 is a frame configuration diagram, FIG. 3 is a data format diagram, and FIG.
The figure is a circuit diagram of the frame synchronization signal addition section of the same embodiment, No. 6
The figure is an operation timing diagram of the synchronization signal addition section of the same embodiment, and FIG. 6 is a block diagram of the frame synchronization signal detection section of the same embodiment. 5... Frame synchronization signal addition section, 1o...
. . . Frame synchronization signal detection section, 11 . . . Timing signal generation section.

Claims (1)

[Claims] When digital audio is recorded as a frame on a video tape recorder capable of recording digital audio as video and audio of the video, video system identification data is recorded as part of the frame synchronization signal of the digital audio. A digital audio data processing device comprising: means for detecting the identification data during playback; and means for performing timing signal generation processing based on the detected identification data.