JPS63219037A - Data processor - Google Patents

Abstract

PURPOSE:To obtain a deice capable of suppressing a data transferring quantity to be small by providing a main operation device, which stores the position of the respective node of a list data as the table type data of a vector expression and consists of a non-list data processing part. CONSTITUTION:A reference to an atom data is stored in the VALUE part of the list data, and a data processing is performed by a register 5 and an operating means 6 in an atom data processing part 7. A list data processing is performed by a list data processing part 4 in the main operation device 8 and by a suboperation device 12, and one of element registers 9 corresponds to the list register 2. When the list data of a main memory device 1 is processed, an identification information is transferred to the list register 2, and at the same time, a respective element is transferred to the element register 9 by a transferring device 13. At the same time that the list data of the device 1 is referred in the processing part 4, the corresponding area in the memory device is referred, and the processing of the list data is performed in parallel.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a data processing device mainly intended for use in the field of artificial intelligence.

BACKGROUND OF THE INVENTION In recent years, the field of artificial intelligence has been actively researched as one of computer applications. In this field, it is necessary to process structured data, and therefore LISP, a language that can handle structured data, is widely used. However, since it is inefficient to execute the LISP language on a general-purpose computer, special-purpose machines with various improvements have been developed.

These dedicated machines were improved mainly from a linguistic perspective, and the typical improvements made are shown below.

(1) Primitive functions such as CAR and CDR are executed at the microprogram level.

(2) TAG for handling generic data types
data format.

(3) Provide a hardware control stack to speed up stack processing.

(For example, Reference rLIsP Machine" Information Processing Vol.
．． 23 k 8 pp 752-772) However, although improvements have been made to the execution system of the language as described above, the representation of structure data inside a computer is basically based on pointer order relationships and connection methods of elements. (hereinafter referred to as a list) is used. In this method, all list operations involve sequentially following the pointer, so it is essentially inefficient for performing the following operations that frequently appear in application programs in the field of artificial intelligence. (a) Pattern matching: It is inefficient because it involves decomposition of a list. (b) Accessing arbitrary elements, decomposing lists, replacing specific elements; it becomes a list traversal, which is inefficient.

In order to solve the above problems, proposals have been made to change the method of expressing list data.

In general, a binary tree list starts from a starting node, branches left and right sequentially, and each branch ends at a leaf node. There are two types of leaf nodes: atom nodes and NIL nodes. Nodes that are not leaf nodes are list nodes that indicate that the branch is continuing. This list node is used to indirectly indicate the position of the leaf node.

In the pointer representation, this structural representation is expressed as is by cells in which all nodes are connected by addresses. As a result, access to each element always requires repeated indirect references to the address.

However, if the positions of leaf nodes can be directly determined, there is no need to have list node information. Therefore, in a table that sequentially arranges the leaf position information and the leaf's own information,
Equivalent list data can be expressed. A one-dimensional vector representation has been proposed as a method for expressing leaf node positions, in which numbers are sequentially assigned in the CDR direction and items are sequentially assigned in the CAR direction. Therefore, the list data is expressed as a set of data that includes a vector indicating leaf position information and information about the leaf itself. With this representation method, there is no need to limit the interpretation of a list to a binary tree list, as is the case with pointer representations.

FIG. 3 shows an example of list data representation. This is the graphical representation (al) and tabular representation (b) of list data that becomes (A (B (C) ”) D) when expressed in 8 formulas.
This is what is shown. In the diagrammatic representation, circles represent list nodes, and squares represent leaf nodes. Further, the number string added above each node indicates the node position expressed according to the above-described method. This leaf part is extracted and expressed in the form of a table, which is expressed in tabular form (
bl is composed of a table in which the address part contains the node position vector and the value part contains the leaf elements. By adopting such an expression format, it becomes possible to process each element of list data in parallel without moving pointers, and the above-described operations can be performed at high speed.

An example of a conventional data processing device based on this tabular representation will be described below with reference to the drawings.

FIG. 4 shows a conventional processing device. In FIG. 4, 1 is a memory device that stores tabular list data, 2 is a list data processing device consisting of a plurality of processing units 3 that process each element of the tabular data, 4 is an atom data processing device, and 5 is a transfer device that sequentially allocates each element of tabular data from the aforementioned memory device to each processing unit that is processing the aforementioned list data.

The operation of the data processing apparatus configured as described above will be described below.

First, normal numerical data, character data, etc. are processed in the atom data processing device 4.

The list data is sequentially transferred from the memory device 1 to each processing unit 3 in the list data processing device for each element by the transfer device 5, and is processed in parallel by each processing unit. By processing atom data separately from list data in this way, we aim to efficiently process list data and simplify the configuration of the processing system.

Problems to be Solved by the Invention However, with the above configuration, data transfer from the memory device to each processing unit in the list data processing device occurs frequently, resulting in a bottleneck in parallel processing of list data. It had some problems.

In view of the above problems, the present invention provides a data processing device that reduces the amount of data transferred in parallel processing of tabular list data.

Means for Solving the Problems In order to solve the above problems, the data processing device of the present invention includes a main memory device that stores the position of each node of list data as tabular data expressed as a vector; a main processing unit consisting of a list data processing section consisting of a plurality of list registers for storing identification information of list data and a list calculation means; a non-list data processing section consisting of a plurality of registers and a calculation means; and list data in a table format. a plurality of sub-processing units each having a plurality of element registers for storing each element of the list data, a calculation means, and a sub-memory device and processing each element of the list data in parallel under the control of the main processing unit; and a transfer device that sequentially allocates elements of the tabular data stored in the main memory device to the sub-processing device.

According to the above-described structure, the present invention has its own memory for each of the plurality of processing units that process list data in tabular format, so that once the data is transferred from the memory device to each processing unit, The information is stored in each processing unit and can be used for subsequent processing. As a result, it is possible to avoid transferring data every time processing is performed, so the overall amount of data transferred can be significantly reduced.

Embodiment Hereinafter, a data processing apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of a data processing device in an embodiment of the present invention. In FIG. 1, 1 is a main memory device, 2 is a list register, and 3 is a list calculation means, and the list data processing section 4 is a general term for a plurality of list registers and list calculation means. 5 is a register, 6 is a calculation means, and the atom data processing section 7 is a general term for a plurality of registers and calculation means. Furthermore, the main processing unit 8 is a general term for the list data processing section and the atom data processing section. 9 is an element register, 10 is an element calculation means, and 11 is a sub memory device. The sub-processing device 12 is a general term for element registers, element calculation means, and sub-memory device. 13 is a transfer device.

FIG. 2 illustrates the relationship between the address spaces of the sub memory device and the main memory device in the above embodiment.

In FIG. 2, 21 represents the address space of the main memory device, 22 is the rest data area in the address space, and 23 is the address space of the sub memory device.

The data processing apparatus configured as described above will be explained below using FIG. 1 and FIG. 2.

First, a reference to atom data is stored in the VALUE section of each element of list data.

The processing of numerical and character data, which are their actual values, is
Register 5 and calculation means 6 in atom data processing section 7
This is done using These atom data are stored in main memory.

Next, list data processing is performed by the list data processing unit 4 in the main processing unit 8 and the sub processing unit 12.

One list register 2 in the list data processing section corresponds to one element register 9 in each sub-processing unit. That is, identification information of list data is stored in a list register, and each element of list data is stored in a plurality of corresponding element registers, representing one list data as a whole.

When the list data stored in the main memory device 1 is processed, the identification information of the list data is first transferred to the list register in the list data processing section, and at the same time, each element of the list data is transferred to each sub-processing device by the transfer device 13. are transferred separately to the element registers. When an operation is performed on the list register, necessary operations are simultaneously performed on the corresponding element register.

The data of each element once transferred is placed under the management of each sub-processing unit and stored in the sub-memory device W12 of each sub-processing unit.
Unnecessary data transfer between the main memory device and the sub-processing device is not performed. The address space 23 of each secondary memory device is located in a portion 22 of the address space of the main memory device as shown in FIG. 2, and furthermore, the address space 21 of every secondary memory device is at the same address. As a result, the identification information and each element of certain list data all exist at the same address in the address space of this data processing device.

As a result, when the list data processing section refers to the list data area in the address space of the main memory device, the corresponding area in the memory device is simultaneously referenced in all sub-processing units, and the list data processing is performed in parallel. It will be done.

By having such an address space, it is possible to configure a processing device that minimizes the amount of data transferred with a simple configuration.

Effects of the Invention As described above, the present invention includes a main memory device that stores the position of each node of list data as tabular data expressed as a vector, a plurality of registers that store identification information of the tabular list data, and operations. a main processing unit consisting of a list data processing section consisting of means and a non-list data processing section consisting of a plurality of registers and arithmetic means, a plurality of registers for storing each element of list data in tabular form, arithmetic means, and a secondary memory device. a plurality of sub-processing units that process each element of list data in parallel under the control of the main processing unit; The present invention provides a data processing device that is equipped with a transfer device that sequentially allocates elements, and that can keep the amount of data transferred small in parallel processing of list data in a tabular format.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a data processing device according to an embodiment of the present invention, FIG. 2 is a correspondence diagram of the address space of the main memory device and sub memory device in FIG. 1, and FIG.
) is an explanatory diagram showing an example of a tabular representation of list data, and FIG. 4 is a block diagram of a conventional data processing device. 1...Main memory device, 2...List register, 3...List calculation means, 4...
・List data processing unit, 5...Register, 6.
...Arithmetic means, 7...Atom data processing unit, 8...Main arithmetic unit, 9...Element register, 10...Element operation Means, 11...
...Sub-memory device, 12...Sub-processing device, 13
・・・・・・Transfer device.

Claims (1)

[Claims] A list data processing unit comprising a main memory device that stores the position of each node of list data as tabular data expressed as a vector, a plurality of list registers that store identification information of the tabular list data, and list calculation means. and a main arithmetic unit comprising a non-list data processing section comprising a plurality of registers and arithmetic means, a plurality of element registers for storing each element of the tabular list data, an element arithmetic means, and an auxiliary memory device. a plurality of sub-processing units that process each element of list data in parallel under the control of the main processing unit; and sequentially allocating elements of the tabular data stored in the main memory unit to each of the sub-processing units; A data processing device comprising: a transfer device.